llvm-6502/lib/Target/Alpha
Bob Wilson a96751fc8f Provide InitializeAllTargets and InitializeNativeTarget functions in the
C bindings.  Change all the backend "Initialize" functions to have C linkage.
Change the "llvm/Config/Targets.def" header to use C-style comments to avoid
compile warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-23 23:59:40 +00:00
..
AsmPrinter Provide InitializeAllTargets and InitializeNativeTarget functions in the 2009-06-23 23:59:40 +00:00
Alpha.h
Alpha.td
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp
AlphaInstrFormats.td
AlphaInstrInfo.cpp
AlphaInstrInfo.h
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp
AlphaISelLowering.h
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp Provide InitializeAllTargets and InitializeNativeTarget functions in the 2009-06-23 23:59:40 +00:00
AlphaTargetMachine.h Unbreak cyclic deps 2009-06-19 19:36:55 +00:00
CMakeLists.txt
Makefile
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html