llvm-6502/lib/Transforms/InstCombine
Bill Schmidt fc22bfd921 [PowerPC] Add vec_vsx_ld and vec_vsx_st intrinsics
This patch enables the vec_vsx_ld and vec_vsx_st intrinsics for
PowerPC, which provide programmer access to the lxvd2x, lxvw4x,
stxvd2x, and stxvw4x instructions.

New LLVM intrinsics are provided to represent these four instructions
in IntrinsicsPowerPC.td.  These are patterned after the similar
intrinsics for lvx and stvx (Altivec).  In PPCInstrVSX.td, these
intrinsics are tied to the code gen patterns, with additional patterns
to allow plain vanilla loads and stores to still generate these
instructions.

At -O1 and higher the intrinsics are immediately converted to loads
and stores in InstCombineCalls.cpp.  This will open up more
optimization opportunities while still allowing the correct
instructions to be generated.  (Similar code exists for aligned
Altivec loads and stores.)

The new intrinsics are added to the code that checks for consecutive
loads and stores in PPCISelLowering.cpp, as well as to
PPCTargetLowering::getTgtMemIntrinsic().

There's a new test to verify the correct instructions are generated.
The loads and stores tend to be reordered, so the test just counts
their number.  It runs at -O2, as it's not very effective to test this
at -O0, when many unnecessary loads and stores are generated.

I ended up having to modify vsx-fma-m.ll.  It turns out this test case
is slightly unreliable, but I don't know a good way to prevent
problems with it.  The xvmaddmdp instructions read and write the same
register, which is one of the multiplicands.  Commutativity allows
either to be chosen.  If the FMAs are reordered differently than
expected by the test, the register assignment can be different as a
result.  Hopefully this doesn't change often.

There is a companion patch for Clang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221767 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-12 04:19:40 +00:00
..
CMakeLists.txt Tidy up a bit. No functional change. 2013-04-05 21:20:12 +00:00
InstCombine.h Clean up assume intrinsic pattern matching, no need to check that the argument is a value. 2014-10-25 18:09:01 +00:00
InstCombineAddSub.cpp InstCombine: Combine (X | Y) - X to (~X & Y) 2014-11-03 05:53:55 +00:00
InstCombineAndOrXor.cpp InstCombine: Turn (x != 0 & x <u C) into the canonical range check form (x-1 <u C-1) 2014-10-12 14:02:34 +00:00
InstCombineCalls.cpp [PowerPC] Add vec_vsx_ld and vec_vsx_st intrinsics 2014-11-12 04:19:40 +00:00
InstCombineCasts.cpp InstCombine: Fix a combine assuming that icmp operands were integers 2014-10-27 05:47:49 +00:00
InstCombineCompares.cpp InstCombine: Rely on cmpxchg's return code when it's strong 2014-11-06 23:23:30 +00:00
InstCombineLoadStoreAlloca.cpp Revert "IR: MDNode => Value" 2014-11-11 21:30:22 +00:00
InstCombineMulDivRem.cpp InstCombine: Don't miscompile X % ((Pow2 << A) >>u B) 2014-10-14 20:28:40 +00:00
InstCombinePHI.cpp Make use of @llvm.assume in ValueTracking (computeKnownBits, etc.) 2014-09-07 18:57:58 +00:00
InstCombineSelect.cpp Untabify and whitespace cleanups. 2014-10-28 11:53:30 +00:00
InstCombineShifts.cpp Make use of @llvm.assume in ValueTracking (computeKnownBits, etc.) 2014-09-07 18:57:58 +00:00
InstCombineSimplifyDemanded.cpp Add additional patterns for @llvm.assume in ValueTracking 2014-09-07 19:21:07 +00:00
InstCombineVectorOps.cpp fixed some typos 2014-07-07 22:13:58 +00:00
InstCombineWorklist.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
InstructionCombining.cpp Revert earlier change removing setPreservesCFG from instcombine (r221223) and 2014-11-04 23:02:09 +00:00
LLVMBuild.txt
Makefile