llvm-6502/test/CodeGen/X86/2007-07-10-StackerAssert.ll
Dan Gohman ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00

42 lines
1.2 KiB
LLVM

; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic
; PR1545
@.str97 = external constant [56 x i8] ; <[56 x i8]*> [#uses=1]
declare void @PR_LogPrint(i8*, ...)
define i32 @_ZN13nsPrintEngine19SetupToPrintContentEP16nsIDeviceContextP12nsIDOMWindow() {
entry:
br i1 false, label %cond_true122, label %cond_next453
cond_true122: ; preds = %entry
br i1 false, label %bb164, label %cond_true136
cond_true136: ; preds = %cond_true122
ret i32 0
bb164: ; preds = %cond_true122
br i1 false, label %bb383, label %cond_true354
cond_true354: ; preds = %bb164
ret i32 0
bb383: ; preds = %bb164
%tmp408 = load float* null ; <float> [#uses=2]
br i1 false, label %cond_true425, label %cond_next443
cond_true425: ; preds = %bb383
%tmp430 = load float* null ; <float> [#uses=1]
%tmp432 = fsub float %tmp430, %tmp408 ; <float> [#uses=1]
%tmp432433 = fpext float %tmp432 to double ; <double> [#uses=1]
%tmp434435 = fpext float %tmp408 to double ; <double> [#uses=1]
call void (i8*, ...)* @PR_LogPrint( i8* getelementptr ([56 x i8]* @.str97, i32 0, i32 0), double 0.000000e+00, double %tmp434435, double %tmp432433 )
ret i32 0
cond_next443: ; preds = %bb383
ret i32 0
cond_next453: ; preds = %entry
ret i32 0
}