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https://github.com/c64scene-ar/llvm-6502.git
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ac6d9bec67
Change SelectionDAG::getXXXNode() interfaces as well as call sites of these functions to pass in SDLoc instead of DebugLoc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
201 lines
7.0 KiB
C++
201 lines
7.0 KiB
C++
//===-- ARMSelectionDAGInfo.cpp - ARM SelectionDAG Info -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the ARMSelectionDAGInfo class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "arm-selectiondag-info"
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#include "ARMTargetMachine.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/IR/DerivedTypes.h"
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using namespace llvm;
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ARMSelectionDAGInfo::ARMSelectionDAGInfo(const TargetMachine &TM)
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: TargetSelectionDAGInfo(TM),
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Subtarget(&TM.getSubtarget<ARMSubtarget>()) {
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}
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ARMSelectionDAGInfo::~ARMSelectionDAGInfo() {
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}
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SDValue
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ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
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SDValue Chain,
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SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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bool isVolatile, bool AlwaysInline,
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MachinePointerInfo DstPtrInfo,
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MachinePointerInfo SrcPtrInfo) const {
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// Do repeated 4-byte loads and stores. To be improved.
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// This requires 4-byte alignment.
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if ((Align & 3) != 0)
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return SDValue();
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// This requires the copy size to be a constant, preferably
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// within a subtarget-specific limit.
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ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
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if (!ConstantSize)
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return SDValue();
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uint64_t SizeVal = ConstantSize->getZExtValue();
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if (!AlwaysInline && SizeVal > Subtarget->getMaxInlineSizeThreshold())
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return SDValue();
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unsigned BytesLeft = SizeVal & 3;
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unsigned NumMemOps = SizeVal >> 2;
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unsigned EmittedNumMemOps = 0;
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EVT VT = MVT::i32;
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unsigned VTSize = 4;
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unsigned i = 0;
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const unsigned MAX_LOADS_IN_LDM = 6;
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SDValue TFOps[MAX_LOADS_IN_LDM];
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SDValue Loads[MAX_LOADS_IN_LDM];
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uint64_t SrcOff = 0, DstOff = 0;
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// Emit up to MAX_LOADS_IN_LDM loads, then a TokenFactor barrier, then the
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// same number of stores. The loads and stores will get combined into
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// ldm/stm later on.
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while (EmittedNumMemOps < NumMemOps) {
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for (i = 0;
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i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
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Loads[i] = DAG.getLoad(VT, dl, Chain,
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DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
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DAG.getConstant(SrcOff, MVT::i32)),
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SrcPtrInfo.getWithOffset(SrcOff), isVolatile,
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false, false, 0);
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TFOps[i] = Loads[i].getValue(1);
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SrcOff += VTSize;
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}
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
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for (i = 0;
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i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
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TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
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DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
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DAG.getConstant(DstOff, MVT::i32)),
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DstPtrInfo.getWithOffset(DstOff),
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isVolatile, false, 0);
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DstOff += VTSize;
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}
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
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EmittedNumMemOps += i;
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}
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if (BytesLeft == 0)
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return Chain;
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// Issue loads / stores for the trailing (1 - 3) bytes.
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unsigned BytesLeftSave = BytesLeft;
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i = 0;
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while (BytesLeft) {
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if (BytesLeft >= 2) {
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VT = MVT::i16;
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VTSize = 2;
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} else {
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VT = MVT::i8;
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VTSize = 1;
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}
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Loads[i] = DAG.getLoad(VT, dl, Chain,
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DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
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DAG.getConstant(SrcOff, MVT::i32)),
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SrcPtrInfo.getWithOffset(SrcOff),
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false, false, false, 0);
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TFOps[i] = Loads[i].getValue(1);
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++i;
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SrcOff += VTSize;
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BytesLeft -= VTSize;
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}
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
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i = 0;
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BytesLeft = BytesLeftSave;
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while (BytesLeft) {
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if (BytesLeft >= 2) {
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VT = MVT::i16;
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VTSize = 2;
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} else {
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VT = MVT::i8;
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VTSize = 1;
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}
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TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
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DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
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DAG.getConstant(DstOff, MVT::i32)),
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DstPtrInfo.getWithOffset(DstOff), false, false, 0);
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++i;
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DstOff += VTSize;
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BytesLeft -= VTSize;
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}
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return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
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}
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// Adjust parameters for memset, EABI uses format (ptr, size, value),
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// GNU library uses (ptr, value, size)
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// See RTABI section 4.3.4
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SDValue ARMSelectionDAGInfo::
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EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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SDValue Chain, SDValue Dst,
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SDValue Src, SDValue Size,
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unsigned Align, bool isVolatile,
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MachinePointerInfo DstPtrInfo) const {
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// Use default for non AAPCS (or Darwin) subtargets
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if (!Subtarget->isAAPCS_ABI() || Subtarget->isTargetDarwin())
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return SDValue();
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const ARMTargetLowering &TLI =
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*static_cast<const ARMTargetLowering*>(DAG.getTarget().getTargetLowering());
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TargetLowering::ArgListTy Args;
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TargetLowering::ArgListEntry Entry;
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// First argument: data pointer
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Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*DAG.getContext());
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Entry.Node = Dst;
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Entry.Ty = IntPtrTy;
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Args.push_back(Entry);
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// Second argument: buffer size
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Entry.Node = Size;
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Entry.Ty = IntPtrTy;
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Entry.isSExt = false;
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Args.push_back(Entry);
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// Extend or truncate the argument to be an i32 value for the call.
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if (Src.getValueType().bitsGT(MVT::i32))
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Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
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else
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Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
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// Third argument: value to fill
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Entry.Node = Src;
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Entry.Ty = Type::getInt32Ty(*DAG.getContext());
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Entry.isSExt = true;
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Args.push_back(Entry);
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// Emit __eabi_memset call
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TargetLowering::CallLoweringInfo CLI(Chain,
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Type::getVoidTy(*DAG.getContext()), // return type
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false, // return sign ext
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false, // return zero ext
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false, // is var arg
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false, // is in regs
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0, // number of fixed arguments
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TLI.getLibcallCallingConv(RTLIB::MEMSET), // call conv
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false, // is tail call
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false, // does not return
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false, // is return val used
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DAG.getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
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TLI.getPointerTy()), // callee
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Args, DAG, dl);
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std::pair<SDValue,SDValue> CallResult =
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TLI.LowerCallTo(CLI);
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return CallResult.second;
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}
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