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https://github.com/c64scene-ar/llvm-6502.git
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436906ab3c
the stack of the analysis group because they are all immutable passes. This is made clear by Craig's recent work to use override systematically -- we weren't overriding anything for 'finalizePass' because there is no such thing. This is kind of a lame restriction on the API -- we can no longer push and pop things, we just set up the stack and run. However, I'm not invested in building some better solution on top of the existing (terrifying) immutable pass and legacy pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203437 91177308-0d34-0410-b5e6-96231b3b80d8
122 lines
4.3 KiB
C++
122 lines
4.3 KiB
C++
//===-- AMDGPUTargetTransformInfo.cpp - AMDGPU specific TTI pass ---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// \file
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// This file implements a TargetTransformInfo analysis pass specific to the
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// AMDGPU target machine. It uses the target's detailed information to provide
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// more precise answers to certain TTI queries, while letting the target
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// independent and default TTI implementations handle the rest.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "AMDGPUtti"
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#include "AMDGPU.h"
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#include "AMDGPUTargetMachine.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/CostTable.h"
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#include "llvm/Target/TargetLowering.h"
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using namespace llvm;
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// Declare the pass initialization routine locally as target-specific passes
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// don't have a target-wide initialization entry point, and so we rely on the
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// pass constructor initialization.
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namespace llvm {
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void initializeAMDGPUTTIPass(PassRegistry &);
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}
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namespace {
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class AMDGPUTTI final : public ImmutablePass, public TargetTransformInfo {
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const AMDGPUTargetMachine *TM;
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const AMDGPUSubtarget *ST;
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const AMDGPUTargetLowering *TLI;
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/// Estimate the overhead of scalarizing an instruction. Insert and Extract
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/// are set if the result needs to be inserted and/or extracted from vectors.
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unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const;
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public:
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AMDGPUTTI() : ImmutablePass(ID), TM(0), ST(0), TLI(0) {
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llvm_unreachable("This pass cannot be directly constructed");
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}
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AMDGPUTTI(const AMDGPUTargetMachine *TM)
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: ImmutablePass(ID), TM(TM), ST(TM->getSubtargetImpl()),
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TLI(TM->getTargetLowering()) {
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initializeAMDGPUTTIPass(*PassRegistry::getPassRegistry());
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}
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virtual void initializePass() override { pushTTIStack(this); }
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virtual void getAnalysisUsage(AnalysisUsage &AU) const override {
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TargetTransformInfo::getAnalysisUsage(AU);
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}
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/// Pass identification.
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static char ID;
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/// Provide necessary pointer adjustments for the two base classes.
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virtual void *getAdjustedAnalysisPointer(const void *ID) override {
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if (ID == &TargetTransformInfo::ID)
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return (TargetTransformInfo *)this;
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return this;
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}
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virtual bool hasBranchDivergence() const override;
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virtual void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) const;
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/// @}
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};
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} // end anonymous namespace
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INITIALIZE_AG_PASS(AMDGPUTTI, TargetTransformInfo, "AMDGPUtti",
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"AMDGPU Target Transform Info", true, true, false)
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char AMDGPUTTI::ID = 0;
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ImmutablePass *
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llvm::createAMDGPUTargetTransformInfoPass(const AMDGPUTargetMachine *TM) {
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return new AMDGPUTTI(TM);
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}
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bool AMDGPUTTI::hasBranchDivergence() const { return true; }
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void AMDGPUTTI::getUnrollingPreferences(Loop *L,
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UnrollingPreferences &UP) const {
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for (Loop::block_iterator BI = L->block_begin(), BE = L->block_end();
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BI != BE; ++BI) {
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BasicBlock *BB = *BI;
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for (BasicBlock::const_iterator I = BB->begin(), E = BB->end();
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I != E; ++I) {
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const GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(I);
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if (!GEP)
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continue;
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const Value *Ptr = GEP->getPointerOperand();
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const AllocaInst *Alloca = dyn_cast<AllocaInst>(GetUnderlyingObject(Ptr));
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if (Alloca) {
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// We want to do whatever we can to limit the number of alloca
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// instructions that make it through to the code generator. allocas
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// require us to use indirect addressing, which is slow and prone to
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// compiler bugs. If this loop does an address calculation on an
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// alloca ptr, then we want to use a higher than normal loop unroll
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// threshold. This will give SROA a better chance to eliminate these
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// allocas.
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//
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// Don't use the maximum allowed value here as it will make some
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// programs way too big.
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UP.Threshold = 500;
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}
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}
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}
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}
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