Rafael Espindola 27c4ba16ae Add this test back for Darwin. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129607 91177308-0d34-0410-b5e6-96231b3b80d8		2011-04-15 21:06:27 +00:00
..
Alpha
ARM	The AND instruction leaves the V flag unmodified, so it falls victim to the same	2011-04-15 20:45:00 +00:00
Blackfin
CBackend
CellSPU	don't test for codegen of 'store undef'	2011-04-09 02:31:26 +00:00
CPP
Generic	Fix a bug where RecursivelyDeleteTriviallyDeadInstructions could	2011-04-09 07:05:44 +00:00
MBlaze	Add scheduling information for the MBlaze backend.	2011-04-11 22:31:52 +00:00
Mips	Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.	2011-04-15 19:52:08 +00:00
MSP430
PowerPC
PTX
SPARC
SystemZ
Thumb	Follow up on r127913. Fix Thumb revsh isel. rdar://9286766	2011-04-14 23:27:44 +00:00
Thumb2	Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.	2011-04-13 00:38:32 +00:00
X86	Add this test back for Darwin.	2011-04-15 21:06:27 +00:00
XCore