Chad Rosier 6c4ec69c6b [ARM64] Ports the Cortex-A53 Machine Model description from AArch64. ... Summary: This port includes the rudimentary latencies that were provided for the Cortex-A53 Machine Model in the AArch64 backend. It also changes the SchedAlias for COPY in the Cyclone model to an explicit WriteRes mapping to avoid conflicts in other subtargets. Differential Revision: http://reviews.llvm.org/D3427 Patch by Dave Estes <cestes@codeaurora.org>! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206652 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-18 21:22:04 +00:00
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Analysis	Revert "blockfreq: Rewrite BlockFrequencyInfoImpl" (#2)	2014-04-18 17:56:08 +00:00
Assembler
Bindings
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CodeGen	[ARM64] Ports the Cortex-A53 Machine Model description from AArch64.	2014-04-18 21:22:04 +00:00
DebugInfo	Change argument order and add explanatory comment to r206130	2014-04-14 22:23:06 +00:00
ExecutionEngine
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Instrumentation	[msan] Add -msan-instrumentation-with-call-threshold.	2014-04-18 12:17:20 +00:00
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MC	Revert r206565 (and r206566 which updated tests).	2014-04-18 09:35:51 +00:00
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TableGen
tools	tools: fix invalid printing, buffer overrun in llvm-readobj	2014-04-16 04:15:29 +00:00
Transforms	Add missing config file for newly added test case introduced by r206563.	2014-04-18 09:05:50 +00:00
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