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f9df477221
While the v4i32 shl operation is already vectorized using a cvttps2dq/pmulld pattern, the lshr/ashr opeations are still scalarized. This patch adds vectorization support for non-uniform v4i32 shift operations - it splats constant shift amounts to allow them to use the immediate sse shift instructions, or extracts/zero-extends non-constant shift amounts. The individual results are then blended together. Differential Revision: http://reviews.llvm.org/D11063 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241989 91177308-0d34-0410-b5e6-96231b3b80d8 |
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AssumptionCache | ||
BasicAA | ||
BlockFrequencyInfo | ||
BranchProbabilityInfo | ||
CallGraph | ||
CFLAliasAnalysis | ||
CostModel | ||
Delinearization | ||
DependenceAnalysis | ||
DivergenceAnalysis/NVPTX | ||
Dominators | ||
GlobalsModRef | ||
LazyCallGraph | ||
Lint | ||
LoopAccessAnalysis | ||
LoopInfo | ||
MemoryDependenceAnalysis | ||
PostDominators | ||
RegionInfo | ||
ScalarEvolution | ||
ScopedNoAliasAA | ||
TypeBasedAliasAnalysis | ||
ValueTracking |