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https://github.com/c64scene-ar/llvm-6502.git
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61ffda59f9
This turned up after r235333, but was a pre-existing bug. The optimization which transforms select(c, load, load) into a load of a select of the addresses does not handle indexed loads (pre/post inc/dec). However, it did not check for them either, leading to a crash if it tried to transform one of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235497 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
2.2 KiB
LLVM
64 lines
2.2 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-bgq-linux"
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%t1 = type { %t2*, %t3* }
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%t2 = type <{ %t3*, i32, [4 x i8] }>
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%t3 = type { %t3* }
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@_ZN4Foam10SLListBase13endConstIter_E = external global %t1
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define void @_ZN4FoamrsIbEERNS_7IstreamES2_RNS_4ListIT_EE() #0 {
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entry:
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switch i32 undef, label %if.else82 [
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i32 9, label %if.then
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i32 6, label %invoke.cont10
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i32 1, label %invoke.cont61
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]
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if.then: ; preds = %entry
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unreachable
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invoke.cont10: ; preds = %entry
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unreachable
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invoke.cont61: ; preds = %entry
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br i1 undef, label %if.end75, label %if.then64
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if.then64: ; preds = %invoke.cont61
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unreachable
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if.end75: ; preds = %invoke.cont61
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br i1 undef, label %if.then17.i, label %if.then.i181
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if.then.i181: ; preds = %if.end75
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unreachable
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if.then17.i: ; preds = %if.end75
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%tobool.i.i.i = icmp eq i32 undef, 0
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%0 = load i64*, i64** undef, align 8
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%agg.tmp.sroa.3.0.copyload33.in.i = select i1 %tobool.i.i.i, i64* bitcast (%t3** getelementptr inbounds (%t1, %t1* @_ZN4Foam10SLListBase13endConstIter_E, i64 0, i32 1) to i64*), i64* %0
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%agg.tmp.sroa.3.0.copyload33.i = load i64, i64* %agg.tmp.sroa.3.0.copyload33.in.i, align 8
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%1 = inttoptr i64 %agg.tmp.sroa.3.0.copyload33.i to %t3*
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%2 = load %t3*, %t3** getelementptr inbounds (%t1, %t1* @_ZN4Foam10SLListBase13endConstIter_E, i64 0, i32 1), align 8
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%cmp.i37.i = icmp eq %t3* %1, %2
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br i1 %cmp.i37.i, label %invoke.cont79, label %for.body.lr.ph.i
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; CHECK-LABEL: @_ZN4FoamrsIbEERNS_7IstreamES2_RNS_4ListIT_EE
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for.body.lr.ph.i: ; preds = %if.then17.i
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br label %for.body.i
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for.body.i: ; preds = %for.body.i, %for.body.lr.ph.i
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br i1 undef, label %invoke.cont79, label %for.body.i
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invoke.cont79: ; preds = %for.body.i, %if.then17.i
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unreachable
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if.else82: ; preds = %entry
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ret void
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}
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attributes #0 = { "target-cpu"="a2q" }
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