Sanjoy Das 7f0da20b97 Fix PR22179. ... We were incorrectly inferring nsw for certain SCEVs. We can be more aggressive here (see Richard Smith's comment on http://llvm.org/bugs/show_bug.cgi?id=22179) but this change just focuses on correctness. Differential Revision: http://reviews.llvm.org/D6914 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225591 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-10 23:41:24 +00:00
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AArch64	Fix PR22179.	2015-01-10 23:41:24 +00:00
ARM	Fix large stack alignment codegen for ARM and Thumb2 targets	2015-01-08 15:09:14 +00:00
CPP
Generic	CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.	2014-12-19 20:50:07 +00:00
Hexagon	[Hexagon] Adding dealloc_return encoding and absolute address stores.	2015-01-06 16:15:15 +00:00
Inputs	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Mips	[mips] Add support for accessing $gp as a named register.	2015-01-09 17:21:30 +00:00
MSP430
NVPTX	[NVPTX] Fix bugs related to isSingleValueType	2014-12-17 17:59:04 +00:00
PowerPC	[PowerPC] Mark zext of a small scalar load as free	2015-01-10 08:21:59 +00:00
R600	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
SPARC	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
SystemZ	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Thumb	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Thumb2	[ARM] Fix a bug in constant island pass that was triggering an assertion.	2015-01-08 20:44:50 +00:00
X86	Fix PR22179.	2015-01-10 23:41:24 +00:00
XCore	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00