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https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22520 91177308-0d34-0410-b5e6-96231b3b80d8
382 lines
14 KiB
C++
382 lines
14 KiB
C++
//===-- SparcV9RegInfo.h - SparcV9 Target Register Info ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is used to describe the register file of the SparcV9 target to
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// its register allocator.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARCV9REGINFO_H
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#define SPARCV9REGINFO_H
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#include "llvm/ADT/hash_map"
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#include <string>
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#include <cassert>
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namespace llvm {
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class TargetMachine;
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class IGNode;
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class Type;
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class Value;
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class LiveRangeInfo;
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class Function;
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class V9LiveRange;
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class AddedInstrns;
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class MachineInstr;
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class BasicBlock;
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class SparcV9TargetMachine;
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///----------------------------------------------------------------------------
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/// Interface to description of machine register class (e.g., int reg class
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/// float reg class etc)
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///
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class TargetRegClassInfo {
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protected:
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const unsigned RegClassID; // integer ID of a reg class
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const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
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const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
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public:
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virtual ~TargetRegClassInfo() {}
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inline unsigned getRegClassID() const { return RegClassID; }
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inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
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inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
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// This method marks the registers used for a given register number.
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// This defaults to marking a single register but may mark multiple
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// registers when a single number denotes paired registers.
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//
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virtual void markColorsUsed(unsigned RegInClass,
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int UserRegType,
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int RegTypeWanted,
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std::vector<bool> &IsColorUsedArr) const {
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assert(RegInClass < NumOfAllRegs && RegInClass < IsColorUsedArr.size());
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assert(UserRegType == RegTypeWanted &&
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"Default method is probably incorrect for class with multiple types.");
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IsColorUsedArr[RegInClass] = true;
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}
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// This method finds unused registers of the specified register type,
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// using the given "used" flag array IsColorUsedArr. It defaults to
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// checking a single entry in the array directly, but that can be overridden
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// for paired registers and other such silliness.
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// It returns -1 if no unused color is found.
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//
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virtual int findUnusedColor(int RegTypeWanted,
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const std::vector<bool> &IsColorUsedArr) const {
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// find first unused color in the IsColorUsedArr directly
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unsigned NC = this->getNumOfAvailRegs();
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assert(IsColorUsedArr.size() >= NC && "Invalid colors-used array");
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for (unsigned c = 0; c < NC; c++)
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if (!IsColorUsedArr[c])
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return c;
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return -1;
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}
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// This method should find a color which is not used by neighbors
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// (i.e., a false position in IsColorUsedArr) and
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virtual void colorIGNode(IGNode *Node,
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const std::vector<bool> &IsColorUsedArr) const = 0;
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// Check whether a specific register is volatile, i.e., whether it is not
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// preserved across calls
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virtual bool isRegVolatile(int Reg) const = 0;
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// Check whether a specific register is modified as a side-effect of the
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// call instruction itself,
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virtual bool modifiedByCall(int Reg) const { return false; }
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virtual const char* const getRegName(unsigned reg) const = 0;
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TargetRegClassInfo(unsigned ID, unsigned NVR, unsigned NAR)
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: RegClassID(ID), NumOfAvailRegs(NVR), NumOfAllRegs(NAR) {}
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};
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/// SparcV9RegInfo - Interface to register info of SparcV9 target machine
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///
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class SparcV9RegInfo {
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SparcV9RegInfo(const SparcV9RegInfo &); // DO NOT IMPLEMENT
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void operator=(const SparcV9RegInfo &); // DO NOT IMPLEMENT
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protected:
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// A vector of all machine register classes
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//
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std::vector<const TargetRegClassInfo *> MachineRegClassArr;
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public:
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const TargetMachine ⌖
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// A register can be initialized to an invalid number. That number can
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// be obtained using this method.
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//
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static int getInvalidRegNum() { return -1; }
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// According the definition of a MachineOperand class, a Value in a
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// machine instruction can go into either a normal register or a
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// condition code register. If isCCReg is true below, the ID of the condition
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// code register class will be returned. Otherwise, the normal register
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// class (eg. int, float) must be returned.
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// To find the register class used for a specified Type
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//
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unsigned getRegClassIDOfType (const Type *type,
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bool isCCReg = false) const;
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// To find the register class to which a specified register belongs
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//
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unsigned getRegClassIDOfRegType(int regType) const;
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unsigned getRegClassIDOfReg(int unifiedRegNum) const {
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unsigned classId = 0;
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(void) getClassRegNum(unifiedRegNum, classId);
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return classId;
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}
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unsigned int getNumOfRegClasses() const {
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return MachineRegClassArr.size();
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}
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const TargetRegClassInfo *getMachineRegClass(unsigned i) const {
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return MachineRegClassArr[i];
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}
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// getZeroRegNum - returns the register that is hardwired to always contain
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// zero, if any (-1 if none). This is the unified register number.
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//
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unsigned getZeroRegNum() const;
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// The following methods are used to color special live ranges (e.g.
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// method args and return values etc.) with specific hardware registers
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// as required. See SparcRegInfo.cpp for the implementation for Sparc.
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//
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void suggestRegs4MethodArgs(const Function *Func,
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LiveRangeInfo& LRI) const;
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void suggestRegs4CallArgs(MachineInstr *CallI,
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LiveRangeInfo& LRI) const;
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void suggestReg4RetValue(MachineInstr *RetI,
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LiveRangeInfo& LRI) const;
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void colorMethodArgs(const Function *Func,
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LiveRangeInfo &LRI,
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std::vector<MachineInstr*>& InstrnsBefore,
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std::vector<MachineInstr*>& InstrnsAfter) const;
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// Check whether a specific register is volatile, i.e., whether it is not
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// preserved across calls
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inline bool isRegVolatile(int RegClassID, int Reg) const {
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return MachineRegClassArr[RegClassID]->isRegVolatile(Reg);
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}
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// Check whether a specific register is modified as a side-effect of the
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// call instruction itself,
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inline bool modifiedByCall(int RegClassID, int Reg) const {
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return MachineRegClassArr[RegClassID]->modifiedByCall(Reg);
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}
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// getCallAddressReg - Returns the reg used for pushing the address
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// when a method is called. This can be used for other purposes
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// between calls
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//
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unsigned getCallAddressReg() const;
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// Each register class has a separate space for register IDs. To convert
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// a regId in a register class to a common Id, or vice versa,
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// we use the folloing two methods.
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//
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// This method converts from class reg. number to unified register number.
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int getUnifiedRegNum(unsigned regClassID, int reg) const {
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if (reg == getInvalidRegNum()) { return getInvalidRegNum(); }
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assert(regClassID < getNumOfRegClasses() && "Invalid register class");
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int totalRegs = 0;
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for (unsigned rcid = 0; rcid < regClassID; ++rcid)
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totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs();
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return reg + totalRegs;
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}
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// This method converts the unified number to the number in its class,
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// and returns the class ID in regClassID.
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int getClassRegNum(int uRegNum, unsigned& regClassID) const {
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if (uRegNum == getInvalidRegNum()) { return getInvalidRegNum(); }
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int totalRegs = 0, rcid = 0, NC = getNumOfRegClasses();
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while (rcid < NC &&
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uRegNum>= totalRegs+(int)MachineRegClassArr[rcid]->getNumOfAllRegs())
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{
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totalRegs += MachineRegClassArr[rcid]->getNumOfAllRegs();
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rcid++;
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}
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if (rcid == NC) {
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assert(0 && "getClassRegNum(): Invalid register number");
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return getInvalidRegNum();
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}
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regClassID = rcid;
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return uRegNum - totalRegs;
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}
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// Returns the assembly-language name of the specified machine register.
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//
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const char * const getUnifiedRegName(int UnifiedRegNum) const {
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unsigned regClassID = getNumOfRegClasses(); // initialize to invalid value
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int regNumInClass = getClassRegNum(UnifiedRegNum, regClassID);
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return MachineRegClassArr[regClassID]->getRegName(regNumInClass);
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}
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// This method gives the the number of bytes of stack space allocated
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// to a register when it is spilled to the stack, according to its
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// register type.
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//
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// For SparcV9, currently we allocate 8 bytes on stack for all
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// register types. We can optimize this later if necessary to save stack
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// space (However, should make sure that stack alignment is correct)
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//
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int getSpilledRegSize(int RegType) const {
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return 8;
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}
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private:
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// Number of registers used for passing int args (usually 6: %o0 - %o5)
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//
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unsigned const NumOfIntArgRegs;
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// Number of registers used for passing float args (usually 32: %f0 - %f31)
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//
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unsigned const NumOfFloatArgRegs;
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// The following methods are used to color special live ranges (e.g.
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// function args and return values etc.) with specific hardware registers
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// as required. See SparcV9RegInfo.cpp for the implementation.
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//
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void suggestReg4RetAddr(MachineInstr *RetMI,
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LiveRangeInfo &LRI) const;
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void suggestReg4CallAddr(MachineInstr *CallMI, LiveRangeInfo &LRI) const;
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// Helper used by the all the getRegType() functions.
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int getRegTypeForClassAndType(unsigned regClassID, const Type* type) const;
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public:
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// Type of registers available in SparcV9. There can be several reg types
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// in the same class. For instace, the float reg class has Single/Double
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// types
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//
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enum RegTypes {
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IntRegType,
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FPSingleRegType,
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FPDoubleRegType,
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IntCCRegType,
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FloatCCRegType,
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SpecialRegType
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};
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// The actual register classes in the SparcV9
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//
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// **** WARNING: If this enum order is changed, also modify
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// getRegisterClassOfValue method below since it assumes this particular
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// order for efficiency.
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//
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enum RegClassIDs {
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IntRegClassID, // Integer
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FloatRegClassID, // Float (both single/double)
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IntCCRegClassID, // Int Condition Code
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FloatCCRegClassID, // Float Condition code
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SpecialRegClassID // Special (unallocated) registers
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};
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SparcV9RegInfo(const SparcV9TargetMachine &tgt);
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~SparcV9RegInfo() {
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for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i)
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delete MachineRegClassArr[i];
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}
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// Returns the register containing the return address.
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// It should be made sure that this register contains the return
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// value when a return instruction is reached.
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//
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unsigned getReturnAddressReg() const;
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// Number of registers used for passing int args (usually 6: %o0 - %o5)
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// and float args (usually 32: %f0 - %f31)
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//
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unsigned const getNumOfIntArgRegs() const { return NumOfIntArgRegs; }
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unsigned const getNumOfFloatArgRegs() const { return NumOfFloatArgRegs; }
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// Compute which register can be used for an argument, if any
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//
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int regNumForIntArg(bool inCallee, bool isVarArgsCall,
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unsigned argNo, unsigned& regClassId) const;
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int regNumForFPArg(unsigned RegType, bool inCallee, bool isVarArgsCall,
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unsigned argNo, unsigned& regClassId) const;
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// method used for printing a register for debugging purposes
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//
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void printReg(const V9LiveRange *LR) const;
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// To obtain the return value and the indirect call address (if any)
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// contained in a CALL machine instruction
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//
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const Value * getCallInstRetVal(const MachineInstr *CallMI) const;
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const Value * getCallInstIndirectAddrVal(const MachineInstr *CallMI) const;
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// The following methods are used to generate "copy" machine instructions
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// for an architecture. Currently they are used in TargetRegClass
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// interface. However, they can be moved to TargetInstrInfo interface if
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// necessary.
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//
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// The function regTypeNeedsScratchReg() can be used to check whether a
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// scratch register is needed to copy a register of type `regType' to
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// or from memory. If so, such a scratch register can be provided by
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// the caller (e.g., if it knows which regsiters are free); otherwise
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// an arbitrary one will be chosen and spilled by the copy instructions.
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// If a scratch reg is needed, the reg. type that must be used
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// for scratch registers is returned in scratchRegType.
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//
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bool regTypeNeedsScratchReg(int RegType,
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int& scratchRegClassId) const;
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void cpReg2RegMI(std::vector<MachineInstr*>& mvec,
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unsigned SrcReg, unsigned DestReg,
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int RegType) const;
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void cpReg2MemMI(std::vector<MachineInstr*>& mvec,
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unsigned SrcReg, unsigned DestPtrReg,
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int Offset, int RegType, int scratchReg = -1) const;
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void cpMem2RegMI(std::vector<MachineInstr*>& mvec,
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unsigned SrcPtrReg, int Offset, unsigned DestReg,
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int RegType, int scratchReg = -1) const;
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void cpValue2Value(Value *Src, Value *Dest,
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std::vector<MachineInstr*>& mvec) const;
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// Get the register type for a register identified different ways.
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// Note that getRegTypeForLR(LR) != getRegTypeForDataType(LR->getType())!
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// The reg class of a LR depends both on the Value types in it and whether
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// they are CC registers or not (for example).
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int getRegTypeForDataType(const Type* type) const;
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int getRegTypeForLR(const V9LiveRange *LR) const;
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int getRegType(int unifiedRegNum) const;
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unsigned getFramePointer() const;
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unsigned getStackPointer() const;
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};
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} // End llvm namespace
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#endif // SPARCV9REGINFO_H
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