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https://github.com/c64scene-ar/llvm-6502.git
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11db068721
memory and synchronization barrier dmb and dsb instructions. - Change instruction names to something more sensible (matching name of actual instructions). - Added tests for memory barrier codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110785 91177308-0d34-0410-b5e6-96231b3b80d8
18 lines
408 B
LLVM
18 lines
408 B
LLVM
; RUN: llc < %s -march=thumb -mcpu=cortex-a8 | FileCheck %s
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declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1 )
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define void @t1() {
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; CHECK: t1:
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; CHECK: dsb
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call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 true )
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ret void
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}
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define void @t2() {
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; CHECK: t2:
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; CHECK: dmb
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call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 false )
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ret void
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}
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