Richard Sandiford 6cf3cfa0ab [SystemZ] Improve spilling of LGDR and LDGR ... If the source of these instructions is spilled we should load the destination. If the destination is spilled we should store the source. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186147 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-12 08:37:17 +00:00
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AArch64	AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all	2013-07-09 18:16:56 +00:00
ARM	Add a comment to this change, requested by Eric Christopher.	2013-07-08 19:52:51 +00:00
CPP
Generic	Debug Info: clean up usage of Verify.	2013-06-28 05:43:10 +00:00
Hexagon
Inputs
MBlaze
Mips	[mips] Fix test case to check that mips64 instructions are generated.	2013-07-01 20:18:58 +00:00
MSP430	Really fix the test. Sorry for the breakage...	2013-07-01 19:51:36 +00:00
NVPTX	[NVPTX] Add support for module-scope inline asm	2013-07-01 13:00:14 +00:00
PowerPC	PPC: Add some missing V_SET0 patterns	2013-07-11 17:43:32 +00:00
R600	R600/SI: Initial local memory support	2013-07-10 16:37:07 +00:00
SI
SPARC	Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.	2013-06-17 19:00:36 +00:00
SystemZ	[SystemZ] Improve spilling of LGDR and LDGR	2013-07-12 08:37:17 +00:00
Thumb
Thumb2	ARM: Fix incorrect pack pattern for thumb2	2013-07-09 22:59:22 +00:00
X86	Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.	2013-07-12 06:02:35 +00:00
XCore	[XCore] Add ISel pattern for LDWCP	2013-07-03 07:48:50 +00:00