Akira Hatanaka 614051a1c5 Fix handling of double precision loads and stores when Mips1 is targeted. ... Mips1 does not support double precision loads or stores, therefore two single precision loads or stores must be used in place of these instructions. This patch treats double precision loads and stores as if they are legal instructions until MCInstLowering, instead of generating the single precision instructions during instruction selection or Prolog/Epilog code insertion. Without the changes made in this patch, llc produces code that has the same problem described in r137484 or bails out when MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8		2011-08-16 03:51:51 +00:00
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Assembler	Move "atomic" and "volatile" designations on instructions after the opcode	2011-08-12 22:50:01 +00:00
Bindings/Ocaml	Remove the build_unwind function from the OCaml bindings.	2011-08-10 01:10:17 +00:00
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CodeGen	Fix handling of double precision loads and stores when Mips1 is targeted.	2011-08-16 03:51:51 +00:00
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FrontendC++	Fix test.	2011-08-13 17:06:34 +00:00
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MC	Add a test file for Thumb2 NEON.	2011-08-15 23:42:20 +00:00
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Transforms	Fix test.	2011-08-16 01:42:56 +00:00
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