Rafael Espindola 6d9fd9bc70 Make it clear where the relocations we are CHECKING are from. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235018 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-15 16:45:03 +00:00
..
AArch64	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
ARM	Make it clear where the relocations we are CHECKING are from.	2015-04-15 16:45:03 +00:00
AsmParser
COFF
Disassembler	[AArch64] Allow non-standard INS/DUP encodings	2015-04-14 15:07:26 +00:00
ELF	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
Hexagon	Expand MUX instructions early on Hexagon	2015-03-31 13:35:12 +00:00
MachO	MC: For variable symbols, maintain MCSymbol::Section as a cache.	2015-04-03 01:46:11 +00:00
Markup
Mips	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
PowerPC	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
R600	R600/SI: Initial support for assembler and inline assembly	2015-04-08 01:09:26 +00:00
Sparc
SystemZ	[SystemZ] Support transactional execution on zEC12	2015-04-01 12:51:43 +00:00
X86	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00