Jack Carter 42faefc11d This patch moves from using a hard coded number (4) ... for the number of bytes in a particular instruction to using const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); Desc.getSize() This is necessary with the advent of 16 bit instructions with mips16 and micromips. It is also puts Mips in compliance with the other targets for getting instruction size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165171 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-03 21:58:54 +00:00
..
CMakeLists.txt	The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.	2012-10-02 23:09:40 +00:00
LLVMBuild.txt
Makefile
MipsAsmBackend.cpp	When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend	2012-09-18 16:08:49 +00:00
MipsBaseInfo.h	Add case clauses for returning dsp accumulator encoding values in function	2012-09-26 19:27:24 +00:00
MipsDirectObjLower.cpp	The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.	2012-10-02 23:09:40 +00:00
MipsDirectObjLower.h	The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.	2012-10-02 23:09:40 +00:00
MipsELFObjectWriter.cpp
MipsFixupKinds.h
MipsMCAsmInfo.cpp
MipsMCAsmInfo.h
MipsMCCodeEmitter.cpp	This patch moves from using a hard coded number (4)	2012-10-03 21:58:54 +00:00
MipsMCTargetDesc.cpp
MipsMCTargetDesc.h	When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend	2012-09-18 16:08:49 +00:00