llvm-6502/test/CodeGen
Matt Arsenault 6e6318f148 Add target hook for whether it is profitable to reduce load widths
Add an option to disable optimization to shrink truncated larger type
loads to smaller type loads. On SI this prevents using scalar load
instructions in some cases, since there are no scalar extloads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224084 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 00:00:24 +00:00
..
AArch64 [AArch64] MachO large code-model: Materialize FP constants in code. 2014-12-10 19:43:32 +00:00
ARM ARM: correctly expand LDR-lit based globals. 2014-12-10 23:40:50 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][microMIPS] Implement CodeGen support for LI16 instruction. 2014-12-11 13:56:23 +00:00
MSP430
NVPTX IR: Canonicalize metadata formatting, NFC 2014-12-11 06:32:29 +00:00
PowerPC [PowerPC] Better lowering for add/or of a FrameIndex 2014-12-11 22:51:06 +00:00
R600 Add target hook for whether it is profitable to reduce load widths 2014-12-12 00:00:24 +00:00
SPARC
SystemZ
Thumb Re-add support to llvm-objdump for Mach-O universal files and archives with -macho 2014-12-04 23:56:27 +00:00
Thumb2
X86 [X86] Add a temporary testcase for PR21876/r223996. 2014-12-11 23:07:52 +00:00
XCore