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https://github.com/c64scene-ar/llvm-6502.git
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9243c4f7c5
LSR can fold three addressing modes into its ICmpZero node: ICmpZero BaseReg + Offset => ICmp BaseReg, -Offset ICmpZero -1*ScaleReg + Offset => ICmp ScaleReg, Offset ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg The first two cases are only used if TLI->isLegalICmpImmediate() likes the offset. Make sure the right Offset sign is passed to this method in the second case. The ARM version is not symmetric. <rdar://problem/11184260> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154079 91177308-0d34-0410-b5e6-96231b3b80d8
68 lines
2.4 KiB
LLVM
68 lines
2.4 KiB
LLVM
; RUN: llc -mtriple=thumbv7-apple-ios -disable-code-place < %s | FileCheck %s
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; RUN: llc -mtriple=armv7-apple-ios -disable-code-place < %s | FileCheck %s
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; LLVM IR optimizers canonicalize icmp+select this way.
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; Make sure that TwoAddressInstructionPass can commute the corresponding
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; MOVCC instructions to avoid excessive copies in one of the if blocks.
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;
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; CHECK: %if.then
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; CHECK-NOT: mov
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; CHECK: movlo
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; CHECK: movlo
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; CHECK-NOT: mov
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; CHECK: %if.else
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; CHECK-NOT: mov
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; CHECK: movls
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; CHECK: movls
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; CHECK-NOT: mov
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; This is really an LSR test: Make sure that cmp is using the incremented
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; induction variable.
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; CHECK: %if.end8
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; CHECK: add{{(s|\.w)?}} [[IV:r[0-9]+]], {{.*}}#1
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; CHECK: cmp [[IV]], #
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define i32 @f(i32* nocapture %a, i32 %Pref) nounwind ssp {
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entry:
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br label %for.body
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for.body: ; preds = %entry, %if.end8
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%i.012 = phi i32 [ 0, %entry ], [ %inc, %if.end8 ]
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%BestCost.011 = phi i32 [ -1, %entry ], [ %BestCost.1, %if.end8 ]
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%BestIdx.010 = phi i32 [ 0, %entry ], [ %BestIdx.1, %if.end8 ]
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%arrayidx = getelementptr inbounds i32* %a, i32 %i.012
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%0 = load i32* %arrayidx, align 4, !tbaa !0
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%mul = mul i32 %0, %0
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%sub = add nsw i32 %i.012, -5
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%cmp2 = icmp eq i32 %sub, %Pref
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br i1 %cmp2, label %if.else, label %if.then
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if.then: ; preds = %for.body
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%cmp3 = icmp ult i32 %mul, %BestCost.011
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%i.0.BestIdx.0 = select i1 %cmp3, i32 %i.012, i32 %BestIdx.010
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%mul.BestCost.0 = select i1 %cmp3, i32 %mul, i32 %BestCost.011
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br label %if.end8
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if.else: ; preds = %for.body
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%cmp5 = icmp ugt i32 %mul, %BestCost.011
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%BestIdx.0.i.0 = select i1 %cmp5, i32 %BestIdx.010, i32 %i.012
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%BestCost.0.mul = select i1 %cmp5, i32 %BestCost.011, i32 %mul
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br label %if.end8
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if.end8: ; preds = %if.else, %if.then
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%BestIdx.1 = phi i32 [ %i.0.BestIdx.0, %if.then ], [ %BestIdx.0.i.0, %if.else ]
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%BestCost.1 = phi i32 [ %mul.BestCost.0, %if.then ], [ %BestCost.0.mul, %if.else ]
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store i32 %mul, i32* %arrayidx, align 4, !tbaa !0
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%inc = add i32 %i.012, 1
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%cmp = icmp eq i32 %inc, 11
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br i1 %cmp, label %for.end, label %for.body
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for.end: ; preds = %if.end8
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ret i32 %BestIdx.1
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}
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!0 = metadata !{metadata !"int", metadata !1}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
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