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https://github.com/c64scene-ar/llvm-6502.git
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6d9e62f432
Summary: This is instead of doing this in target independent code and is the last non-functional change before targets begin to distinguish between different memory constraints when selecting code for the ISD::INLINEASM node. Next, each target will individually move away from the idea that all memory constraints behave like 'm'. Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D8173 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232373 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
InstPrinter | ||
MCTargetDesc | ||
TargetInfo | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile | ||
MSP430.h | ||
MSP430.td | ||
MSP430AsmPrinter.cpp | ||
MSP430BranchSelector.cpp | ||
MSP430CallingConv.td | ||
MSP430FrameLowering.cpp | ||
MSP430FrameLowering.h | ||
MSP430InstrFormats.td | ||
MSP430InstrInfo.cpp | ||
MSP430InstrInfo.h | ||
MSP430InstrInfo.td | ||
MSP430ISelDAGToDAG.cpp | ||
MSP430ISelLowering.cpp | ||
MSP430ISelLowering.h | ||
MSP430MachineFunctionInfo.cpp | ||
MSP430MachineFunctionInfo.h | ||
MSP430MCInstLower.cpp | ||
MSP430MCInstLower.h | ||
MSP430RegisterInfo.cpp | ||
MSP430RegisterInfo.h | ||
MSP430RegisterInfo.td | ||
MSP430SelectionDAGInfo.cpp | ||
MSP430SelectionDAGInfo.h | ||
MSP430Subtarget.cpp | ||
MSP430Subtarget.h | ||
MSP430TargetMachine.cpp | ||
MSP430TargetMachine.h | ||
README.txt |
//===---------------------------------------------------------------------===// // MSP430 backend. //===---------------------------------------------------------------------===// DISCLAIMER: Thid backend should be considered as highly experimental. I never seen nor worked with this MCU, all information was gathered from datasheet only. The original intention of making this backend was to write documentation of form "How to write backend for dummies" :) Thes notes hopefully will be available pretty soon. Some things are incomplete / not implemented yet (this list surely is not complete as well): 1. Verify, how stuff is handling implicit zext with 8 bit operands (this might be modelled currently in improper way - should we need to mark the superreg as def for every 8 bit instruction?). 2. Libcalls: multiplication, division, remainder. Note, that calling convention for libcalls is incomptible with calling convention of libcalls of msp430-gcc (these cannot be used though due to license restriction). 3. Implement multiplication / division by constant (dag combiner hook?). 4. Implement non-constant shifts. 5. Implement varargs stuff. 6. Verify and fix (if needed) how's stuff playing with i32 / i64. 7. Implement floating point stuff (softfp?) 8. Implement instruction encoding for (possible) direct code emission in the future. 9. Since almost all instructions set flags - implement brcond / select in better way (currently they emit explicit comparison). 10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td) 11. Implement hooks for better memory op folding, etc.