mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
618 lines
24 KiB
C++
618 lines
24 KiB
C++
//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
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//
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// This register allocator allocates registers to a basic block at a time,
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// attempting to keep values in registers and reusing registers as appropriate.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "Support/Statistic.h"
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#include "Support/CommandLine.h"
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#include <iostream>
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namespace {
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Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
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Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
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cl::opt<bool> DisableKill("no-kill", cl::Hidden,
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cl::desc("Disable register kill in local-ra"));
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class RA : public MachineFunctionPass {
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const TargetMachine *TM;
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MachineFunction *MF;
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const MRegisterInfo *RegInfo;
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LiveVariables *LV;
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// StackSlotForVirtReg - Maps SSA Regs => frame index where these values are
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// spilled
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std::map<unsigned, int> StackSlotForVirtReg;
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// Virt2PhysRegMap - This map contains entries for each virtual register
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// that is currently available in a physical register.
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//
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std::map<unsigned, unsigned> Virt2PhysRegMap;
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// PhysRegsUsed - This map contains entries for each physical register that
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// currently has a value (ie, it is in Virt2PhysRegMap). The value mapped
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// to is the virtual register corresponding to the physical register (the
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// inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this
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// register is pinned because it is used by a future instruction.
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//
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std::map<unsigned, unsigned> PhysRegsUsed;
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// PhysRegsUseOrder - This contains a list of the physical registers that
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// currently have a virtual register value in them. This list provides an
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// ordering of registers, imposing a reallocation order. This list is only
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// used if all registers are allocated and we have to spill one, in which
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// case we spill the least recently used register. Entries at the front of
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// the list are the least recently used registers, entries at the back are
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// the most recently used.
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//
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std::vector<unsigned> PhysRegsUseOrder;
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// VirtRegModified - This bitset contains information about which virtual
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// registers need to be spilled back to memory when their registers are
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// scavenged. If a virtual register has simply been rematerialized, there
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// is no reason to spill it to memory when we need the register back.
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//
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std::vector<bool> VirtRegModified;
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void markVirtRegModified(unsigned Reg, bool Val = true) {
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assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
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Reg -= MRegisterInfo::FirstVirtualRegister;
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if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
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VirtRegModified[Reg] = Val;
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}
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bool isVirtRegModified(unsigned Reg) const {
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assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
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assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
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&& "Illegal virtual register!");
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return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
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}
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void MarkPhysRegRecentlyUsed(unsigned Reg) {
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assert(!PhysRegsUseOrder.empty() && "No registers used!");
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if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
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for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
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if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
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unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
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PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
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// Add it to the end of the list
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PhysRegsUseOrder.push_back(RegMatch);
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if (RegMatch == Reg)
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return; // Found an exact match, exit early
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}
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}
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public:
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virtual const char *getPassName() const {
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return "Local Register Allocator";
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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if (!DisableKill)
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AU.addRequired<LiveVariables>();
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AU.addRequiredID(PHIEliminationID);
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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/// runOnMachineFunction - Register allocate the whole function
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bool runOnMachineFunction(MachineFunction &Fn);
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/// AllocateBasicBlock - Register allocate the specified basic block.
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void AllocateBasicBlock(MachineBasicBlock &MBB);
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/// areRegsEqual - This method returns true if the specified registers are
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/// related to each other. To do this, it checks to see if they are equal
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/// or if the first register is in the alias set of the second register.
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///
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bool areRegsEqual(unsigned R1, unsigned R2) const {
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if (R1 == R2) return true;
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if (const unsigned *AliasSet = RegInfo->getAliasSet(R2))
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for (unsigned i = 0; AliasSet[i]; ++i)
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if (AliasSet[i] == R1) return true;
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return false;
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}
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/// getStackSpaceFor - This returns the frame index of the specified virtual
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/// register on the stack, allocating space if neccesary.
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int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
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void removePhysReg(unsigned PhysReg);
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/// spillVirtReg - This method spills the value specified by PhysReg into
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/// the virtual register slot specified by VirtReg. It then updates the RA
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/// data structures to indicate the fact that PhysReg is now available.
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///
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void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned VirtReg, unsigned PhysReg);
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/// spillPhysReg - This method spills the specified physical register into
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/// the virtual register slot associated with it.
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///
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void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg);
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/// assignVirtToPhysReg - This method updates local state so that we know
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/// that PhysReg is the proper container for VirtReg now. The physical
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/// register must not be used for anything else when this is called.
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///
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void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
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/// liberatePhysReg - Make sure the specified physical register is available
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/// for use. If there is currently a value in it, it is either moved out of
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/// the way or spilled to memory.
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///
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void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg);
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/// isPhysRegAvailable - Return true if the specified physical register is
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/// free and available for use. This also includes checking to see if
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/// aliased registers are all free...
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///
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bool isPhysRegAvailable(unsigned PhysReg) const;
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/// getFreeReg - Look to see if there is a free register available in the
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/// specified register class. If not, return 0.
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///
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unsigned getFreeReg(const TargetRegisterClass *RC);
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/// getReg - Find a physical register to hold the specified virtual
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/// register. If all compatible physical registers are used, this method
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/// spills the last used virtual register to the stack, and uses that
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/// register.
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///
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unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned VirtReg);
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/// reloadVirtReg - This method loads the specified virtual register into a
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/// physical register, returning the physical register chosen. This updates
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/// the regalloc data structures to reflect the fact that the virtual reg is
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/// now alive in a physical register, and the previous one isn't.
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///
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unsigned reloadVirtReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &I, unsigned VirtReg);
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};
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}
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/// getStackSpaceFor - This allocates space for the specified virtual
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/// register to be held on the stack.
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int RA::getStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *RC) {
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// Find the location VirtReg would belong...
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std::map<unsigned, int>::iterator I =
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StackSlotForVirtReg.lower_bound(VirtReg);
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if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
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return I->second; // Already has space allocated?
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// Allocate a new stack object for this spill location...
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int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
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// Assign the slot...
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StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
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return FrameIdx;
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}
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/// removePhysReg - This method marks the specified physical register as no
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/// longer being in use.
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///
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void RA::removePhysReg(unsigned PhysReg) {
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PhysRegsUsed.erase(PhysReg); // PhyReg no longer used
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std::vector<unsigned>::iterator It =
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std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
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assert(It != PhysRegsUseOrder.end() &&
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"Spilled a physical register, but it was not in use list!");
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PhysRegsUseOrder.erase(It);
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}
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/// spillVirtReg - This method spills the value specified by PhysReg into the
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/// virtual register slot specified by VirtReg. It then updates the RA data
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/// structures to indicate the fact that PhysReg is now available.
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///
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void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned VirtReg, unsigned PhysReg) {
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// If this is just a marker register, we don't need to spill it.
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if (VirtReg != 0) {
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const TargetRegisterClass *RegClass =
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MF->getSSARegMap()->getRegClass(VirtReg);
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int FrameIndex = getStackSpaceFor(VirtReg, RegClass);
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// If we need to spill this value, do so now...
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if (isVirtRegModified(VirtReg)) {
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// Add move instruction(s)
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RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RegClass);
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++NumSpilled; // Update statistics
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}
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Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
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}
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removePhysReg(PhysReg);
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}
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/// spillPhysReg - This method spills the specified physical register into the
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/// virtual register slot associated with it.
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///
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void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg) {
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std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg);
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if (PI != PhysRegsUsed.end()) { // Only spill it if it's used!
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spillVirtReg(MBB, I, PI->second, PhysReg);
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} else if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg)) {
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// If the selected register aliases any other registers, we must make
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// sure that one of the aliases isn't alive...
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for (unsigned i = 0; AliasSet[i]; ++i) {
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PI = PhysRegsUsed.find(AliasSet[i]);
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if (PI != PhysRegsUsed.end()) // Spill aliased register...
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spillVirtReg(MBB, I, PI->second, AliasSet[i]);
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}
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}
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}
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/// assignVirtToPhysReg - This method updates local state so that we know
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/// that PhysReg is the proper container for VirtReg now. The physical
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/// register must not be used for anything else when this is called.
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///
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void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
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assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() &&
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"Phys reg already assigned!");
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// Update information to note the fact that this register was just used, and
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// it holds VirtReg.
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PhysRegsUsed[PhysReg] = VirtReg;
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Virt2PhysRegMap[VirtReg] = PhysReg;
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PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
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}
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/// isPhysRegAvailable - Return true if the specified physical register is free
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/// and available for use. This also includes checking to see if aliased
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/// registers are all free...
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///
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bool RA::isPhysRegAvailable(unsigned PhysReg) const {
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if (PhysRegsUsed.count(PhysReg)) return false;
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// If the selected register aliases any other allocated registers, it is
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// not free!
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if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg))
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for (unsigned i = 0; AliasSet[i]; ++i)
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if (PhysRegsUsed.count(AliasSet[i])) // Aliased register in use?
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return false; // Can't use this reg then.
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return true;
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}
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/// getFreeReg - Look to see if there is a free register available in the
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/// specified register class. If not, return 0.
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///
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unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
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// Get iterators defining the range of registers that are valid to allocate in
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// this class, which also specifies the preferred allocation order.
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TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
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TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
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for (; RI != RE; ++RI)
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if (isPhysRegAvailable(*RI)) { // Is reg unused?
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assert(*RI != 0 && "Cannot use register!");
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return *RI; // Found an unused register!
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}
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return 0;
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}
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/// liberatePhysReg - Make sure the specified physical register is available for
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/// use. If there is currently a value in it, it is either moved out of the way
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/// or spilled to memory.
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///
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void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg) {
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// FIXME: This code checks to see if a register is available, but it really
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// wants to know if a reg is available BEFORE the instruction executes. If
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// called after killed operands are freed, it runs the risk of reallocating a
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// used operand...
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#if 0
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if (isPhysRegAvailable(PhysReg)) return; // Already available...
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// Check to see if the register is directly used, not indirectly used through
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// aliases. If aliased registers are the ones actually used, we cannot be
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// sure that we will be able to save the whole thing if we do a reg-reg copy.
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std::map<unsigned, unsigned>::iterator PRUI = PhysRegsUsed.find(PhysReg);
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if (PRUI != PhysRegsUsed.end()) {
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unsigned VirtReg = PRUI->second; // The virtual register held...
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// Check to see if there is a compatible register available. If so, we can
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// move the value into the new register...
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//
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const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
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if (unsigned NewReg = getFreeReg(RC)) {
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// Emit the code to copy the value...
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RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
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// Update our internal state to indicate that PhysReg is available and Reg
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// isn't.
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Virt2PhysRegMap.erase(VirtReg);
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removePhysReg(PhysReg); // Free the physreg
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// Move reference over to new register...
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assignVirtToPhysReg(VirtReg, NewReg);
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return;
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}
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}
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#endif
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spillPhysReg(MBB, I, PhysReg);
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}
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/// getReg - Find a physical register to hold the specified virtual
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/// register. If all compatible physical registers are used, this method spills
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/// the last used virtual register to the stack, and uses that register.
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///
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unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned VirtReg) {
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const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
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// First check to see if we have a free register of the requested type...
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unsigned PhysReg = getFreeReg(RC);
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// If we didn't find an unused register, scavenge one now!
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if (PhysReg == 0) {
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assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
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// Loop over all of the preallocated registers from the least recently used
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// to the most recently used. When we find one that is capable of holding
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// our register, use it.
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for (unsigned i = 0; PhysReg == 0; ++i) {
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assert(i != PhysRegsUseOrder.size() &&
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"Couldn't find a register of the appropriate class!");
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unsigned R = PhysRegsUseOrder[i];
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// If the current register is compatible, use it.
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if (RegInfo->getRegClass(R) == RC) {
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PhysReg = R;
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break;
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} else {
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// If one of the registers aliased to the current register is
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// compatible, use it.
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if (const unsigned *AliasSet = RegInfo->getAliasSet(R))
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for (unsigned a = 0; AliasSet[a]; ++a)
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if (RegInfo->getRegClass(AliasSet[a]) == RC) {
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PhysReg = AliasSet[a]; // Take an aliased register
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break;
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}
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}
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}
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assert(PhysReg && "Physical register not assigned!?!?");
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// At this point PhysRegsUseOrder[i] is the least recently used register of
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// compatible register class. Spill it to memory and reap its remains.
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spillPhysReg(MBB, I, PhysReg);
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}
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// Now that we know which register we need to assign this to, do it now!
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assignVirtToPhysReg(VirtReg, PhysReg);
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return PhysReg;
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}
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/// reloadVirtReg - This method loads the specified virtual register into a
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/// physical register, returning the physical register chosen. This updates the
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/// regalloc data structures to reflect the fact that the virtual reg is now
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/// alive in a physical register, and the previous one isn't.
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///
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unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &I,
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unsigned VirtReg) {
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std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
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if (It != Virt2PhysRegMap.end()) {
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MarkPhysRegRecentlyUsed(It->second);
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return It->second; // Already have this value available!
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}
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unsigned PhysReg = getReg(MBB, I, VirtReg);
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const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
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int FrameIndex = getStackSpaceFor(VirtReg, RC);
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markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
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// Add move instruction(s)
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RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
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++NumReloaded; // Update statistics
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return PhysReg;
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}
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void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// loop over each instruction
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MachineBasicBlock::iterator I = MBB.begin();
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for (; I != MBB.end(); ++I) {
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MachineInstr *MI = *I;
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const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
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// Loop over the implicit uses, making sure that they are at the head of the
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// use order list, so they don't get reallocated.
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if (const unsigned *ImplicitUses = TID.ImplicitUses)
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for (unsigned i = 0; ImplicitUses[i]; ++i)
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MarkPhysRegRecentlyUsed(ImplicitUses[i]);
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// Get the used operands into registers. This has the potiential to spill
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// incoming values if we are out of registers.
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//
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
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if (MI->getOperand(i).opIsUse() &&
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MI->getOperand(i).isVirtualRegister()) {
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unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
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unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
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MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
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}
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if (!DisableKill) {
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// If this instruction is the last user of anything in registers, kill the
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// value, freeing the register being used, so it doesn't need to be
|
|
// spilled to memory.
|
|
//
|
|
for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
|
|
KE = LV->killed_end(MI); KI != KE; ++KI) {
|
|
unsigned VirtReg = KI->second;
|
|
unsigned PhysReg = VirtReg;
|
|
if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
|
|
std::map<unsigned, unsigned>::iterator I =
|
|
Virt2PhysRegMap.find(VirtReg);
|
|
assert(I != Virt2PhysRegMap.end());
|
|
PhysReg = I->second;
|
|
Virt2PhysRegMap.erase(I);
|
|
}
|
|
|
|
if (PhysReg) {
|
|
DEBUG(std::cout << "V: " << VirtReg << " P: " << PhysReg
|
|
<< " Killed by: " << *MI);
|
|
removePhysReg(PhysReg);
|
|
}
|
|
}
|
|
}
|
|
|
|
// Loop over all of the operands of the instruction, spilling registers that
|
|
// are defined, and marking explicit destinations in the PhysRegsUsed map.
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
|
|
if ((MI->getOperand(i).opIsDef() || MI->getOperand(i).opIsDefAndUse()) &&
|
|
MI->getOperand(i).isPhysicalRegister()) {
|
|
unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
|
|
spillPhysReg(MBB, I, Reg); // Spill any existing value in the reg
|
|
PhysRegsUsed[Reg] = 0; // It is free and reserved now
|
|
PhysRegsUseOrder.push_back(Reg);
|
|
}
|
|
|
|
// Loop over the implicit defs, spilling them as well.
|
|
if (const unsigned *ImplicitDefs = TID.ImplicitDefs)
|
|
for (unsigned i = 0; ImplicitDefs[i]; ++i) {
|
|
unsigned Reg = ImplicitDefs[i];
|
|
spillPhysReg(MBB, I, Reg);
|
|
PhysRegsUseOrder.push_back(Reg);
|
|
PhysRegsUsed[Reg] = 0; // It is free and reserved now
|
|
}
|
|
|
|
// Okay, we have allocated all of the source operands and spilled any values
|
|
// that would be destroyed by defs of this instruction. Loop over the
|
|
// implicit defs and assign them to a register, spilling incoming values if
|
|
// we need to scavenge a register.
|
|
//
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
|
|
if (MI->getOperand(i).opIsDef() &&
|
|
MI->getOperand(i).isVirtualRegister()) {
|
|
unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
|
|
unsigned DestPhysReg;
|
|
|
|
// If DestVirtReg already has a value, forget about it. Why doesn't
|
|
// getReg do this right?
|
|
std::map<unsigned, unsigned>::iterator DestI =
|
|
Virt2PhysRegMap.find(DestVirtReg);
|
|
if (DestI != Virt2PhysRegMap.end()) {
|
|
unsigned PhysReg = DestI->second;
|
|
Virt2PhysRegMap.erase(DestI);
|
|
removePhysReg(PhysReg);
|
|
}
|
|
|
|
if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
|
|
// must be same register number as the first operand
|
|
// This maps a = b + c into b += c, and saves b into a's spot
|
|
assert(MI->getOperand(1).isRegister() &&
|
|
MI->getOperand(1).getAllocatedRegNum() &&
|
|
MI->getOperand(1).opIsUse() &&
|
|
"Two address instruction invalid!");
|
|
DestPhysReg = MI->getOperand(1).getAllocatedRegNum();
|
|
|
|
liberatePhysReg(MBB, I, DestPhysReg);
|
|
assignVirtToPhysReg(DestVirtReg, DestPhysReg);
|
|
} else {
|
|
DestPhysReg = getReg(MBB, I, DestVirtReg);
|
|
}
|
|
markVirtRegModified(DestVirtReg);
|
|
MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
|
|
}
|
|
|
|
if (!DisableKill) {
|
|
// If this instruction defines any registers that are immediately dead,
|
|
// kill them now.
|
|
//
|
|
for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
|
|
KE = LV->dead_end(MI); KI != KE; ++KI) {
|
|
unsigned VirtReg = KI->second;
|
|
unsigned PhysReg = VirtReg;
|
|
if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
|
|
std::map<unsigned, unsigned>::iterator I =
|
|
Virt2PhysRegMap.find(VirtReg);
|
|
assert(I != Virt2PhysRegMap.end());
|
|
PhysReg = I->second;
|
|
Virt2PhysRegMap.erase(I);
|
|
}
|
|
|
|
if (PhysReg) {
|
|
DEBUG(std::cout << "V: " << VirtReg << " P: " << PhysReg
|
|
<< " dead after: " << *MI);
|
|
removePhysReg(PhysReg);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Rewind the iterator to point to the first flow control instruction...
|
|
const TargetInstrInfo &TII = TM->getInstrInfo();
|
|
I = MBB.end()-1;
|
|
while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
|
|
--I;
|
|
|
|
// Spill all physical registers holding virtual registers now.
|
|
while (!PhysRegsUsed.empty())
|
|
spillVirtReg(MBB, I, PhysRegsUsed.begin()->second,
|
|
PhysRegsUsed.begin()->first);
|
|
|
|
for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
|
|
E = Virt2PhysRegMap.end(); I != E; ++I)
|
|
std::cerr << "Register still mapped: " << I->first << " -> "
|
|
<< I->second << "\n";
|
|
|
|
assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
|
|
assert(PhysRegsUseOrder.empty() && "Physical regs still allocated?");
|
|
}
|
|
|
|
|
|
/// runOnMachineFunction - Register allocate the whole function
|
|
///
|
|
bool RA::runOnMachineFunction(MachineFunction &Fn) {
|
|
DEBUG(std::cerr << "Machine Function " << "\n");
|
|
MF = &Fn;
|
|
TM = &Fn.getTarget();
|
|
RegInfo = TM->getRegisterInfo();
|
|
|
|
if (!DisableKill)
|
|
LV = &getAnalysis<LiveVariables>();
|
|
|
|
// Loop over all of the basic blocks, eliminating virtual register references
|
|
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
|
|
MBB != MBBe; ++MBB)
|
|
AllocateBasicBlock(*MBB);
|
|
|
|
StackSlotForVirtReg.clear();
|
|
VirtRegModified.clear();
|
|
return true;
|
|
}
|
|
|
|
Pass *createLocalRegisterAllocator() {
|
|
return new RA();
|
|
}
|