mirror of
https://github.com/c64scene-ar/llvm-6502.git
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4a48c339d6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1229 91177308-0d34-0410-b5e6-96231b3b80d8
114 lines
3.1 KiB
C++
114 lines
3.1 KiB
C++
//===-- TargetMachine.cpp - General Target Information ---------------------==//
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//
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// This file describes the general parts of a Target machine.
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// This file also implements MachineInstrInfo and MachineCacheInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MachineInstrInfo.h"
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#include "llvm/Target/MachineCacheInfo.h"
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#include "llvm/DerivedTypes.h"
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//---------------------------------------------------------------------------
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// class TargetMachine
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//
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// Purpose:
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// Machine description.
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//
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//---------------------------------------------------------------------------
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// function TargetMachine::findOptimalStorageSize
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//
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// Purpose:
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// This default implementation assumes that all sub-word data items use
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// space equal to optSizeForSubWordData, and all other primitive data
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// items use space according to the type.
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//
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unsigned int
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TargetMachine::findOptimalStorageSize(const Type* ty) const
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{
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switch(ty->getPrimitiveID())
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{
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case Type::BoolTyID:
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case Type::UByteTyID:
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case Type::SByteTyID:
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case Type::UShortTyID:
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case Type::ShortTyID:
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return optSizeForSubWordData;
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default:
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return DataLayout.getTypeSize(ty);
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}
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}
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//---------------------------------------------------------------------------
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// class MachineInstructionInfo
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// Interface to description of machine instructions
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//---------------------------------------------------------------------------
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/*ctor*/
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MachineInstrInfo::MachineInstrInfo(const TargetMachine& tgt,
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const MachineInstrDescriptor* _desc,
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unsigned int _descSize,
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unsigned int _numRealOpCodes)
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: target(tgt),
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desc(_desc), descSize(_descSize), numRealOpCodes(_numRealOpCodes)
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{
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// FIXME: TargetInstrDescriptors should not be global
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assert(TargetInstrDescriptors == NULL && desc != NULL);
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TargetInstrDescriptors = desc; // initialize global variable
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}
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MachineInstrInfo::~MachineInstrInfo()
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{
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TargetInstrDescriptors = NULL; // reset global variable
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}
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bool
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MachineInstrInfo::constantFitsInImmedField(MachineOpCode opCode,
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int64_t intValue) const
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{
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// First, check if opCode has an immed field.
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bool isSignExtended;
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uint64_t maxImmedValue = maxImmedConstant(opCode, isSignExtended);
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if (maxImmedValue != 0)
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{
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// Now check if the constant fits
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if (intValue <= (int64_t) maxImmedValue &&
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intValue >= -((int64_t) maxImmedValue+1))
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return true;
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}
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return false;
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}
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//---------------------------------------------------------------------------
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// class MachineCacheInfo
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//
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// Purpose:
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// Describes properties of the target cache architecture.
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//---------------------------------------------------------------------------
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/*ctor*/
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MachineCacheInfo::MachineCacheInfo(const TargetMachine& tgt)
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: target(tgt)
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{
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Initialize();
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}
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void
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MachineCacheInfo::Initialize()
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{
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numLevels = 2;
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cacheLineSizes.push_back(16); cacheLineSizes.push_back(32);
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cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20);
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cacheAssoc.push_back(1); cacheAssoc.push_back(4);
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}
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