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1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
1.0 KiB
LLVM
33 lines
1.0 KiB
LLVM
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}vector_imax:
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; SI: v_max_i32_e32
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define void @vector_imax(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 {
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main_body:
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%load = load i32 addrspace(1)* %in, align 4
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%max = call i32 @llvm.AMDGPU.imax(i32 %p0, i32 %load)
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%bc = bitcast i32 %max to float
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
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ret void
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}
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; SI-LABEL: {{^}}scalar_imax:
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; SI: s_max_i32
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define void @scalar_imax(i32 %p0, i32 %p1) #0 {
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entry:
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%max = call i32 @llvm.AMDGPU.imax(i32 %p0, i32 %p1)
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%bc = bitcast i32 %max to float
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
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ret void
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}
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; Function Attrs: readnone
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declare i32 @llvm.AMDGPU.imax(i32, i32) #1
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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!0 = !{!"const", null, i32 1}
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