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https://github.com/c64scene-ar/llvm-6502.git
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1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.6 KiB
LLVM
51 lines
1.6 KiB
LLVM
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
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; CHECK-LABEL: {{^}}select0:
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; i64 select should be split into two i32 selects, and we shouldn't need
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; to use a shfit to extract the hi dword of the input.
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; CHECK-NOT: s_lshr_b64
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; CHECK: v_cndmask
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; CHECK: v_cndmask
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define void @select0(i64 addrspace(1)* %out, i32 %cond, i64 %in) {
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entry:
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%0 = icmp ugt i32 %cond, 5
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%1 = select i1 %0, i64 0, i64 %in
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store i64 %1, i64 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}select_trunc_i64:
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; CHECK: v_cndmask_b32
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; CHECK-NOT: v_cndmask_b32
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define void @select_trunc_i64(i32 addrspace(1)* %out, i32 %cond, i64 %in) nounwind {
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%cmp = icmp ugt i32 %cond, 5
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%sel = select i1 %cmp, i64 0, i64 %in
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%trunc = trunc i64 %sel to i32
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store i32 %trunc, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK-LABEL: {{^}}select_trunc_i64_2:
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; CHECK: v_cndmask_b32
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; CHECK-NOT: v_cndmask_b32
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define void @select_trunc_i64_2(i32 addrspace(1)* %out, i32 %cond, i64 %a, i64 %b) nounwind {
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%cmp = icmp ugt i32 %cond, 5
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%sel = select i1 %cmp, i64 %a, i64 %b
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%trunc = trunc i64 %sel to i32
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store i32 %trunc, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK-LABEL: {{^}}v_select_trunc_i64_2:
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; CHECK: v_cndmask_b32
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; CHECK-NOT: v_cndmask_b32
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define void @v_select_trunc_i64_2(i32 addrspace(1)* %out, i32 %cond, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
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%cmp = icmp ugt i32 %cond, 5
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%a = load i64 addrspace(1)* %aptr, align 8
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%b = load i64 addrspace(1)* %bptr, align 8
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%sel = select i1 %cmp, i64 %a, i64 %b
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%trunc = trunc i64 %sel to i32
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store i32 %trunc, i32 addrspace(1)* %out, align 4
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ret void
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}
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