llvm-6502/str_pre-2.ll at 6f948be128ea99edf0351134881f53bf59507bed - llvm-6502 - Applefritter: Git

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Jim Grosbach c6f9261711 ARM stm/ldm instructions require more than one register in the register list.

Otherwise, a plain str/ldr should be used instead. Make sure we account for
that in prologue/epilogue code generation.
rdar://8745460

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121391 91177308-0d34-0410-b5e6-96231b3b80d8

2010-12-09 18:31:13 +00:00

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 ; RUN: llc < %s -mtriple=arm-linux-gnu | FileCheck %s
 @b = external global i64*
 define i64 @t(i64 %a) nounwind readonly {
 entry:
 ; CHECK: str lr, [sp, #-4]!
 ; CHECK: ldr lr, [sp], #4
 	%0 = load i64** @b, align 4
 	%1 = load i64* %0, align 4
 	%2 = mul i64 %1, %a
 	ret i64 %2
 }