mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-04 07:29:20 +00:00
d4bfd54ec2
all the other LDM/STM instructions. This fixes asm printer crashes when compiling with -O0. I've changed one of the NEON tests (vst3.ll) to run with -O0 to check this in the future. Prior to this change VLDM/VSTM used addressing mode #5, but not really. The offset field was used to hold a count of the number of registers being loaded or stored, and the AM5 opcode field was expanded to specify the IA or DB mode, instead of the standard ADD/SUB specifier. Much of the backend was not aware of these special cases. The crashes occured when rewriting a frameindex caused the AM5 offset field to be changed so that it did not have a valid submode. I don't know exactly what changed to expose this now. Maybe we've never done much with -O0 and NEON. Regardless, there's no longer any reason to keep a count of the VLDM/VSTM registers, so we can use addressing mode #4 and clean things up in a lot of places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112322 91177308-0d34-0410-b5e6-96231b3b80d8
96 lines
3.2 KiB
LLVM
96 lines
3.2 KiB
LLVM
; RUN: llc < %s -march=arm -mattr=+neon -O0 | FileCheck %s
|
|
|
|
define void @vst3i8(i8* %A, <8 x i8>* %B) nounwind {
|
|
;CHECK: vst3i8:
|
|
;CHECK: vst3.8
|
|
%tmp1 = load <8 x i8>* %B
|
|
call void @llvm.arm.neon.vst3.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
define void @vst3i16(i16* %A, <4 x i16>* %B) nounwind {
|
|
;CHECK: vst3i16:
|
|
;CHECK: vst3.16
|
|
%tmp0 = bitcast i16* %A to i8*
|
|
%tmp1 = load <4 x i16>* %B
|
|
call void @llvm.arm.neon.vst3.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
define void @vst3i32(i32* %A, <2 x i32>* %B) nounwind {
|
|
;CHECK: vst3i32:
|
|
;CHECK: vst3.32
|
|
%tmp0 = bitcast i32* %A to i8*
|
|
%tmp1 = load <2 x i32>* %B
|
|
call void @llvm.arm.neon.vst3.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
define void @vst3f(float* %A, <2 x float>* %B) nounwind {
|
|
;CHECK: vst3f:
|
|
;CHECK: vst3.32
|
|
%tmp0 = bitcast float* %A to i8*
|
|
%tmp1 = load <2 x float>* %B
|
|
call void @llvm.arm.neon.vst3.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
define void @vst3i64(i64* %A, <1 x i64>* %B) nounwind {
|
|
;CHECK: vst3i64:
|
|
;CHECK: vst1.64
|
|
%tmp0 = bitcast i64* %A to i8*
|
|
%tmp1 = load <1 x i64>* %B
|
|
call void @llvm.arm.neon.vst3.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
define void @vst3Qi8(i8* %A, <16 x i8>* %B) nounwind {
|
|
;CHECK: vst3Qi8:
|
|
;CHECK: vst3.8
|
|
;CHECK: vst3.8
|
|
%tmp1 = load <16 x i8>* %B
|
|
call void @llvm.arm.neon.vst3.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
define void @vst3Qi16(i16* %A, <8 x i16>* %B) nounwind {
|
|
;CHECK: vst3Qi16:
|
|
;CHECK: vst3.16
|
|
;CHECK: vst3.16
|
|
%tmp0 = bitcast i16* %A to i8*
|
|
%tmp1 = load <8 x i16>* %B
|
|
call void @llvm.arm.neon.vst3.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
define void @vst3Qi32(i32* %A, <4 x i32>* %B) nounwind {
|
|
;CHECK: vst3Qi32:
|
|
;CHECK: vst3.32
|
|
;CHECK: vst3.32
|
|
%tmp0 = bitcast i32* %A to i8*
|
|
%tmp1 = load <4 x i32>* %B
|
|
call void @llvm.arm.neon.vst3.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
define void @vst3Qf(float* %A, <4 x float>* %B) nounwind {
|
|
;CHECK: vst3Qf:
|
|
;CHECK: vst3.32
|
|
;CHECK: vst3.32
|
|
%tmp0 = bitcast float* %A to i8*
|
|
%tmp1 = load <4 x float>* %B
|
|
call void @llvm.arm.neon.vst3.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.arm.neon.vst3.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind
|
|
declare void @llvm.arm.neon.vst3.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind
|
|
declare void @llvm.arm.neon.vst3.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind
|
|
declare void @llvm.arm.neon.vst3.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32) nounwind
|
|
declare void @llvm.arm.neon.vst3.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, i32) nounwind
|
|
|
|
declare void @llvm.arm.neon.vst3.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, i32) nounwind
|
|
declare void @llvm.arm.neon.vst3.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind
|
|
declare void @llvm.arm.neon.vst3.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind
|
|
declare void @llvm.arm.neon.vst3.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32) nounwind
|