mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-26 23:29:22 +00:00
49683f3c96
The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
7236 lines
241 KiB
TableGen
7236 lines
241 KiB
TableGen
//===-- NVPTXRegisterInfo.td - NVPTX Register defs ---------*- tablegen -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Declarations that describe the PTX register file
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
class NVPTXReg<string n> : Register<n> {
|
|
let Namespace = "NVPTX";
|
|
}
|
|
|
|
class NVPTXRegClass<list<ValueType> regTypes, int alignment, dag regList>
|
|
: RegisterClass <"NVPTX", regTypes, alignment, regList>;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Registers
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
// Special Registers used as stack pointer
|
|
def VRFrame : NVPTXReg<"%SP">;
|
|
def VRFrameLocal : NVPTXReg<"%SPL">;
|
|
|
|
// Special Registers used as the stack
|
|
def VRDepot : NVPTXReg<"%Depot">;
|
|
|
|
//===--- Predicate --------------------------------------------------------===//
|
|
def P0 : NVPTXReg<"%p0">;
|
|
def P1 : NVPTXReg<"%p1">;
|
|
def P2 : NVPTXReg<"%p2">;
|
|
def P3 : NVPTXReg<"%p3">;
|
|
def P4 : NVPTXReg<"%p4">;
|
|
def P5 : NVPTXReg<"%p5">;
|
|
def P6 : NVPTXReg<"%p6">;
|
|
def P7 : NVPTXReg<"%p7">;
|
|
def P8 : NVPTXReg<"%p8">;
|
|
def P9 : NVPTXReg<"%p9">;
|
|
def P10 : NVPTXReg<"%p10">;
|
|
def P11 : NVPTXReg<"%p11">;
|
|
def P12 : NVPTXReg<"%p12">;
|
|
def P13 : NVPTXReg<"%p13">;
|
|
def P14 : NVPTXReg<"%p14">;
|
|
def P15 : NVPTXReg<"%p15">;
|
|
def P16 : NVPTXReg<"%p16">;
|
|
def P17 : NVPTXReg<"%p17">;
|
|
def P18 : NVPTXReg<"%p18">;
|
|
def P19 : NVPTXReg<"%p19">;
|
|
def P20 : NVPTXReg<"%p20">;
|
|
def P21 : NVPTXReg<"%p21">;
|
|
def P22 : NVPTXReg<"%p22">;
|
|
def P23 : NVPTXReg<"%p23">;
|
|
def P24 : NVPTXReg<"%p24">;
|
|
def P25 : NVPTXReg<"%p25">;
|
|
def P26 : NVPTXReg<"%p26">;
|
|
def P27 : NVPTXReg<"%p27">;
|
|
def P28 : NVPTXReg<"%p28">;
|
|
def P29 : NVPTXReg<"%p29">;
|
|
def P30 : NVPTXReg<"%p30">;
|
|
def P31 : NVPTXReg<"%p31">;
|
|
def P32 : NVPTXReg<"%p32">;
|
|
def P33 : NVPTXReg<"%p33">;
|
|
def P34 : NVPTXReg<"%p34">;
|
|
def P35 : NVPTXReg<"%p35">;
|
|
def P36 : NVPTXReg<"%p36">;
|
|
def P37 : NVPTXReg<"%p37">;
|
|
def P38 : NVPTXReg<"%p38">;
|
|
def P39 : NVPTXReg<"%p39">;
|
|
def P40 : NVPTXReg<"%p40">;
|
|
def P41 : NVPTXReg<"%p41">;
|
|
def P42 : NVPTXReg<"%p42">;
|
|
def P43 : NVPTXReg<"%p43">;
|
|
def P44 : NVPTXReg<"%p44">;
|
|
def P45 : NVPTXReg<"%p45">;
|
|
def P46 : NVPTXReg<"%p46">;
|
|
def P47 : NVPTXReg<"%p47">;
|
|
def P48 : NVPTXReg<"%p48">;
|
|
def P49 : NVPTXReg<"%p49">;
|
|
def P50 : NVPTXReg<"%p50">;
|
|
def P51 : NVPTXReg<"%p51">;
|
|
def P52 : NVPTXReg<"%p52">;
|
|
def P53 : NVPTXReg<"%p53">;
|
|
def P54 : NVPTXReg<"%p54">;
|
|
def P55 : NVPTXReg<"%p55">;
|
|
def P56 : NVPTXReg<"%p56">;
|
|
def P57 : NVPTXReg<"%p57">;
|
|
def P58 : NVPTXReg<"%p58">;
|
|
def P59 : NVPTXReg<"%p59">;
|
|
def P60 : NVPTXReg<"%p60">;
|
|
def P61 : NVPTXReg<"%p61">;
|
|
def P62 : NVPTXReg<"%p62">;
|
|
def P63 : NVPTXReg<"%p63">;
|
|
def P64 : NVPTXReg<"%p64">;
|
|
def P65 : NVPTXReg<"%p65">;
|
|
def P66 : NVPTXReg<"%p66">;
|
|
def P67 : NVPTXReg<"%p67">;
|
|
def P68 : NVPTXReg<"%p68">;
|
|
def P69 : NVPTXReg<"%p69">;
|
|
def P70 : NVPTXReg<"%p70">;
|
|
def P71 : NVPTXReg<"%p71">;
|
|
def P72 : NVPTXReg<"%p72">;
|
|
def P73 : NVPTXReg<"%p73">;
|
|
def P74 : NVPTXReg<"%p74">;
|
|
def P75 : NVPTXReg<"%p75">;
|
|
def P76 : NVPTXReg<"%p76">;
|
|
def P77 : NVPTXReg<"%p77">;
|
|
def P78 : NVPTXReg<"%p78">;
|
|
def P79 : NVPTXReg<"%p79">;
|
|
def P80 : NVPTXReg<"%p80">;
|
|
def P81 : NVPTXReg<"%p81">;
|
|
def P82 : NVPTXReg<"%p82">;
|
|
def P83 : NVPTXReg<"%p83">;
|
|
def P84 : NVPTXReg<"%p84">;
|
|
def P85 : NVPTXReg<"%p85">;
|
|
def P86 : NVPTXReg<"%p86">;
|
|
def P87 : NVPTXReg<"%p87">;
|
|
def P88 : NVPTXReg<"%p88">;
|
|
def P89 : NVPTXReg<"%p89">;
|
|
def P90 : NVPTXReg<"%p90">;
|
|
def P91 : NVPTXReg<"%p91">;
|
|
def P92 : NVPTXReg<"%p92">;
|
|
def P93 : NVPTXReg<"%p93">;
|
|
def P94 : NVPTXReg<"%p94">;
|
|
def P95 : NVPTXReg<"%p95">;
|
|
def P96 : NVPTXReg<"%p96">;
|
|
def P97 : NVPTXReg<"%p97">;
|
|
def P98 : NVPTXReg<"%p98">;
|
|
def P99 : NVPTXReg<"%p99">;
|
|
def P100 : NVPTXReg<"%p100">;
|
|
def P101 : NVPTXReg<"%p101">;
|
|
def P102 : NVPTXReg<"%p102">;
|
|
def P103 : NVPTXReg<"%p103">;
|
|
def P104 : NVPTXReg<"%p104">;
|
|
def P105 : NVPTXReg<"%p105">;
|
|
def P106 : NVPTXReg<"%p106">;
|
|
def P107 : NVPTXReg<"%p107">;
|
|
def P108 : NVPTXReg<"%p108">;
|
|
def P109 : NVPTXReg<"%p109">;
|
|
def P110 : NVPTXReg<"%p110">;
|
|
def P111 : NVPTXReg<"%p111">;
|
|
def P112 : NVPTXReg<"%p112">;
|
|
def P113 : NVPTXReg<"%p113">;
|
|
def P114 : NVPTXReg<"%p114">;
|
|
def P115 : NVPTXReg<"%p115">;
|
|
def P116 : NVPTXReg<"%p116">;
|
|
def P117 : NVPTXReg<"%p117">;
|
|
def P118 : NVPTXReg<"%p118">;
|
|
def P119 : NVPTXReg<"%p119">;
|
|
def P120 : NVPTXReg<"%p120">;
|
|
def P121 : NVPTXReg<"%p121">;
|
|
def P122 : NVPTXReg<"%p122">;
|
|
def P123 : NVPTXReg<"%p123">;
|
|
def P124 : NVPTXReg<"%p124">;
|
|
def P125 : NVPTXReg<"%p125">;
|
|
def P126 : NVPTXReg<"%p126">;
|
|
def P127 : NVPTXReg<"%p127">;
|
|
def P128 : NVPTXReg<"%p128">;
|
|
def P129 : NVPTXReg<"%p129">;
|
|
def P130 : NVPTXReg<"%p130">;
|
|
def P131 : NVPTXReg<"%p131">;
|
|
def P132 : NVPTXReg<"%p132">;
|
|
def P133 : NVPTXReg<"%p133">;
|
|
def P134 : NVPTXReg<"%p134">;
|
|
def P135 : NVPTXReg<"%p135">;
|
|
def P136 : NVPTXReg<"%p136">;
|
|
def P137 : NVPTXReg<"%p137">;
|
|
def P138 : NVPTXReg<"%p138">;
|
|
def P139 : NVPTXReg<"%p139">;
|
|
def P140 : NVPTXReg<"%p140">;
|
|
def P141 : NVPTXReg<"%p141">;
|
|
def P142 : NVPTXReg<"%p142">;
|
|
def P143 : NVPTXReg<"%p143">;
|
|
def P144 : NVPTXReg<"%p144">;
|
|
def P145 : NVPTXReg<"%p145">;
|
|
def P146 : NVPTXReg<"%p146">;
|
|
def P147 : NVPTXReg<"%p147">;
|
|
def P148 : NVPTXReg<"%p148">;
|
|
def P149 : NVPTXReg<"%p149">;
|
|
def P150 : NVPTXReg<"%p150">;
|
|
def P151 : NVPTXReg<"%p151">;
|
|
def P152 : NVPTXReg<"%p152">;
|
|
def P153 : NVPTXReg<"%p153">;
|
|
def P154 : NVPTXReg<"%p154">;
|
|
def P155 : NVPTXReg<"%p155">;
|
|
def P156 : NVPTXReg<"%p156">;
|
|
def P157 : NVPTXReg<"%p157">;
|
|
def P158 : NVPTXReg<"%p158">;
|
|
def P159 : NVPTXReg<"%p159">;
|
|
def P160 : NVPTXReg<"%p160">;
|
|
def P161 : NVPTXReg<"%p161">;
|
|
def P162 : NVPTXReg<"%p162">;
|
|
def P163 : NVPTXReg<"%p163">;
|
|
def P164 : NVPTXReg<"%p164">;
|
|
def P165 : NVPTXReg<"%p165">;
|
|
def P166 : NVPTXReg<"%p166">;
|
|
def P167 : NVPTXReg<"%p167">;
|
|
def P168 : NVPTXReg<"%p168">;
|
|
def P169 : NVPTXReg<"%p169">;
|
|
def P170 : NVPTXReg<"%p170">;
|
|
def P171 : NVPTXReg<"%p171">;
|
|
def P172 : NVPTXReg<"%p172">;
|
|
def P173 : NVPTXReg<"%p173">;
|
|
def P174 : NVPTXReg<"%p174">;
|
|
def P175 : NVPTXReg<"%p175">;
|
|
def P176 : NVPTXReg<"%p176">;
|
|
def P177 : NVPTXReg<"%p177">;
|
|
def P178 : NVPTXReg<"%p178">;
|
|
def P179 : NVPTXReg<"%p179">;
|
|
def P180 : NVPTXReg<"%p180">;
|
|
def P181 : NVPTXReg<"%p181">;
|
|
def P182 : NVPTXReg<"%p182">;
|
|
def P183 : NVPTXReg<"%p183">;
|
|
def P184 : NVPTXReg<"%p184">;
|
|
def P185 : NVPTXReg<"%p185">;
|
|
def P186 : NVPTXReg<"%p186">;
|
|
def P187 : NVPTXReg<"%p187">;
|
|
def P188 : NVPTXReg<"%p188">;
|
|
def P189 : NVPTXReg<"%p189">;
|
|
def P190 : NVPTXReg<"%p190">;
|
|
def P191 : NVPTXReg<"%p191">;
|
|
def P192 : NVPTXReg<"%p192">;
|
|
def P193 : NVPTXReg<"%p193">;
|
|
def P194 : NVPTXReg<"%p194">;
|
|
def P195 : NVPTXReg<"%p195">;
|
|
def P196 : NVPTXReg<"%p196">;
|
|
def P197 : NVPTXReg<"%p197">;
|
|
def P198 : NVPTXReg<"%p198">;
|
|
def P199 : NVPTXReg<"%p199">;
|
|
def P200 : NVPTXReg<"%p200">;
|
|
def P201 : NVPTXReg<"%p201">;
|
|
def P202 : NVPTXReg<"%p202">;
|
|
def P203 : NVPTXReg<"%p203">;
|
|
def P204 : NVPTXReg<"%p204">;
|
|
def P205 : NVPTXReg<"%p205">;
|
|
def P206 : NVPTXReg<"%p206">;
|
|
def P207 : NVPTXReg<"%p207">;
|
|
def P208 : NVPTXReg<"%p208">;
|
|
def P209 : NVPTXReg<"%p209">;
|
|
def P210 : NVPTXReg<"%p210">;
|
|
def P211 : NVPTXReg<"%p211">;
|
|
def P212 : NVPTXReg<"%p212">;
|
|
def P213 : NVPTXReg<"%p213">;
|
|
def P214 : NVPTXReg<"%p214">;
|
|
def P215 : NVPTXReg<"%p215">;
|
|
def P216 : NVPTXReg<"%p216">;
|
|
def P217 : NVPTXReg<"%p217">;
|
|
def P218 : NVPTXReg<"%p218">;
|
|
def P219 : NVPTXReg<"%p219">;
|
|
def P220 : NVPTXReg<"%p220">;
|
|
def P221 : NVPTXReg<"%p221">;
|
|
def P222 : NVPTXReg<"%p222">;
|
|
def P223 : NVPTXReg<"%p223">;
|
|
def P224 : NVPTXReg<"%p224">;
|
|
def P225 : NVPTXReg<"%p225">;
|
|
def P226 : NVPTXReg<"%p226">;
|
|
def P227 : NVPTXReg<"%p227">;
|
|
def P228 : NVPTXReg<"%p228">;
|
|
def P229 : NVPTXReg<"%p229">;
|
|
def P230 : NVPTXReg<"%p230">;
|
|
def P231 : NVPTXReg<"%p231">;
|
|
def P232 : NVPTXReg<"%p232">;
|
|
def P233 : NVPTXReg<"%p233">;
|
|
def P234 : NVPTXReg<"%p234">;
|
|
def P235 : NVPTXReg<"%p235">;
|
|
def P236 : NVPTXReg<"%p236">;
|
|
def P237 : NVPTXReg<"%p237">;
|
|
def P238 : NVPTXReg<"%p238">;
|
|
def P239 : NVPTXReg<"%p239">;
|
|
def P240 : NVPTXReg<"%p240">;
|
|
def P241 : NVPTXReg<"%p241">;
|
|
def P242 : NVPTXReg<"%p242">;
|
|
def P243 : NVPTXReg<"%p243">;
|
|
def P244 : NVPTXReg<"%p244">;
|
|
def P245 : NVPTXReg<"%p245">;
|
|
def P246 : NVPTXReg<"%p246">;
|
|
def P247 : NVPTXReg<"%p247">;
|
|
def P248 : NVPTXReg<"%p248">;
|
|
def P249 : NVPTXReg<"%p249">;
|
|
def P250 : NVPTXReg<"%p250">;
|
|
def P251 : NVPTXReg<"%p251">;
|
|
def P252 : NVPTXReg<"%p252">;
|
|
def P253 : NVPTXReg<"%p253">;
|
|
def P254 : NVPTXReg<"%p254">;
|
|
def P255 : NVPTXReg<"%p255">;
|
|
def P256 : NVPTXReg<"%p256">;
|
|
def P257 : NVPTXReg<"%p257">;
|
|
def P258 : NVPTXReg<"%p258">;
|
|
def P259 : NVPTXReg<"%p259">;
|
|
def P260 : NVPTXReg<"%p260">;
|
|
def P261 : NVPTXReg<"%p261">;
|
|
def P262 : NVPTXReg<"%p262">;
|
|
def P263 : NVPTXReg<"%p263">;
|
|
def P264 : NVPTXReg<"%p264">;
|
|
def P265 : NVPTXReg<"%p265">;
|
|
def P266 : NVPTXReg<"%p266">;
|
|
def P267 : NVPTXReg<"%p267">;
|
|
def P268 : NVPTXReg<"%p268">;
|
|
def P269 : NVPTXReg<"%p269">;
|
|
def P270 : NVPTXReg<"%p270">;
|
|
def P271 : NVPTXReg<"%p271">;
|
|
def P272 : NVPTXReg<"%p272">;
|
|
def P273 : NVPTXReg<"%p273">;
|
|
def P274 : NVPTXReg<"%p274">;
|
|
def P275 : NVPTXReg<"%p275">;
|
|
def P276 : NVPTXReg<"%p276">;
|
|
def P277 : NVPTXReg<"%p277">;
|
|
def P278 : NVPTXReg<"%p278">;
|
|
def P279 : NVPTXReg<"%p279">;
|
|
def P280 : NVPTXReg<"%p280">;
|
|
def P281 : NVPTXReg<"%p281">;
|
|
def P282 : NVPTXReg<"%p282">;
|
|
def P283 : NVPTXReg<"%p283">;
|
|
def P284 : NVPTXReg<"%p284">;
|
|
def P285 : NVPTXReg<"%p285">;
|
|
def P286 : NVPTXReg<"%p286">;
|
|
def P287 : NVPTXReg<"%p287">;
|
|
def P288 : NVPTXReg<"%p288">;
|
|
def P289 : NVPTXReg<"%p289">;
|
|
def P290 : NVPTXReg<"%p290">;
|
|
def P291 : NVPTXReg<"%p291">;
|
|
def P292 : NVPTXReg<"%p292">;
|
|
def P293 : NVPTXReg<"%p293">;
|
|
def P294 : NVPTXReg<"%p294">;
|
|
def P295 : NVPTXReg<"%p295">;
|
|
def P296 : NVPTXReg<"%p296">;
|
|
def P297 : NVPTXReg<"%p297">;
|
|
def P298 : NVPTXReg<"%p298">;
|
|
def P299 : NVPTXReg<"%p299">;
|
|
def P300 : NVPTXReg<"%p300">;
|
|
def P301 : NVPTXReg<"%p301">;
|
|
def P302 : NVPTXReg<"%p302">;
|
|
def P303 : NVPTXReg<"%p303">;
|
|
def P304 : NVPTXReg<"%p304">;
|
|
def P305 : NVPTXReg<"%p305">;
|
|
def P306 : NVPTXReg<"%p306">;
|
|
def P307 : NVPTXReg<"%p307">;
|
|
def P308 : NVPTXReg<"%p308">;
|
|
def P309 : NVPTXReg<"%p309">;
|
|
def P310 : NVPTXReg<"%p310">;
|
|
def P311 : NVPTXReg<"%p311">;
|
|
def P312 : NVPTXReg<"%p312">;
|
|
def P313 : NVPTXReg<"%p313">;
|
|
def P314 : NVPTXReg<"%p314">;
|
|
def P315 : NVPTXReg<"%p315">;
|
|
def P316 : NVPTXReg<"%p316">;
|
|
def P317 : NVPTXReg<"%p317">;
|
|
def P318 : NVPTXReg<"%p318">;
|
|
def P319 : NVPTXReg<"%p319">;
|
|
def P320 : NVPTXReg<"%p320">;
|
|
def P321 : NVPTXReg<"%p321">;
|
|
def P322 : NVPTXReg<"%p322">;
|
|
def P323 : NVPTXReg<"%p323">;
|
|
def P324 : NVPTXReg<"%p324">;
|
|
def P325 : NVPTXReg<"%p325">;
|
|
def P326 : NVPTXReg<"%p326">;
|
|
def P327 : NVPTXReg<"%p327">;
|
|
def P328 : NVPTXReg<"%p328">;
|
|
def P329 : NVPTXReg<"%p329">;
|
|
def P330 : NVPTXReg<"%p330">;
|
|
def P331 : NVPTXReg<"%p331">;
|
|
def P332 : NVPTXReg<"%p332">;
|
|
def P333 : NVPTXReg<"%p333">;
|
|
def P334 : NVPTXReg<"%p334">;
|
|
def P335 : NVPTXReg<"%p335">;
|
|
def P336 : NVPTXReg<"%p336">;
|
|
def P337 : NVPTXReg<"%p337">;
|
|
def P338 : NVPTXReg<"%p338">;
|
|
def P339 : NVPTXReg<"%p339">;
|
|
def P340 : NVPTXReg<"%p340">;
|
|
def P341 : NVPTXReg<"%p341">;
|
|
def P342 : NVPTXReg<"%p342">;
|
|
def P343 : NVPTXReg<"%p343">;
|
|
def P344 : NVPTXReg<"%p344">;
|
|
def P345 : NVPTXReg<"%p345">;
|
|
def P346 : NVPTXReg<"%p346">;
|
|
def P347 : NVPTXReg<"%p347">;
|
|
def P348 : NVPTXReg<"%p348">;
|
|
def P349 : NVPTXReg<"%p349">;
|
|
def P350 : NVPTXReg<"%p350">;
|
|
def P351 : NVPTXReg<"%p351">;
|
|
def P352 : NVPTXReg<"%p352">;
|
|
def P353 : NVPTXReg<"%p353">;
|
|
def P354 : NVPTXReg<"%p354">;
|
|
def P355 : NVPTXReg<"%p355">;
|
|
def P356 : NVPTXReg<"%p356">;
|
|
def P357 : NVPTXReg<"%p357">;
|
|
def P358 : NVPTXReg<"%p358">;
|
|
def P359 : NVPTXReg<"%p359">;
|
|
def P360 : NVPTXReg<"%p360">;
|
|
def P361 : NVPTXReg<"%p361">;
|
|
def P362 : NVPTXReg<"%p362">;
|
|
def P363 : NVPTXReg<"%p363">;
|
|
def P364 : NVPTXReg<"%p364">;
|
|
def P365 : NVPTXReg<"%p365">;
|
|
def P366 : NVPTXReg<"%p366">;
|
|
def P367 : NVPTXReg<"%p367">;
|
|
def P368 : NVPTXReg<"%p368">;
|
|
def P369 : NVPTXReg<"%p369">;
|
|
def P370 : NVPTXReg<"%p370">;
|
|
def P371 : NVPTXReg<"%p371">;
|
|
def P372 : NVPTXReg<"%p372">;
|
|
def P373 : NVPTXReg<"%p373">;
|
|
def P374 : NVPTXReg<"%p374">;
|
|
def P375 : NVPTXReg<"%p375">;
|
|
def P376 : NVPTXReg<"%p376">;
|
|
def P377 : NVPTXReg<"%p377">;
|
|
def P378 : NVPTXReg<"%p378">;
|
|
def P379 : NVPTXReg<"%p379">;
|
|
def P380 : NVPTXReg<"%p380">;
|
|
def P381 : NVPTXReg<"%p381">;
|
|
def P382 : NVPTXReg<"%p382">;
|
|
def P383 : NVPTXReg<"%p383">;
|
|
def P384 : NVPTXReg<"%p384">;
|
|
def P385 : NVPTXReg<"%p385">;
|
|
def P386 : NVPTXReg<"%p386">;
|
|
def P387 : NVPTXReg<"%p387">;
|
|
def P388 : NVPTXReg<"%p388">;
|
|
def P389 : NVPTXReg<"%p389">;
|
|
def P390 : NVPTXReg<"%p390">;
|
|
def P391 : NVPTXReg<"%p391">;
|
|
def P392 : NVPTXReg<"%p392">;
|
|
def P393 : NVPTXReg<"%p393">;
|
|
def P394 : NVPTXReg<"%p394">;
|
|
def P395 : NVPTXReg<"%p395">;
|
|
|
|
//===--- 8-bit ------------------------------------------------------------===//
|
|
def RC0 : NVPTXReg<"%rc0">;
|
|
def RC1 : NVPTXReg<"%rc1">;
|
|
def RC2 : NVPTXReg<"%rc2">;
|
|
def RC3 : NVPTXReg<"%rc3">;
|
|
def RC4 : NVPTXReg<"%rc4">;
|
|
def RC5 : NVPTXReg<"%rc5">;
|
|
def RC6 : NVPTXReg<"%rc6">;
|
|
def RC7 : NVPTXReg<"%rc7">;
|
|
def RC8 : NVPTXReg<"%rc8">;
|
|
def RC9 : NVPTXReg<"%rc9">;
|
|
def RC10 : NVPTXReg<"%rc10">;
|
|
def RC11 : NVPTXReg<"%rc11">;
|
|
def RC12 : NVPTXReg<"%rc12">;
|
|
def RC13 : NVPTXReg<"%rc13">;
|
|
def RC14 : NVPTXReg<"%rc14">;
|
|
def RC15 : NVPTXReg<"%rc15">;
|
|
def RC16 : NVPTXReg<"%rc16">;
|
|
def RC17 : NVPTXReg<"%rc17">;
|
|
def RC18 : NVPTXReg<"%rc18">;
|
|
def RC19 : NVPTXReg<"%rc19">;
|
|
def RC20 : NVPTXReg<"%rc20">;
|
|
def RC21 : NVPTXReg<"%rc21">;
|
|
def RC22 : NVPTXReg<"%rc22">;
|
|
def RC23 : NVPTXReg<"%rc23">;
|
|
def RC24 : NVPTXReg<"%rc24">;
|
|
def RC25 : NVPTXReg<"%rc25">;
|
|
def RC26 : NVPTXReg<"%rc26">;
|
|
def RC27 : NVPTXReg<"%rc27">;
|
|
def RC28 : NVPTXReg<"%rc28">;
|
|
def RC29 : NVPTXReg<"%rc29">;
|
|
def RC30 : NVPTXReg<"%rc30">;
|
|
def RC31 : NVPTXReg<"%rc31">;
|
|
def RC32 : NVPTXReg<"%rc32">;
|
|
def RC33 : NVPTXReg<"%rc33">;
|
|
def RC34 : NVPTXReg<"%rc34">;
|
|
def RC35 : NVPTXReg<"%rc35">;
|
|
def RC36 : NVPTXReg<"%rc36">;
|
|
def RC37 : NVPTXReg<"%rc37">;
|
|
def RC38 : NVPTXReg<"%rc38">;
|
|
def RC39 : NVPTXReg<"%rc39">;
|
|
def RC40 : NVPTXReg<"%rc40">;
|
|
def RC41 : NVPTXReg<"%rc41">;
|
|
def RC42 : NVPTXReg<"%rc42">;
|
|
def RC43 : NVPTXReg<"%rc43">;
|
|
def RC44 : NVPTXReg<"%rc44">;
|
|
def RC45 : NVPTXReg<"%rc45">;
|
|
def RC46 : NVPTXReg<"%rc46">;
|
|
def RC47 : NVPTXReg<"%rc47">;
|
|
def RC48 : NVPTXReg<"%rc48">;
|
|
def RC49 : NVPTXReg<"%rc49">;
|
|
def RC50 : NVPTXReg<"%rc50">;
|
|
def RC51 : NVPTXReg<"%rc51">;
|
|
def RC52 : NVPTXReg<"%rc52">;
|
|
def RC53 : NVPTXReg<"%rc53">;
|
|
def RC54 : NVPTXReg<"%rc54">;
|
|
def RC55 : NVPTXReg<"%rc55">;
|
|
def RC56 : NVPTXReg<"%rc56">;
|
|
def RC57 : NVPTXReg<"%rc57">;
|
|
def RC58 : NVPTXReg<"%rc58">;
|
|
def RC59 : NVPTXReg<"%rc59">;
|
|
def RC60 : NVPTXReg<"%rc60">;
|
|
def RC61 : NVPTXReg<"%rc61">;
|
|
def RC62 : NVPTXReg<"%rc62">;
|
|
def RC63 : NVPTXReg<"%rc63">;
|
|
def RC64 : NVPTXReg<"%rc64">;
|
|
def RC65 : NVPTXReg<"%rc65">;
|
|
def RC66 : NVPTXReg<"%rc66">;
|
|
def RC67 : NVPTXReg<"%rc67">;
|
|
def RC68 : NVPTXReg<"%rc68">;
|
|
def RC69 : NVPTXReg<"%rc69">;
|
|
def RC70 : NVPTXReg<"%rc70">;
|
|
def RC71 : NVPTXReg<"%rc71">;
|
|
def RC72 : NVPTXReg<"%rc72">;
|
|
def RC73 : NVPTXReg<"%rc73">;
|
|
def RC74 : NVPTXReg<"%rc74">;
|
|
def RC75 : NVPTXReg<"%rc75">;
|
|
def RC76 : NVPTXReg<"%rc76">;
|
|
def RC77 : NVPTXReg<"%rc77">;
|
|
def RC78 : NVPTXReg<"%rc78">;
|
|
def RC79 : NVPTXReg<"%rc79">;
|
|
def RC80 : NVPTXReg<"%rc80">;
|
|
def RC81 : NVPTXReg<"%rc81">;
|
|
def RC82 : NVPTXReg<"%rc82">;
|
|
def RC83 : NVPTXReg<"%rc83">;
|
|
def RC84 : NVPTXReg<"%rc84">;
|
|
def RC85 : NVPTXReg<"%rc85">;
|
|
def RC86 : NVPTXReg<"%rc86">;
|
|
def RC87 : NVPTXReg<"%rc87">;
|
|
def RC88 : NVPTXReg<"%rc88">;
|
|
def RC89 : NVPTXReg<"%rc89">;
|
|
def RC90 : NVPTXReg<"%rc90">;
|
|
def RC91 : NVPTXReg<"%rc91">;
|
|
def RC92 : NVPTXReg<"%rc92">;
|
|
def RC93 : NVPTXReg<"%rc93">;
|
|
def RC94 : NVPTXReg<"%rc94">;
|
|
def RC95 : NVPTXReg<"%rc95">;
|
|
def RC96 : NVPTXReg<"%rc96">;
|
|
def RC97 : NVPTXReg<"%rc97">;
|
|
def RC98 : NVPTXReg<"%rc98">;
|
|
def RC99 : NVPTXReg<"%rc99">;
|
|
def RC100 : NVPTXReg<"%rc100">;
|
|
def RC101 : NVPTXReg<"%rc101">;
|
|
def RC102 : NVPTXReg<"%rc102">;
|
|
def RC103 : NVPTXReg<"%rc103">;
|
|
def RC104 : NVPTXReg<"%rc104">;
|
|
def RC105 : NVPTXReg<"%rc105">;
|
|
def RC106 : NVPTXReg<"%rc106">;
|
|
def RC107 : NVPTXReg<"%rc107">;
|
|
def RC108 : NVPTXReg<"%rc108">;
|
|
def RC109 : NVPTXReg<"%rc109">;
|
|
def RC110 : NVPTXReg<"%rc110">;
|
|
def RC111 : NVPTXReg<"%rc111">;
|
|
def RC112 : NVPTXReg<"%rc112">;
|
|
def RC113 : NVPTXReg<"%rc113">;
|
|
def RC114 : NVPTXReg<"%rc114">;
|
|
def RC115 : NVPTXReg<"%rc115">;
|
|
def RC116 : NVPTXReg<"%rc116">;
|
|
def RC117 : NVPTXReg<"%rc117">;
|
|
def RC118 : NVPTXReg<"%rc118">;
|
|
def RC119 : NVPTXReg<"%rc119">;
|
|
def RC120 : NVPTXReg<"%rc120">;
|
|
def RC121 : NVPTXReg<"%rc121">;
|
|
def RC122 : NVPTXReg<"%rc122">;
|
|
def RC123 : NVPTXReg<"%rc123">;
|
|
def RC124 : NVPTXReg<"%rc124">;
|
|
def RC125 : NVPTXReg<"%rc125">;
|
|
def RC126 : NVPTXReg<"%rc126">;
|
|
def RC127 : NVPTXReg<"%rc127">;
|
|
def RC128 : NVPTXReg<"%rc128">;
|
|
def RC129 : NVPTXReg<"%rc129">;
|
|
def RC130 : NVPTXReg<"%rc130">;
|
|
def RC131 : NVPTXReg<"%rc131">;
|
|
def RC132 : NVPTXReg<"%rc132">;
|
|
def RC133 : NVPTXReg<"%rc133">;
|
|
def RC134 : NVPTXReg<"%rc134">;
|
|
def RC135 : NVPTXReg<"%rc135">;
|
|
def RC136 : NVPTXReg<"%rc136">;
|
|
def RC137 : NVPTXReg<"%rc137">;
|
|
def RC138 : NVPTXReg<"%rc138">;
|
|
def RC139 : NVPTXReg<"%rc139">;
|
|
def RC140 : NVPTXReg<"%rc140">;
|
|
def RC141 : NVPTXReg<"%rc141">;
|
|
def RC142 : NVPTXReg<"%rc142">;
|
|
def RC143 : NVPTXReg<"%rc143">;
|
|
def RC144 : NVPTXReg<"%rc144">;
|
|
def RC145 : NVPTXReg<"%rc145">;
|
|
def RC146 : NVPTXReg<"%rc146">;
|
|
def RC147 : NVPTXReg<"%rc147">;
|
|
def RC148 : NVPTXReg<"%rc148">;
|
|
def RC149 : NVPTXReg<"%rc149">;
|
|
def RC150 : NVPTXReg<"%rc150">;
|
|
def RC151 : NVPTXReg<"%rc151">;
|
|
def RC152 : NVPTXReg<"%rc152">;
|
|
def RC153 : NVPTXReg<"%rc153">;
|
|
def RC154 : NVPTXReg<"%rc154">;
|
|
def RC155 : NVPTXReg<"%rc155">;
|
|
def RC156 : NVPTXReg<"%rc156">;
|
|
def RC157 : NVPTXReg<"%rc157">;
|
|
def RC158 : NVPTXReg<"%rc158">;
|
|
def RC159 : NVPTXReg<"%rc159">;
|
|
def RC160 : NVPTXReg<"%rc160">;
|
|
def RC161 : NVPTXReg<"%rc161">;
|
|
def RC162 : NVPTXReg<"%rc162">;
|
|
def RC163 : NVPTXReg<"%rc163">;
|
|
def RC164 : NVPTXReg<"%rc164">;
|
|
def RC165 : NVPTXReg<"%rc165">;
|
|
def RC166 : NVPTXReg<"%rc166">;
|
|
def RC167 : NVPTXReg<"%rc167">;
|
|
def RC168 : NVPTXReg<"%rc168">;
|
|
def RC169 : NVPTXReg<"%rc169">;
|
|
def RC170 : NVPTXReg<"%rc170">;
|
|
def RC171 : NVPTXReg<"%rc171">;
|
|
def RC172 : NVPTXReg<"%rc172">;
|
|
def RC173 : NVPTXReg<"%rc173">;
|
|
def RC174 : NVPTXReg<"%rc174">;
|
|
def RC175 : NVPTXReg<"%rc175">;
|
|
def RC176 : NVPTXReg<"%rc176">;
|
|
def RC177 : NVPTXReg<"%rc177">;
|
|
def RC178 : NVPTXReg<"%rc178">;
|
|
def RC179 : NVPTXReg<"%rc179">;
|
|
def RC180 : NVPTXReg<"%rc180">;
|
|
def RC181 : NVPTXReg<"%rc181">;
|
|
def RC182 : NVPTXReg<"%rc182">;
|
|
def RC183 : NVPTXReg<"%rc183">;
|
|
def RC184 : NVPTXReg<"%rc184">;
|
|
def RC185 : NVPTXReg<"%rc185">;
|
|
def RC186 : NVPTXReg<"%rc186">;
|
|
def RC187 : NVPTXReg<"%rc187">;
|
|
def RC188 : NVPTXReg<"%rc188">;
|
|
def RC189 : NVPTXReg<"%rc189">;
|
|
def RC190 : NVPTXReg<"%rc190">;
|
|
def RC191 : NVPTXReg<"%rc191">;
|
|
def RC192 : NVPTXReg<"%rc192">;
|
|
def RC193 : NVPTXReg<"%rc193">;
|
|
def RC194 : NVPTXReg<"%rc194">;
|
|
def RC195 : NVPTXReg<"%rc195">;
|
|
def RC196 : NVPTXReg<"%rc196">;
|
|
def RC197 : NVPTXReg<"%rc197">;
|
|
def RC198 : NVPTXReg<"%rc198">;
|
|
def RC199 : NVPTXReg<"%rc199">;
|
|
def RC200 : NVPTXReg<"%rc200">;
|
|
def RC201 : NVPTXReg<"%rc201">;
|
|
def RC202 : NVPTXReg<"%rc202">;
|
|
def RC203 : NVPTXReg<"%rc203">;
|
|
def RC204 : NVPTXReg<"%rc204">;
|
|
def RC205 : NVPTXReg<"%rc205">;
|
|
def RC206 : NVPTXReg<"%rc206">;
|
|
def RC207 : NVPTXReg<"%rc207">;
|
|
def RC208 : NVPTXReg<"%rc208">;
|
|
def RC209 : NVPTXReg<"%rc209">;
|
|
def RC210 : NVPTXReg<"%rc210">;
|
|
def RC211 : NVPTXReg<"%rc211">;
|
|
def RC212 : NVPTXReg<"%rc212">;
|
|
def RC213 : NVPTXReg<"%rc213">;
|
|
def RC214 : NVPTXReg<"%rc214">;
|
|
def RC215 : NVPTXReg<"%rc215">;
|
|
def RC216 : NVPTXReg<"%rc216">;
|
|
def RC217 : NVPTXReg<"%rc217">;
|
|
def RC218 : NVPTXReg<"%rc218">;
|
|
def RC219 : NVPTXReg<"%rc219">;
|
|
def RC220 : NVPTXReg<"%rc220">;
|
|
def RC221 : NVPTXReg<"%rc221">;
|
|
def RC222 : NVPTXReg<"%rc222">;
|
|
def RC223 : NVPTXReg<"%rc223">;
|
|
def RC224 : NVPTXReg<"%rc224">;
|
|
def RC225 : NVPTXReg<"%rc225">;
|
|
def RC226 : NVPTXReg<"%rc226">;
|
|
def RC227 : NVPTXReg<"%rc227">;
|
|
def RC228 : NVPTXReg<"%rc228">;
|
|
def RC229 : NVPTXReg<"%rc229">;
|
|
def RC230 : NVPTXReg<"%rc230">;
|
|
def RC231 : NVPTXReg<"%rc231">;
|
|
def RC232 : NVPTXReg<"%rc232">;
|
|
def RC233 : NVPTXReg<"%rc233">;
|
|
def RC234 : NVPTXReg<"%rc234">;
|
|
def RC235 : NVPTXReg<"%rc235">;
|
|
def RC236 : NVPTXReg<"%rc236">;
|
|
def RC237 : NVPTXReg<"%rc237">;
|
|
def RC238 : NVPTXReg<"%rc238">;
|
|
def RC239 : NVPTXReg<"%rc239">;
|
|
def RC240 : NVPTXReg<"%rc240">;
|
|
def RC241 : NVPTXReg<"%rc241">;
|
|
def RC242 : NVPTXReg<"%rc242">;
|
|
def RC243 : NVPTXReg<"%rc243">;
|
|
def RC244 : NVPTXReg<"%rc244">;
|
|
def RC245 : NVPTXReg<"%rc245">;
|
|
def RC246 : NVPTXReg<"%rc246">;
|
|
def RC247 : NVPTXReg<"%rc247">;
|
|
def RC248 : NVPTXReg<"%rc248">;
|
|
def RC249 : NVPTXReg<"%rc249">;
|
|
def RC250 : NVPTXReg<"%rc250">;
|
|
def RC251 : NVPTXReg<"%rc251">;
|
|
def RC252 : NVPTXReg<"%rc252">;
|
|
def RC253 : NVPTXReg<"%rc253">;
|
|
def RC254 : NVPTXReg<"%rc254">;
|
|
def RC255 : NVPTXReg<"%rc255">;
|
|
def RC256 : NVPTXReg<"%rc256">;
|
|
def RC257 : NVPTXReg<"%rc257">;
|
|
def RC258 : NVPTXReg<"%rc258">;
|
|
def RC259 : NVPTXReg<"%rc259">;
|
|
def RC260 : NVPTXReg<"%rc260">;
|
|
def RC261 : NVPTXReg<"%rc261">;
|
|
def RC262 : NVPTXReg<"%rc262">;
|
|
def RC263 : NVPTXReg<"%rc263">;
|
|
def RC264 : NVPTXReg<"%rc264">;
|
|
def RC265 : NVPTXReg<"%rc265">;
|
|
def RC266 : NVPTXReg<"%rc266">;
|
|
def RC267 : NVPTXReg<"%rc267">;
|
|
def RC268 : NVPTXReg<"%rc268">;
|
|
def RC269 : NVPTXReg<"%rc269">;
|
|
def RC270 : NVPTXReg<"%rc270">;
|
|
def RC271 : NVPTXReg<"%rc271">;
|
|
def RC272 : NVPTXReg<"%rc272">;
|
|
def RC273 : NVPTXReg<"%rc273">;
|
|
def RC274 : NVPTXReg<"%rc274">;
|
|
def RC275 : NVPTXReg<"%rc275">;
|
|
def RC276 : NVPTXReg<"%rc276">;
|
|
def RC277 : NVPTXReg<"%rc277">;
|
|
def RC278 : NVPTXReg<"%rc278">;
|
|
def RC279 : NVPTXReg<"%rc279">;
|
|
def RC280 : NVPTXReg<"%rc280">;
|
|
def RC281 : NVPTXReg<"%rc281">;
|
|
def RC282 : NVPTXReg<"%rc282">;
|
|
def RC283 : NVPTXReg<"%rc283">;
|
|
def RC284 : NVPTXReg<"%rc284">;
|
|
def RC285 : NVPTXReg<"%rc285">;
|
|
def RC286 : NVPTXReg<"%rc286">;
|
|
def RC287 : NVPTXReg<"%rc287">;
|
|
def RC288 : NVPTXReg<"%rc288">;
|
|
def RC289 : NVPTXReg<"%rc289">;
|
|
def RC290 : NVPTXReg<"%rc290">;
|
|
def RC291 : NVPTXReg<"%rc291">;
|
|
def RC292 : NVPTXReg<"%rc292">;
|
|
def RC293 : NVPTXReg<"%rc293">;
|
|
def RC294 : NVPTXReg<"%rc294">;
|
|
def RC295 : NVPTXReg<"%rc295">;
|
|
def RC296 : NVPTXReg<"%rc296">;
|
|
def RC297 : NVPTXReg<"%rc297">;
|
|
def RC298 : NVPTXReg<"%rc298">;
|
|
def RC299 : NVPTXReg<"%rc299">;
|
|
def RC300 : NVPTXReg<"%rc300">;
|
|
def RC301 : NVPTXReg<"%rc301">;
|
|
def RC302 : NVPTXReg<"%rc302">;
|
|
def RC303 : NVPTXReg<"%rc303">;
|
|
def RC304 : NVPTXReg<"%rc304">;
|
|
def RC305 : NVPTXReg<"%rc305">;
|
|
def RC306 : NVPTXReg<"%rc306">;
|
|
def RC307 : NVPTXReg<"%rc307">;
|
|
def RC308 : NVPTXReg<"%rc308">;
|
|
def RC309 : NVPTXReg<"%rc309">;
|
|
def RC310 : NVPTXReg<"%rc310">;
|
|
def RC311 : NVPTXReg<"%rc311">;
|
|
def RC312 : NVPTXReg<"%rc312">;
|
|
def RC313 : NVPTXReg<"%rc313">;
|
|
def RC314 : NVPTXReg<"%rc314">;
|
|
def RC315 : NVPTXReg<"%rc315">;
|
|
def RC316 : NVPTXReg<"%rc316">;
|
|
def RC317 : NVPTXReg<"%rc317">;
|
|
def RC318 : NVPTXReg<"%rc318">;
|
|
def RC319 : NVPTXReg<"%rc319">;
|
|
def RC320 : NVPTXReg<"%rc320">;
|
|
def RC321 : NVPTXReg<"%rc321">;
|
|
def RC322 : NVPTXReg<"%rc322">;
|
|
def RC323 : NVPTXReg<"%rc323">;
|
|
def RC324 : NVPTXReg<"%rc324">;
|
|
def RC325 : NVPTXReg<"%rc325">;
|
|
def RC326 : NVPTXReg<"%rc326">;
|
|
def RC327 : NVPTXReg<"%rc327">;
|
|
def RC328 : NVPTXReg<"%rc328">;
|
|
def RC329 : NVPTXReg<"%rc329">;
|
|
def RC330 : NVPTXReg<"%rc330">;
|
|
def RC331 : NVPTXReg<"%rc331">;
|
|
def RC332 : NVPTXReg<"%rc332">;
|
|
def RC333 : NVPTXReg<"%rc333">;
|
|
def RC334 : NVPTXReg<"%rc334">;
|
|
def RC335 : NVPTXReg<"%rc335">;
|
|
def RC336 : NVPTXReg<"%rc336">;
|
|
def RC337 : NVPTXReg<"%rc337">;
|
|
def RC338 : NVPTXReg<"%rc338">;
|
|
def RC339 : NVPTXReg<"%rc339">;
|
|
def RC340 : NVPTXReg<"%rc340">;
|
|
def RC341 : NVPTXReg<"%rc341">;
|
|
def RC342 : NVPTXReg<"%rc342">;
|
|
def RC343 : NVPTXReg<"%rc343">;
|
|
def RC344 : NVPTXReg<"%rc344">;
|
|
def RC345 : NVPTXReg<"%rc345">;
|
|
def RC346 : NVPTXReg<"%rc346">;
|
|
def RC347 : NVPTXReg<"%rc347">;
|
|
def RC348 : NVPTXReg<"%rc348">;
|
|
def RC349 : NVPTXReg<"%rc349">;
|
|
def RC350 : NVPTXReg<"%rc350">;
|
|
def RC351 : NVPTXReg<"%rc351">;
|
|
def RC352 : NVPTXReg<"%rc352">;
|
|
def RC353 : NVPTXReg<"%rc353">;
|
|
def RC354 : NVPTXReg<"%rc354">;
|
|
def RC355 : NVPTXReg<"%rc355">;
|
|
def RC356 : NVPTXReg<"%rc356">;
|
|
def RC357 : NVPTXReg<"%rc357">;
|
|
def RC358 : NVPTXReg<"%rc358">;
|
|
def RC359 : NVPTXReg<"%rc359">;
|
|
def RC360 : NVPTXReg<"%rc360">;
|
|
def RC361 : NVPTXReg<"%rc361">;
|
|
def RC362 : NVPTXReg<"%rc362">;
|
|
def RC363 : NVPTXReg<"%rc363">;
|
|
def RC364 : NVPTXReg<"%rc364">;
|
|
def RC365 : NVPTXReg<"%rc365">;
|
|
def RC366 : NVPTXReg<"%rc366">;
|
|
def RC367 : NVPTXReg<"%rc367">;
|
|
def RC368 : NVPTXReg<"%rc368">;
|
|
def RC369 : NVPTXReg<"%rc369">;
|
|
def RC370 : NVPTXReg<"%rc370">;
|
|
def RC371 : NVPTXReg<"%rc371">;
|
|
def RC372 : NVPTXReg<"%rc372">;
|
|
def RC373 : NVPTXReg<"%rc373">;
|
|
def RC374 : NVPTXReg<"%rc374">;
|
|
def RC375 : NVPTXReg<"%rc375">;
|
|
def RC376 : NVPTXReg<"%rc376">;
|
|
def RC377 : NVPTXReg<"%rc377">;
|
|
def RC378 : NVPTXReg<"%rc378">;
|
|
def RC379 : NVPTXReg<"%rc379">;
|
|
def RC380 : NVPTXReg<"%rc380">;
|
|
def RC381 : NVPTXReg<"%rc381">;
|
|
def RC382 : NVPTXReg<"%rc382">;
|
|
def RC383 : NVPTXReg<"%rc383">;
|
|
def RC384 : NVPTXReg<"%rc384">;
|
|
def RC385 : NVPTXReg<"%rc385">;
|
|
def RC386 : NVPTXReg<"%rc386">;
|
|
def RC387 : NVPTXReg<"%rc387">;
|
|
def RC388 : NVPTXReg<"%rc388">;
|
|
def RC389 : NVPTXReg<"%rc389">;
|
|
def RC390 : NVPTXReg<"%rc390">;
|
|
def RC391 : NVPTXReg<"%rc391">;
|
|
def RC392 : NVPTXReg<"%rc392">;
|
|
def RC393 : NVPTXReg<"%rc393">;
|
|
def RC394 : NVPTXReg<"%rc394">;
|
|
def RC395 : NVPTXReg<"%rc395">;
|
|
|
|
//===--- 16-bit -----------------------------------------------------------===//
|
|
def RS0 : NVPTXReg<"%rs0">;
|
|
def RS1 : NVPTXReg<"%rs1">;
|
|
def RS2 : NVPTXReg<"%rs2">;
|
|
def RS3 : NVPTXReg<"%rs3">;
|
|
def RS4 : NVPTXReg<"%rs4">;
|
|
def RS5 : NVPTXReg<"%rs5">;
|
|
def RS6 : NVPTXReg<"%rs6">;
|
|
def RS7 : NVPTXReg<"%rs7">;
|
|
def RS8 : NVPTXReg<"%rs8">;
|
|
def RS9 : NVPTXReg<"%rs9">;
|
|
def RS10 : NVPTXReg<"%rs10">;
|
|
def RS11 : NVPTXReg<"%rs11">;
|
|
def RS12 : NVPTXReg<"%rs12">;
|
|
def RS13 : NVPTXReg<"%rs13">;
|
|
def RS14 : NVPTXReg<"%rs14">;
|
|
def RS15 : NVPTXReg<"%rs15">;
|
|
def RS16 : NVPTXReg<"%rs16">;
|
|
def RS17 : NVPTXReg<"%rs17">;
|
|
def RS18 : NVPTXReg<"%rs18">;
|
|
def RS19 : NVPTXReg<"%rs19">;
|
|
def RS20 : NVPTXReg<"%rs20">;
|
|
def RS21 : NVPTXReg<"%rs21">;
|
|
def RS22 : NVPTXReg<"%rs22">;
|
|
def RS23 : NVPTXReg<"%rs23">;
|
|
def RS24 : NVPTXReg<"%rs24">;
|
|
def RS25 : NVPTXReg<"%rs25">;
|
|
def RS26 : NVPTXReg<"%rs26">;
|
|
def RS27 : NVPTXReg<"%rs27">;
|
|
def RS28 : NVPTXReg<"%rs28">;
|
|
def RS29 : NVPTXReg<"%rs29">;
|
|
def RS30 : NVPTXReg<"%rs30">;
|
|
def RS31 : NVPTXReg<"%rs31">;
|
|
def RS32 : NVPTXReg<"%rs32">;
|
|
def RS33 : NVPTXReg<"%rs33">;
|
|
def RS34 : NVPTXReg<"%rs34">;
|
|
def RS35 : NVPTXReg<"%rs35">;
|
|
def RS36 : NVPTXReg<"%rs36">;
|
|
def RS37 : NVPTXReg<"%rs37">;
|
|
def RS38 : NVPTXReg<"%rs38">;
|
|
def RS39 : NVPTXReg<"%rs39">;
|
|
def RS40 : NVPTXReg<"%rs40">;
|
|
def RS41 : NVPTXReg<"%rs41">;
|
|
def RS42 : NVPTXReg<"%rs42">;
|
|
def RS43 : NVPTXReg<"%rs43">;
|
|
def RS44 : NVPTXReg<"%rs44">;
|
|
def RS45 : NVPTXReg<"%rs45">;
|
|
def RS46 : NVPTXReg<"%rs46">;
|
|
def RS47 : NVPTXReg<"%rs47">;
|
|
def RS48 : NVPTXReg<"%rs48">;
|
|
def RS49 : NVPTXReg<"%rs49">;
|
|
def RS50 : NVPTXReg<"%rs50">;
|
|
def RS51 : NVPTXReg<"%rs51">;
|
|
def RS52 : NVPTXReg<"%rs52">;
|
|
def RS53 : NVPTXReg<"%rs53">;
|
|
def RS54 : NVPTXReg<"%rs54">;
|
|
def RS55 : NVPTXReg<"%rs55">;
|
|
def RS56 : NVPTXReg<"%rs56">;
|
|
def RS57 : NVPTXReg<"%rs57">;
|
|
def RS58 : NVPTXReg<"%rs58">;
|
|
def RS59 : NVPTXReg<"%rs59">;
|
|
def RS60 : NVPTXReg<"%rs60">;
|
|
def RS61 : NVPTXReg<"%rs61">;
|
|
def RS62 : NVPTXReg<"%rs62">;
|
|
def RS63 : NVPTXReg<"%rs63">;
|
|
def RS64 : NVPTXReg<"%rs64">;
|
|
def RS65 : NVPTXReg<"%rs65">;
|
|
def RS66 : NVPTXReg<"%rs66">;
|
|
def RS67 : NVPTXReg<"%rs67">;
|
|
def RS68 : NVPTXReg<"%rs68">;
|
|
def RS69 : NVPTXReg<"%rs69">;
|
|
def RS70 : NVPTXReg<"%rs70">;
|
|
def RS71 : NVPTXReg<"%rs71">;
|
|
def RS72 : NVPTXReg<"%rs72">;
|
|
def RS73 : NVPTXReg<"%rs73">;
|
|
def RS74 : NVPTXReg<"%rs74">;
|
|
def RS75 : NVPTXReg<"%rs75">;
|
|
def RS76 : NVPTXReg<"%rs76">;
|
|
def RS77 : NVPTXReg<"%rs77">;
|
|
def RS78 : NVPTXReg<"%rs78">;
|
|
def RS79 : NVPTXReg<"%rs79">;
|
|
def RS80 : NVPTXReg<"%rs80">;
|
|
def RS81 : NVPTXReg<"%rs81">;
|
|
def RS82 : NVPTXReg<"%rs82">;
|
|
def RS83 : NVPTXReg<"%rs83">;
|
|
def RS84 : NVPTXReg<"%rs84">;
|
|
def RS85 : NVPTXReg<"%rs85">;
|
|
def RS86 : NVPTXReg<"%rs86">;
|
|
def RS87 : NVPTXReg<"%rs87">;
|
|
def RS88 : NVPTXReg<"%rs88">;
|
|
def RS89 : NVPTXReg<"%rs89">;
|
|
def RS90 : NVPTXReg<"%rs90">;
|
|
def RS91 : NVPTXReg<"%rs91">;
|
|
def RS92 : NVPTXReg<"%rs92">;
|
|
def RS93 : NVPTXReg<"%rs93">;
|
|
def RS94 : NVPTXReg<"%rs94">;
|
|
def RS95 : NVPTXReg<"%rs95">;
|
|
def RS96 : NVPTXReg<"%rs96">;
|
|
def RS97 : NVPTXReg<"%rs97">;
|
|
def RS98 : NVPTXReg<"%rs98">;
|
|
def RS99 : NVPTXReg<"%rs99">;
|
|
def RS100 : NVPTXReg<"%rs100">;
|
|
def RS101 : NVPTXReg<"%rs101">;
|
|
def RS102 : NVPTXReg<"%rs102">;
|
|
def RS103 : NVPTXReg<"%rs103">;
|
|
def RS104 : NVPTXReg<"%rs104">;
|
|
def RS105 : NVPTXReg<"%rs105">;
|
|
def RS106 : NVPTXReg<"%rs106">;
|
|
def RS107 : NVPTXReg<"%rs107">;
|
|
def RS108 : NVPTXReg<"%rs108">;
|
|
def RS109 : NVPTXReg<"%rs109">;
|
|
def RS110 : NVPTXReg<"%rs110">;
|
|
def RS111 : NVPTXReg<"%rs111">;
|
|
def RS112 : NVPTXReg<"%rs112">;
|
|
def RS113 : NVPTXReg<"%rs113">;
|
|
def RS114 : NVPTXReg<"%rs114">;
|
|
def RS115 : NVPTXReg<"%rs115">;
|
|
def RS116 : NVPTXReg<"%rs116">;
|
|
def RS117 : NVPTXReg<"%rs117">;
|
|
def RS118 : NVPTXReg<"%rs118">;
|
|
def RS119 : NVPTXReg<"%rs119">;
|
|
def RS120 : NVPTXReg<"%rs120">;
|
|
def RS121 : NVPTXReg<"%rs121">;
|
|
def RS122 : NVPTXReg<"%rs122">;
|
|
def RS123 : NVPTXReg<"%rs123">;
|
|
def RS124 : NVPTXReg<"%rs124">;
|
|
def RS125 : NVPTXReg<"%rs125">;
|
|
def RS126 : NVPTXReg<"%rs126">;
|
|
def RS127 : NVPTXReg<"%rs127">;
|
|
def RS128 : NVPTXReg<"%rs128">;
|
|
def RS129 : NVPTXReg<"%rs129">;
|
|
def RS130 : NVPTXReg<"%rs130">;
|
|
def RS131 : NVPTXReg<"%rs131">;
|
|
def RS132 : NVPTXReg<"%rs132">;
|
|
def RS133 : NVPTXReg<"%rs133">;
|
|
def RS134 : NVPTXReg<"%rs134">;
|
|
def RS135 : NVPTXReg<"%rs135">;
|
|
def RS136 : NVPTXReg<"%rs136">;
|
|
def RS137 : NVPTXReg<"%rs137">;
|
|
def RS138 : NVPTXReg<"%rs138">;
|
|
def RS139 : NVPTXReg<"%rs139">;
|
|
def RS140 : NVPTXReg<"%rs140">;
|
|
def RS141 : NVPTXReg<"%rs141">;
|
|
def RS142 : NVPTXReg<"%rs142">;
|
|
def RS143 : NVPTXReg<"%rs143">;
|
|
def RS144 : NVPTXReg<"%rs144">;
|
|
def RS145 : NVPTXReg<"%rs145">;
|
|
def RS146 : NVPTXReg<"%rs146">;
|
|
def RS147 : NVPTXReg<"%rs147">;
|
|
def RS148 : NVPTXReg<"%rs148">;
|
|
def RS149 : NVPTXReg<"%rs149">;
|
|
def RS150 : NVPTXReg<"%rs150">;
|
|
def RS151 : NVPTXReg<"%rs151">;
|
|
def RS152 : NVPTXReg<"%rs152">;
|
|
def RS153 : NVPTXReg<"%rs153">;
|
|
def RS154 : NVPTXReg<"%rs154">;
|
|
def RS155 : NVPTXReg<"%rs155">;
|
|
def RS156 : NVPTXReg<"%rs156">;
|
|
def RS157 : NVPTXReg<"%rs157">;
|
|
def RS158 : NVPTXReg<"%rs158">;
|
|
def RS159 : NVPTXReg<"%rs159">;
|
|
def RS160 : NVPTXReg<"%rs160">;
|
|
def RS161 : NVPTXReg<"%rs161">;
|
|
def RS162 : NVPTXReg<"%rs162">;
|
|
def RS163 : NVPTXReg<"%rs163">;
|
|
def RS164 : NVPTXReg<"%rs164">;
|
|
def RS165 : NVPTXReg<"%rs165">;
|
|
def RS166 : NVPTXReg<"%rs166">;
|
|
def RS167 : NVPTXReg<"%rs167">;
|
|
def RS168 : NVPTXReg<"%rs168">;
|
|
def RS169 : NVPTXReg<"%rs169">;
|
|
def RS170 : NVPTXReg<"%rs170">;
|
|
def RS171 : NVPTXReg<"%rs171">;
|
|
def RS172 : NVPTXReg<"%rs172">;
|
|
def RS173 : NVPTXReg<"%rs173">;
|
|
def RS174 : NVPTXReg<"%rs174">;
|
|
def RS175 : NVPTXReg<"%rs175">;
|
|
def RS176 : NVPTXReg<"%rs176">;
|
|
def RS177 : NVPTXReg<"%rs177">;
|
|
def RS178 : NVPTXReg<"%rs178">;
|
|
def RS179 : NVPTXReg<"%rs179">;
|
|
def RS180 : NVPTXReg<"%rs180">;
|
|
def RS181 : NVPTXReg<"%rs181">;
|
|
def RS182 : NVPTXReg<"%rs182">;
|
|
def RS183 : NVPTXReg<"%rs183">;
|
|
def RS184 : NVPTXReg<"%rs184">;
|
|
def RS185 : NVPTXReg<"%rs185">;
|
|
def RS186 : NVPTXReg<"%rs186">;
|
|
def RS187 : NVPTXReg<"%rs187">;
|
|
def RS188 : NVPTXReg<"%rs188">;
|
|
def RS189 : NVPTXReg<"%rs189">;
|
|
def RS190 : NVPTXReg<"%rs190">;
|
|
def RS191 : NVPTXReg<"%rs191">;
|
|
def RS192 : NVPTXReg<"%rs192">;
|
|
def RS193 : NVPTXReg<"%rs193">;
|
|
def RS194 : NVPTXReg<"%rs194">;
|
|
def RS195 : NVPTXReg<"%rs195">;
|
|
def RS196 : NVPTXReg<"%rs196">;
|
|
def RS197 : NVPTXReg<"%rs197">;
|
|
def RS198 : NVPTXReg<"%rs198">;
|
|
def RS199 : NVPTXReg<"%rs199">;
|
|
def RS200 : NVPTXReg<"%rs200">;
|
|
def RS201 : NVPTXReg<"%rs201">;
|
|
def RS202 : NVPTXReg<"%rs202">;
|
|
def RS203 : NVPTXReg<"%rs203">;
|
|
def RS204 : NVPTXReg<"%rs204">;
|
|
def RS205 : NVPTXReg<"%rs205">;
|
|
def RS206 : NVPTXReg<"%rs206">;
|
|
def RS207 : NVPTXReg<"%rs207">;
|
|
def RS208 : NVPTXReg<"%rs208">;
|
|
def RS209 : NVPTXReg<"%rs209">;
|
|
def RS210 : NVPTXReg<"%rs210">;
|
|
def RS211 : NVPTXReg<"%rs211">;
|
|
def RS212 : NVPTXReg<"%rs212">;
|
|
def RS213 : NVPTXReg<"%rs213">;
|
|
def RS214 : NVPTXReg<"%rs214">;
|
|
def RS215 : NVPTXReg<"%rs215">;
|
|
def RS216 : NVPTXReg<"%rs216">;
|
|
def RS217 : NVPTXReg<"%rs217">;
|
|
def RS218 : NVPTXReg<"%rs218">;
|
|
def RS219 : NVPTXReg<"%rs219">;
|
|
def RS220 : NVPTXReg<"%rs220">;
|
|
def RS221 : NVPTXReg<"%rs221">;
|
|
def RS222 : NVPTXReg<"%rs222">;
|
|
def RS223 : NVPTXReg<"%rs223">;
|
|
def RS224 : NVPTXReg<"%rs224">;
|
|
def RS225 : NVPTXReg<"%rs225">;
|
|
def RS226 : NVPTXReg<"%rs226">;
|
|
def RS227 : NVPTXReg<"%rs227">;
|
|
def RS228 : NVPTXReg<"%rs228">;
|
|
def RS229 : NVPTXReg<"%rs229">;
|
|
def RS230 : NVPTXReg<"%rs230">;
|
|
def RS231 : NVPTXReg<"%rs231">;
|
|
def RS232 : NVPTXReg<"%rs232">;
|
|
def RS233 : NVPTXReg<"%rs233">;
|
|
def RS234 : NVPTXReg<"%rs234">;
|
|
def RS235 : NVPTXReg<"%rs235">;
|
|
def RS236 : NVPTXReg<"%rs236">;
|
|
def RS237 : NVPTXReg<"%rs237">;
|
|
def RS238 : NVPTXReg<"%rs238">;
|
|
def RS239 : NVPTXReg<"%rs239">;
|
|
def RS240 : NVPTXReg<"%rs240">;
|
|
def RS241 : NVPTXReg<"%rs241">;
|
|
def RS242 : NVPTXReg<"%rs242">;
|
|
def RS243 : NVPTXReg<"%rs243">;
|
|
def RS244 : NVPTXReg<"%rs244">;
|
|
def RS245 : NVPTXReg<"%rs245">;
|
|
def RS246 : NVPTXReg<"%rs246">;
|
|
def RS247 : NVPTXReg<"%rs247">;
|
|
def RS248 : NVPTXReg<"%rs248">;
|
|
def RS249 : NVPTXReg<"%rs249">;
|
|
def RS250 : NVPTXReg<"%rs250">;
|
|
def RS251 : NVPTXReg<"%rs251">;
|
|
def RS252 : NVPTXReg<"%rs252">;
|
|
def RS253 : NVPTXReg<"%rs253">;
|
|
def RS254 : NVPTXReg<"%rs254">;
|
|
def RS255 : NVPTXReg<"%rs255">;
|
|
def RS256 : NVPTXReg<"%rs256">;
|
|
def RS257 : NVPTXReg<"%rs257">;
|
|
def RS258 : NVPTXReg<"%rs258">;
|
|
def RS259 : NVPTXReg<"%rs259">;
|
|
def RS260 : NVPTXReg<"%rs260">;
|
|
def RS261 : NVPTXReg<"%rs261">;
|
|
def RS262 : NVPTXReg<"%rs262">;
|
|
def RS263 : NVPTXReg<"%rs263">;
|
|
def RS264 : NVPTXReg<"%rs264">;
|
|
def RS265 : NVPTXReg<"%rs265">;
|
|
def RS266 : NVPTXReg<"%rs266">;
|
|
def RS267 : NVPTXReg<"%rs267">;
|
|
def RS268 : NVPTXReg<"%rs268">;
|
|
def RS269 : NVPTXReg<"%rs269">;
|
|
def RS270 : NVPTXReg<"%rs270">;
|
|
def RS271 : NVPTXReg<"%rs271">;
|
|
def RS272 : NVPTXReg<"%rs272">;
|
|
def RS273 : NVPTXReg<"%rs273">;
|
|
def RS274 : NVPTXReg<"%rs274">;
|
|
def RS275 : NVPTXReg<"%rs275">;
|
|
def RS276 : NVPTXReg<"%rs276">;
|
|
def RS277 : NVPTXReg<"%rs277">;
|
|
def RS278 : NVPTXReg<"%rs278">;
|
|
def RS279 : NVPTXReg<"%rs279">;
|
|
def RS280 : NVPTXReg<"%rs280">;
|
|
def RS281 : NVPTXReg<"%rs281">;
|
|
def RS282 : NVPTXReg<"%rs282">;
|
|
def RS283 : NVPTXReg<"%rs283">;
|
|
def RS284 : NVPTXReg<"%rs284">;
|
|
def RS285 : NVPTXReg<"%rs285">;
|
|
def RS286 : NVPTXReg<"%rs286">;
|
|
def RS287 : NVPTXReg<"%rs287">;
|
|
def RS288 : NVPTXReg<"%rs288">;
|
|
def RS289 : NVPTXReg<"%rs289">;
|
|
def RS290 : NVPTXReg<"%rs290">;
|
|
def RS291 : NVPTXReg<"%rs291">;
|
|
def RS292 : NVPTXReg<"%rs292">;
|
|
def RS293 : NVPTXReg<"%rs293">;
|
|
def RS294 : NVPTXReg<"%rs294">;
|
|
def RS295 : NVPTXReg<"%rs295">;
|
|
def RS296 : NVPTXReg<"%rs296">;
|
|
def RS297 : NVPTXReg<"%rs297">;
|
|
def RS298 : NVPTXReg<"%rs298">;
|
|
def RS299 : NVPTXReg<"%rs299">;
|
|
def RS300 : NVPTXReg<"%rs300">;
|
|
def RS301 : NVPTXReg<"%rs301">;
|
|
def RS302 : NVPTXReg<"%rs302">;
|
|
def RS303 : NVPTXReg<"%rs303">;
|
|
def RS304 : NVPTXReg<"%rs304">;
|
|
def RS305 : NVPTXReg<"%rs305">;
|
|
def RS306 : NVPTXReg<"%rs306">;
|
|
def RS307 : NVPTXReg<"%rs307">;
|
|
def RS308 : NVPTXReg<"%rs308">;
|
|
def RS309 : NVPTXReg<"%rs309">;
|
|
def RS310 : NVPTXReg<"%rs310">;
|
|
def RS311 : NVPTXReg<"%rs311">;
|
|
def RS312 : NVPTXReg<"%rs312">;
|
|
def RS313 : NVPTXReg<"%rs313">;
|
|
def RS314 : NVPTXReg<"%rs314">;
|
|
def RS315 : NVPTXReg<"%rs315">;
|
|
def RS316 : NVPTXReg<"%rs316">;
|
|
def RS317 : NVPTXReg<"%rs317">;
|
|
def RS318 : NVPTXReg<"%rs318">;
|
|
def RS319 : NVPTXReg<"%rs319">;
|
|
def RS320 : NVPTXReg<"%rs320">;
|
|
def RS321 : NVPTXReg<"%rs321">;
|
|
def RS322 : NVPTXReg<"%rs322">;
|
|
def RS323 : NVPTXReg<"%rs323">;
|
|
def RS324 : NVPTXReg<"%rs324">;
|
|
def RS325 : NVPTXReg<"%rs325">;
|
|
def RS326 : NVPTXReg<"%rs326">;
|
|
def RS327 : NVPTXReg<"%rs327">;
|
|
def RS328 : NVPTXReg<"%rs328">;
|
|
def RS329 : NVPTXReg<"%rs329">;
|
|
def RS330 : NVPTXReg<"%rs330">;
|
|
def RS331 : NVPTXReg<"%rs331">;
|
|
def RS332 : NVPTXReg<"%rs332">;
|
|
def RS333 : NVPTXReg<"%rs333">;
|
|
def RS334 : NVPTXReg<"%rs334">;
|
|
def RS335 : NVPTXReg<"%rs335">;
|
|
def RS336 : NVPTXReg<"%rs336">;
|
|
def RS337 : NVPTXReg<"%rs337">;
|
|
def RS338 : NVPTXReg<"%rs338">;
|
|
def RS339 : NVPTXReg<"%rs339">;
|
|
def RS340 : NVPTXReg<"%rs340">;
|
|
def RS341 : NVPTXReg<"%rs341">;
|
|
def RS342 : NVPTXReg<"%rs342">;
|
|
def RS343 : NVPTXReg<"%rs343">;
|
|
def RS344 : NVPTXReg<"%rs344">;
|
|
def RS345 : NVPTXReg<"%rs345">;
|
|
def RS346 : NVPTXReg<"%rs346">;
|
|
def RS347 : NVPTXReg<"%rs347">;
|
|
def RS348 : NVPTXReg<"%rs348">;
|
|
def RS349 : NVPTXReg<"%rs349">;
|
|
def RS350 : NVPTXReg<"%rs350">;
|
|
def RS351 : NVPTXReg<"%rs351">;
|
|
def RS352 : NVPTXReg<"%rs352">;
|
|
def RS353 : NVPTXReg<"%rs353">;
|
|
def RS354 : NVPTXReg<"%rs354">;
|
|
def RS355 : NVPTXReg<"%rs355">;
|
|
def RS356 : NVPTXReg<"%rs356">;
|
|
def RS357 : NVPTXReg<"%rs357">;
|
|
def RS358 : NVPTXReg<"%rs358">;
|
|
def RS359 : NVPTXReg<"%rs359">;
|
|
def RS360 : NVPTXReg<"%rs360">;
|
|
def RS361 : NVPTXReg<"%rs361">;
|
|
def RS362 : NVPTXReg<"%rs362">;
|
|
def RS363 : NVPTXReg<"%rs363">;
|
|
def RS364 : NVPTXReg<"%rs364">;
|
|
def RS365 : NVPTXReg<"%rs365">;
|
|
def RS366 : NVPTXReg<"%rs366">;
|
|
def RS367 : NVPTXReg<"%rs367">;
|
|
def RS368 : NVPTXReg<"%rs368">;
|
|
def RS369 : NVPTXReg<"%rs369">;
|
|
def RS370 : NVPTXReg<"%rs370">;
|
|
def RS371 : NVPTXReg<"%rs371">;
|
|
def RS372 : NVPTXReg<"%rs372">;
|
|
def RS373 : NVPTXReg<"%rs373">;
|
|
def RS374 : NVPTXReg<"%rs374">;
|
|
def RS375 : NVPTXReg<"%rs375">;
|
|
def RS376 : NVPTXReg<"%rs376">;
|
|
def RS377 : NVPTXReg<"%rs377">;
|
|
def RS378 : NVPTXReg<"%rs378">;
|
|
def RS379 : NVPTXReg<"%rs379">;
|
|
def RS380 : NVPTXReg<"%rs380">;
|
|
def RS381 : NVPTXReg<"%rs381">;
|
|
def RS382 : NVPTXReg<"%rs382">;
|
|
def RS383 : NVPTXReg<"%rs383">;
|
|
def RS384 : NVPTXReg<"%rs384">;
|
|
def RS385 : NVPTXReg<"%rs385">;
|
|
def RS386 : NVPTXReg<"%rs386">;
|
|
def RS387 : NVPTXReg<"%rs387">;
|
|
def RS388 : NVPTXReg<"%rs388">;
|
|
def RS389 : NVPTXReg<"%rs389">;
|
|
def RS390 : NVPTXReg<"%rs390">;
|
|
def RS391 : NVPTXReg<"%rs391">;
|
|
def RS392 : NVPTXReg<"%rs392">;
|
|
def RS393 : NVPTXReg<"%rs393">;
|
|
def RS394 : NVPTXReg<"%rs394">;
|
|
def RS395 : NVPTXReg<"%rs395">;
|
|
|
|
//===--- 32-bit -----------------------------------------------------------===//
|
|
def R0 : NVPTXReg<"%r0">;
|
|
def R1 : NVPTXReg<"%r1">;
|
|
def R2 : NVPTXReg<"%r2">;
|
|
def R3 : NVPTXReg<"%r3">;
|
|
def R4 : NVPTXReg<"%r4">;
|
|
def R5 : NVPTXReg<"%r5">;
|
|
def R6 : NVPTXReg<"%r6">;
|
|
def R7 : NVPTXReg<"%r7">;
|
|
def R8 : NVPTXReg<"%r8">;
|
|
def R9 : NVPTXReg<"%r9">;
|
|
def R10 : NVPTXReg<"%r10">;
|
|
def R11 : NVPTXReg<"%r11">;
|
|
def R12 : NVPTXReg<"%r12">;
|
|
def R13 : NVPTXReg<"%r13">;
|
|
def R14 : NVPTXReg<"%r14">;
|
|
def R15 : NVPTXReg<"%r15">;
|
|
def R16 : NVPTXReg<"%r16">;
|
|
def R17 : NVPTXReg<"%r17">;
|
|
def R18 : NVPTXReg<"%r18">;
|
|
def R19 : NVPTXReg<"%r19">;
|
|
def R20 : NVPTXReg<"%r20">;
|
|
def R21 : NVPTXReg<"%r21">;
|
|
def R22 : NVPTXReg<"%r22">;
|
|
def R23 : NVPTXReg<"%r23">;
|
|
def R24 : NVPTXReg<"%r24">;
|
|
def R25 : NVPTXReg<"%r25">;
|
|
def R26 : NVPTXReg<"%r26">;
|
|
def R27 : NVPTXReg<"%r27">;
|
|
def R28 : NVPTXReg<"%r28">;
|
|
def R29 : NVPTXReg<"%r29">;
|
|
def R30 : NVPTXReg<"%r30">;
|
|
def R31 : NVPTXReg<"%r31">;
|
|
def R32 : NVPTXReg<"%r32">;
|
|
def R33 : NVPTXReg<"%r33">;
|
|
def R34 : NVPTXReg<"%r34">;
|
|
def R35 : NVPTXReg<"%r35">;
|
|
def R36 : NVPTXReg<"%r36">;
|
|
def R37 : NVPTXReg<"%r37">;
|
|
def R38 : NVPTXReg<"%r38">;
|
|
def R39 : NVPTXReg<"%r39">;
|
|
def R40 : NVPTXReg<"%r40">;
|
|
def R41 : NVPTXReg<"%r41">;
|
|
def R42 : NVPTXReg<"%r42">;
|
|
def R43 : NVPTXReg<"%r43">;
|
|
def R44 : NVPTXReg<"%r44">;
|
|
def R45 : NVPTXReg<"%r45">;
|
|
def R46 : NVPTXReg<"%r46">;
|
|
def R47 : NVPTXReg<"%r47">;
|
|
def R48 : NVPTXReg<"%r48">;
|
|
def R49 : NVPTXReg<"%r49">;
|
|
def R50 : NVPTXReg<"%r50">;
|
|
def R51 : NVPTXReg<"%r51">;
|
|
def R52 : NVPTXReg<"%r52">;
|
|
def R53 : NVPTXReg<"%r53">;
|
|
def R54 : NVPTXReg<"%r54">;
|
|
def R55 : NVPTXReg<"%r55">;
|
|
def R56 : NVPTXReg<"%r56">;
|
|
def R57 : NVPTXReg<"%r57">;
|
|
def R58 : NVPTXReg<"%r58">;
|
|
def R59 : NVPTXReg<"%r59">;
|
|
def R60 : NVPTXReg<"%r60">;
|
|
def R61 : NVPTXReg<"%r61">;
|
|
def R62 : NVPTXReg<"%r62">;
|
|
def R63 : NVPTXReg<"%r63">;
|
|
def R64 : NVPTXReg<"%r64">;
|
|
def R65 : NVPTXReg<"%r65">;
|
|
def R66 : NVPTXReg<"%r66">;
|
|
def R67 : NVPTXReg<"%r67">;
|
|
def R68 : NVPTXReg<"%r68">;
|
|
def R69 : NVPTXReg<"%r69">;
|
|
def R70 : NVPTXReg<"%r70">;
|
|
def R71 : NVPTXReg<"%r71">;
|
|
def R72 : NVPTXReg<"%r72">;
|
|
def R73 : NVPTXReg<"%r73">;
|
|
def R74 : NVPTXReg<"%r74">;
|
|
def R75 : NVPTXReg<"%r75">;
|
|
def R76 : NVPTXReg<"%r76">;
|
|
def R77 : NVPTXReg<"%r77">;
|
|
def R78 : NVPTXReg<"%r78">;
|
|
def R79 : NVPTXReg<"%r79">;
|
|
def R80 : NVPTXReg<"%r80">;
|
|
def R81 : NVPTXReg<"%r81">;
|
|
def R82 : NVPTXReg<"%r82">;
|
|
def R83 : NVPTXReg<"%r83">;
|
|
def R84 : NVPTXReg<"%r84">;
|
|
def R85 : NVPTXReg<"%r85">;
|
|
def R86 : NVPTXReg<"%r86">;
|
|
def R87 : NVPTXReg<"%r87">;
|
|
def R88 : NVPTXReg<"%r88">;
|
|
def R89 : NVPTXReg<"%r89">;
|
|
def R90 : NVPTXReg<"%r90">;
|
|
def R91 : NVPTXReg<"%r91">;
|
|
def R92 : NVPTXReg<"%r92">;
|
|
def R93 : NVPTXReg<"%r93">;
|
|
def R94 : NVPTXReg<"%r94">;
|
|
def R95 : NVPTXReg<"%r95">;
|
|
def R96 : NVPTXReg<"%r96">;
|
|
def R97 : NVPTXReg<"%r97">;
|
|
def R98 : NVPTXReg<"%r98">;
|
|
def R99 : NVPTXReg<"%r99">;
|
|
def R100 : NVPTXReg<"%r100">;
|
|
def R101 : NVPTXReg<"%r101">;
|
|
def R102 : NVPTXReg<"%r102">;
|
|
def R103 : NVPTXReg<"%r103">;
|
|
def R104 : NVPTXReg<"%r104">;
|
|
def R105 : NVPTXReg<"%r105">;
|
|
def R106 : NVPTXReg<"%r106">;
|
|
def R107 : NVPTXReg<"%r107">;
|
|
def R108 : NVPTXReg<"%r108">;
|
|
def R109 : NVPTXReg<"%r109">;
|
|
def R110 : NVPTXReg<"%r110">;
|
|
def R111 : NVPTXReg<"%r111">;
|
|
def R112 : NVPTXReg<"%r112">;
|
|
def R113 : NVPTXReg<"%r113">;
|
|
def R114 : NVPTXReg<"%r114">;
|
|
def R115 : NVPTXReg<"%r115">;
|
|
def R116 : NVPTXReg<"%r116">;
|
|
def R117 : NVPTXReg<"%r117">;
|
|
def R118 : NVPTXReg<"%r118">;
|
|
def R119 : NVPTXReg<"%r119">;
|
|
def R120 : NVPTXReg<"%r120">;
|
|
def R121 : NVPTXReg<"%r121">;
|
|
def R122 : NVPTXReg<"%r122">;
|
|
def R123 : NVPTXReg<"%r123">;
|
|
def R124 : NVPTXReg<"%r124">;
|
|
def R125 : NVPTXReg<"%r125">;
|
|
def R126 : NVPTXReg<"%r126">;
|
|
def R127 : NVPTXReg<"%r127">;
|
|
def R128 : NVPTXReg<"%r128">;
|
|
def R129 : NVPTXReg<"%r129">;
|
|
def R130 : NVPTXReg<"%r130">;
|
|
def R131 : NVPTXReg<"%r131">;
|
|
def R132 : NVPTXReg<"%r132">;
|
|
def R133 : NVPTXReg<"%r133">;
|
|
def R134 : NVPTXReg<"%r134">;
|
|
def R135 : NVPTXReg<"%r135">;
|
|
def R136 : NVPTXReg<"%r136">;
|
|
def R137 : NVPTXReg<"%r137">;
|
|
def R138 : NVPTXReg<"%r138">;
|
|
def R139 : NVPTXReg<"%r139">;
|
|
def R140 : NVPTXReg<"%r140">;
|
|
def R141 : NVPTXReg<"%r141">;
|
|
def R142 : NVPTXReg<"%r142">;
|
|
def R143 : NVPTXReg<"%r143">;
|
|
def R144 : NVPTXReg<"%r144">;
|
|
def R145 : NVPTXReg<"%r145">;
|
|
def R146 : NVPTXReg<"%r146">;
|
|
def R147 : NVPTXReg<"%r147">;
|
|
def R148 : NVPTXReg<"%r148">;
|
|
def R149 : NVPTXReg<"%r149">;
|
|
def R150 : NVPTXReg<"%r150">;
|
|
def R151 : NVPTXReg<"%r151">;
|
|
def R152 : NVPTXReg<"%r152">;
|
|
def R153 : NVPTXReg<"%r153">;
|
|
def R154 : NVPTXReg<"%r154">;
|
|
def R155 : NVPTXReg<"%r155">;
|
|
def R156 : NVPTXReg<"%r156">;
|
|
def R157 : NVPTXReg<"%r157">;
|
|
def R158 : NVPTXReg<"%r158">;
|
|
def R159 : NVPTXReg<"%r159">;
|
|
def R160 : NVPTXReg<"%r160">;
|
|
def R161 : NVPTXReg<"%r161">;
|
|
def R162 : NVPTXReg<"%r162">;
|
|
def R163 : NVPTXReg<"%r163">;
|
|
def R164 : NVPTXReg<"%r164">;
|
|
def R165 : NVPTXReg<"%r165">;
|
|
def R166 : NVPTXReg<"%r166">;
|
|
def R167 : NVPTXReg<"%r167">;
|
|
def R168 : NVPTXReg<"%r168">;
|
|
def R169 : NVPTXReg<"%r169">;
|
|
def R170 : NVPTXReg<"%r170">;
|
|
def R171 : NVPTXReg<"%r171">;
|
|
def R172 : NVPTXReg<"%r172">;
|
|
def R173 : NVPTXReg<"%r173">;
|
|
def R174 : NVPTXReg<"%r174">;
|
|
def R175 : NVPTXReg<"%r175">;
|
|
def R176 : NVPTXReg<"%r176">;
|
|
def R177 : NVPTXReg<"%r177">;
|
|
def R178 : NVPTXReg<"%r178">;
|
|
def R179 : NVPTXReg<"%r179">;
|
|
def R180 : NVPTXReg<"%r180">;
|
|
def R181 : NVPTXReg<"%r181">;
|
|
def R182 : NVPTXReg<"%r182">;
|
|
def R183 : NVPTXReg<"%r183">;
|
|
def R184 : NVPTXReg<"%r184">;
|
|
def R185 : NVPTXReg<"%r185">;
|
|
def R186 : NVPTXReg<"%r186">;
|
|
def R187 : NVPTXReg<"%r187">;
|
|
def R188 : NVPTXReg<"%r188">;
|
|
def R189 : NVPTXReg<"%r189">;
|
|
def R190 : NVPTXReg<"%r190">;
|
|
def R191 : NVPTXReg<"%r191">;
|
|
def R192 : NVPTXReg<"%r192">;
|
|
def R193 : NVPTXReg<"%r193">;
|
|
def R194 : NVPTXReg<"%r194">;
|
|
def R195 : NVPTXReg<"%r195">;
|
|
def R196 : NVPTXReg<"%r196">;
|
|
def R197 : NVPTXReg<"%r197">;
|
|
def R198 : NVPTXReg<"%r198">;
|
|
def R199 : NVPTXReg<"%r199">;
|
|
def R200 : NVPTXReg<"%r200">;
|
|
def R201 : NVPTXReg<"%r201">;
|
|
def R202 : NVPTXReg<"%r202">;
|
|
def R203 : NVPTXReg<"%r203">;
|
|
def R204 : NVPTXReg<"%r204">;
|
|
def R205 : NVPTXReg<"%r205">;
|
|
def R206 : NVPTXReg<"%r206">;
|
|
def R207 : NVPTXReg<"%r207">;
|
|
def R208 : NVPTXReg<"%r208">;
|
|
def R209 : NVPTXReg<"%r209">;
|
|
def R210 : NVPTXReg<"%r210">;
|
|
def R211 : NVPTXReg<"%r211">;
|
|
def R212 : NVPTXReg<"%r212">;
|
|
def R213 : NVPTXReg<"%r213">;
|
|
def R214 : NVPTXReg<"%r214">;
|
|
def R215 : NVPTXReg<"%r215">;
|
|
def R216 : NVPTXReg<"%r216">;
|
|
def R217 : NVPTXReg<"%r217">;
|
|
def R218 : NVPTXReg<"%r218">;
|
|
def R219 : NVPTXReg<"%r219">;
|
|
def R220 : NVPTXReg<"%r220">;
|
|
def R221 : NVPTXReg<"%r221">;
|
|
def R222 : NVPTXReg<"%r222">;
|
|
def R223 : NVPTXReg<"%r223">;
|
|
def R224 : NVPTXReg<"%r224">;
|
|
def R225 : NVPTXReg<"%r225">;
|
|
def R226 : NVPTXReg<"%r226">;
|
|
def R227 : NVPTXReg<"%r227">;
|
|
def R228 : NVPTXReg<"%r228">;
|
|
def R229 : NVPTXReg<"%r229">;
|
|
def R230 : NVPTXReg<"%r230">;
|
|
def R231 : NVPTXReg<"%r231">;
|
|
def R232 : NVPTXReg<"%r232">;
|
|
def R233 : NVPTXReg<"%r233">;
|
|
def R234 : NVPTXReg<"%r234">;
|
|
def R235 : NVPTXReg<"%r235">;
|
|
def R236 : NVPTXReg<"%r236">;
|
|
def R237 : NVPTXReg<"%r237">;
|
|
def R238 : NVPTXReg<"%r238">;
|
|
def R239 : NVPTXReg<"%r239">;
|
|
def R240 : NVPTXReg<"%r240">;
|
|
def R241 : NVPTXReg<"%r241">;
|
|
def R242 : NVPTXReg<"%r242">;
|
|
def R243 : NVPTXReg<"%r243">;
|
|
def R244 : NVPTXReg<"%r244">;
|
|
def R245 : NVPTXReg<"%r245">;
|
|
def R246 : NVPTXReg<"%r246">;
|
|
def R247 : NVPTXReg<"%r247">;
|
|
def R248 : NVPTXReg<"%r248">;
|
|
def R249 : NVPTXReg<"%r249">;
|
|
def R250 : NVPTXReg<"%r250">;
|
|
def R251 : NVPTXReg<"%r251">;
|
|
def R252 : NVPTXReg<"%r252">;
|
|
def R253 : NVPTXReg<"%r253">;
|
|
def R254 : NVPTXReg<"%r254">;
|
|
def R255 : NVPTXReg<"%r255">;
|
|
def R256 : NVPTXReg<"%r256">;
|
|
def R257 : NVPTXReg<"%r257">;
|
|
def R258 : NVPTXReg<"%r258">;
|
|
def R259 : NVPTXReg<"%r259">;
|
|
def R260 : NVPTXReg<"%r260">;
|
|
def R261 : NVPTXReg<"%r261">;
|
|
def R262 : NVPTXReg<"%r262">;
|
|
def R263 : NVPTXReg<"%r263">;
|
|
def R264 : NVPTXReg<"%r264">;
|
|
def R265 : NVPTXReg<"%r265">;
|
|
def R266 : NVPTXReg<"%r266">;
|
|
def R267 : NVPTXReg<"%r267">;
|
|
def R268 : NVPTXReg<"%r268">;
|
|
def R269 : NVPTXReg<"%r269">;
|
|
def R270 : NVPTXReg<"%r270">;
|
|
def R271 : NVPTXReg<"%r271">;
|
|
def R272 : NVPTXReg<"%r272">;
|
|
def R273 : NVPTXReg<"%r273">;
|
|
def R274 : NVPTXReg<"%r274">;
|
|
def R275 : NVPTXReg<"%r275">;
|
|
def R276 : NVPTXReg<"%r276">;
|
|
def R277 : NVPTXReg<"%r277">;
|
|
def R278 : NVPTXReg<"%r278">;
|
|
def R279 : NVPTXReg<"%r279">;
|
|
def R280 : NVPTXReg<"%r280">;
|
|
def R281 : NVPTXReg<"%r281">;
|
|
def R282 : NVPTXReg<"%r282">;
|
|
def R283 : NVPTXReg<"%r283">;
|
|
def R284 : NVPTXReg<"%r284">;
|
|
def R285 : NVPTXReg<"%r285">;
|
|
def R286 : NVPTXReg<"%r286">;
|
|
def R287 : NVPTXReg<"%r287">;
|
|
def R288 : NVPTXReg<"%r288">;
|
|
def R289 : NVPTXReg<"%r289">;
|
|
def R290 : NVPTXReg<"%r290">;
|
|
def R291 : NVPTXReg<"%r291">;
|
|
def R292 : NVPTXReg<"%r292">;
|
|
def R293 : NVPTXReg<"%r293">;
|
|
def R294 : NVPTXReg<"%r294">;
|
|
def R295 : NVPTXReg<"%r295">;
|
|
def R296 : NVPTXReg<"%r296">;
|
|
def R297 : NVPTXReg<"%r297">;
|
|
def R298 : NVPTXReg<"%r298">;
|
|
def R299 : NVPTXReg<"%r299">;
|
|
def R300 : NVPTXReg<"%r300">;
|
|
def R301 : NVPTXReg<"%r301">;
|
|
def R302 : NVPTXReg<"%r302">;
|
|
def R303 : NVPTXReg<"%r303">;
|
|
def R304 : NVPTXReg<"%r304">;
|
|
def R305 : NVPTXReg<"%r305">;
|
|
def R306 : NVPTXReg<"%r306">;
|
|
def R307 : NVPTXReg<"%r307">;
|
|
def R308 : NVPTXReg<"%r308">;
|
|
def R309 : NVPTXReg<"%r309">;
|
|
def R310 : NVPTXReg<"%r310">;
|
|
def R311 : NVPTXReg<"%r311">;
|
|
def R312 : NVPTXReg<"%r312">;
|
|
def R313 : NVPTXReg<"%r313">;
|
|
def R314 : NVPTXReg<"%r314">;
|
|
def R315 : NVPTXReg<"%r315">;
|
|
def R316 : NVPTXReg<"%r316">;
|
|
def R317 : NVPTXReg<"%r317">;
|
|
def R318 : NVPTXReg<"%r318">;
|
|
def R319 : NVPTXReg<"%r319">;
|
|
def R320 : NVPTXReg<"%r320">;
|
|
def R321 : NVPTXReg<"%r321">;
|
|
def R322 : NVPTXReg<"%r322">;
|
|
def R323 : NVPTXReg<"%r323">;
|
|
def R324 : NVPTXReg<"%r324">;
|
|
def R325 : NVPTXReg<"%r325">;
|
|
def R326 : NVPTXReg<"%r326">;
|
|
def R327 : NVPTXReg<"%r327">;
|
|
def R328 : NVPTXReg<"%r328">;
|
|
def R329 : NVPTXReg<"%r329">;
|
|
def R330 : NVPTXReg<"%r330">;
|
|
def R331 : NVPTXReg<"%r331">;
|
|
def R332 : NVPTXReg<"%r332">;
|
|
def R333 : NVPTXReg<"%r333">;
|
|
def R334 : NVPTXReg<"%r334">;
|
|
def R335 : NVPTXReg<"%r335">;
|
|
def R336 : NVPTXReg<"%r336">;
|
|
def R337 : NVPTXReg<"%r337">;
|
|
def R338 : NVPTXReg<"%r338">;
|
|
def R339 : NVPTXReg<"%r339">;
|
|
def R340 : NVPTXReg<"%r340">;
|
|
def R341 : NVPTXReg<"%r341">;
|
|
def R342 : NVPTXReg<"%r342">;
|
|
def R343 : NVPTXReg<"%r343">;
|
|
def R344 : NVPTXReg<"%r344">;
|
|
def R345 : NVPTXReg<"%r345">;
|
|
def R346 : NVPTXReg<"%r346">;
|
|
def R347 : NVPTXReg<"%r347">;
|
|
def R348 : NVPTXReg<"%r348">;
|
|
def R349 : NVPTXReg<"%r349">;
|
|
def R350 : NVPTXReg<"%r350">;
|
|
def R351 : NVPTXReg<"%r351">;
|
|
def R352 : NVPTXReg<"%r352">;
|
|
def R353 : NVPTXReg<"%r353">;
|
|
def R354 : NVPTXReg<"%r354">;
|
|
def R355 : NVPTXReg<"%r355">;
|
|
def R356 : NVPTXReg<"%r356">;
|
|
def R357 : NVPTXReg<"%r357">;
|
|
def R358 : NVPTXReg<"%r358">;
|
|
def R359 : NVPTXReg<"%r359">;
|
|
def R360 : NVPTXReg<"%r360">;
|
|
def R361 : NVPTXReg<"%r361">;
|
|
def R362 : NVPTXReg<"%r362">;
|
|
def R363 : NVPTXReg<"%r363">;
|
|
def R364 : NVPTXReg<"%r364">;
|
|
def R365 : NVPTXReg<"%r365">;
|
|
def R366 : NVPTXReg<"%r366">;
|
|
def R367 : NVPTXReg<"%r367">;
|
|
def R368 : NVPTXReg<"%r368">;
|
|
def R369 : NVPTXReg<"%r369">;
|
|
def R370 : NVPTXReg<"%r370">;
|
|
def R371 : NVPTXReg<"%r371">;
|
|
def R372 : NVPTXReg<"%r372">;
|
|
def R373 : NVPTXReg<"%r373">;
|
|
def R374 : NVPTXReg<"%r374">;
|
|
def R375 : NVPTXReg<"%r375">;
|
|
def R376 : NVPTXReg<"%r376">;
|
|
def R377 : NVPTXReg<"%r377">;
|
|
def R378 : NVPTXReg<"%r378">;
|
|
def R379 : NVPTXReg<"%r379">;
|
|
def R380 : NVPTXReg<"%r380">;
|
|
def R381 : NVPTXReg<"%r381">;
|
|
def R382 : NVPTXReg<"%r382">;
|
|
def R383 : NVPTXReg<"%r383">;
|
|
def R384 : NVPTXReg<"%r384">;
|
|
def R385 : NVPTXReg<"%r385">;
|
|
def R386 : NVPTXReg<"%r386">;
|
|
def R387 : NVPTXReg<"%r387">;
|
|
def R388 : NVPTXReg<"%r388">;
|
|
def R389 : NVPTXReg<"%r389">;
|
|
def R390 : NVPTXReg<"%r390">;
|
|
def R391 : NVPTXReg<"%r391">;
|
|
def R392 : NVPTXReg<"%r392">;
|
|
def R393 : NVPTXReg<"%r393">;
|
|
def R394 : NVPTXReg<"%r394">;
|
|
def R395 : NVPTXReg<"%r395">;
|
|
|
|
//===--- 64-bit -----------------------------------------------------------===//
|
|
def RL0 : NVPTXReg<"%rl0">;
|
|
def RL1 : NVPTXReg<"%rl1">;
|
|
def RL2 : NVPTXReg<"%rl2">;
|
|
def RL3 : NVPTXReg<"%rl3">;
|
|
def RL4 : NVPTXReg<"%rl4">;
|
|
def RL5 : NVPTXReg<"%rl5">;
|
|
def RL6 : NVPTXReg<"%rl6">;
|
|
def RL7 : NVPTXReg<"%rl7">;
|
|
def RL8 : NVPTXReg<"%rl8">;
|
|
def RL9 : NVPTXReg<"%rl9">;
|
|
def RL10 : NVPTXReg<"%rl10">;
|
|
def RL11 : NVPTXReg<"%rl11">;
|
|
def RL12 : NVPTXReg<"%rl12">;
|
|
def RL13 : NVPTXReg<"%rl13">;
|
|
def RL14 : NVPTXReg<"%rl14">;
|
|
def RL15 : NVPTXReg<"%rl15">;
|
|
def RL16 : NVPTXReg<"%rl16">;
|
|
def RL17 : NVPTXReg<"%rl17">;
|
|
def RL18 : NVPTXReg<"%rl18">;
|
|
def RL19 : NVPTXReg<"%rl19">;
|
|
def RL20 : NVPTXReg<"%rl20">;
|
|
def RL21 : NVPTXReg<"%rl21">;
|
|
def RL22 : NVPTXReg<"%rl22">;
|
|
def RL23 : NVPTXReg<"%rl23">;
|
|
def RL24 : NVPTXReg<"%rl24">;
|
|
def RL25 : NVPTXReg<"%rl25">;
|
|
def RL26 : NVPTXReg<"%rl26">;
|
|
def RL27 : NVPTXReg<"%rl27">;
|
|
def RL28 : NVPTXReg<"%rl28">;
|
|
def RL29 : NVPTXReg<"%rl29">;
|
|
def RL30 : NVPTXReg<"%rl30">;
|
|
def RL31 : NVPTXReg<"%rl31">;
|
|
def RL32 : NVPTXReg<"%rl32">;
|
|
def RL33 : NVPTXReg<"%rl33">;
|
|
def RL34 : NVPTXReg<"%rl34">;
|
|
def RL35 : NVPTXReg<"%rl35">;
|
|
def RL36 : NVPTXReg<"%rl36">;
|
|
def RL37 : NVPTXReg<"%rl37">;
|
|
def RL38 : NVPTXReg<"%rl38">;
|
|
def RL39 : NVPTXReg<"%rl39">;
|
|
def RL40 : NVPTXReg<"%rl40">;
|
|
def RL41 : NVPTXReg<"%rl41">;
|
|
def RL42 : NVPTXReg<"%rl42">;
|
|
def RL43 : NVPTXReg<"%rl43">;
|
|
def RL44 : NVPTXReg<"%rl44">;
|
|
def RL45 : NVPTXReg<"%rl45">;
|
|
def RL46 : NVPTXReg<"%rl46">;
|
|
def RL47 : NVPTXReg<"%rl47">;
|
|
def RL48 : NVPTXReg<"%rl48">;
|
|
def RL49 : NVPTXReg<"%rl49">;
|
|
def RL50 : NVPTXReg<"%rl50">;
|
|
def RL51 : NVPTXReg<"%rl51">;
|
|
def RL52 : NVPTXReg<"%rl52">;
|
|
def RL53 : NVPTXReg<"%rl53">;
|
|
def RL54 : NVPTXReg<"%rl54">;
|
|
def RL55 : NVPTXReg<"%rl55">;
|
|
def RL56 : NVPTXReg<"%rl56">;
|
|
def RL57 : NVPTXReg<"%rl57">;
|
|
def RL58 : NVPTXReg<"%rl58">;
|
|
def RL59 : NVPTXReg<"%rl59">;
|
|
def RL60 : NVPTXReg<"%rl60">;
|
|
def RL61 : NVPTXReg<"%rl61">;
|
|
def RL62 : NVPTXReg<"%rl62">;
|
|
def RL63 : NVPTXReg<"%rl63">;
|
|
def RL64 : NVPTXReg<"%rl64">;
|
|
def RL65 : NVPTXReg<"%rl65">;
|
|
def RL66 : NVPTXReg<"%rl66">;
|
|
def RL67 : NVPTXReg<"%rl67">;
|
|
def RL68 : NVPTXReg<"%rl68">;
|
|
def RL69 : NVPTXReg<"%rl69">;
|
|
def RL70 : NVPTXReg<"%rl70">;
|
|
def RL71 : NVPTXReg<"%rl71">;
|
|
def RL72 : NVPTXReg<"%rl72">;
|
|
def RL73 : NVPTXReg<"%rl73">;
|
|
def RL74 : NVPTXReg<"%rl74">;
|
|
def RL75 : NVPTXReg<"%rl75">;
|
|
def RL76 : NVPTXReg<"%rl76">;
|
|
def RL77 : NVPTXReg<"%rl77">;
|
|
def RL78 : NVPTXReg<"%rl78">;
|
|
def RL79 : NVPTXReg<"%rl79">;
|
|
def RL80 : NVPTXReg<"%rl80">;
|
|
def RL81 : NVPTXReg<"%rl81">;
|
|
def RL82 : NVPTXReg<"%rl82">;
|
|
def RL83 : NVPTXReg<"%rl83">;
|
|
def RL84 : NVPTXReg<"%rl84">;
|
|
def RL85 : NVPTXReg<"%rl85">;
|
|
def RL86 : NVPTXReg<"%rl86">;
|
|
def RL87 : NVPTXReg<"%rl87">;
|
|
def RL88 : NVPTXReg<"%rl88">;
|
|
def RL89 : NVPTXReg<"%rl89">;
|
|
def RL90 : NVPTXReg<"%rl90">;
|
|
def RL91 : NVPTXReg<"%rl91">;
|
|
def RL92 : NVPTXReg<"%rl92">;
|
|
def RL93 : NVPTXReg<"%rl93">;
|
|
def RL94 : NVPTXReg<"%rl94">;
|
|
def RL95 : NVPTXReg<"%rl95">;
|
|
def RL96 : NVPTXReg<"%rl96">;
|
|
def RL97 : NVPTXReg<"%rl97">;
|
|
def RL98 : NVPTXReg<"%rl98">;
|
|
def RL99 : NVPTXReg<"%rl99">;
|
|
def RL100 : NVPTXReg<"%rl100">;
|
|
def RL101 : NVPTXReg<"%rl101">;
|
|
def RL102 : NVPTXReg<"%rl102">;
|
|
def RL103 : NVPTXReg<"%rl103">;
|
|
def RL104 : NVPTXReg<"%rl104">;
|
|
def RL105 : NVPTXReg<"%rl105">;
|
|
def RL106 : NVPTXReg<"%rl106">;
|
|
def RL107 : NVPTXReg<"%rl107">;
|
|
def RL108 : NVPTXReg<"%rl108">;
|
|
def RL109 : NVPTXReg<"%rl109">;
|
|
def RL110 : NVPTXReg<"%rl110">;
|
|
def RL111 : NVPTXReg<"%rl111">;
|
|
def RL112 : NVPTXReg<"%rl112">;
|
|
def RL113 : NVPTXReg<"%rl113">;
|
|
def RL114 : NVPTXReg<"%rl114">;
|
|
def RL115 : NVPTXReg<"%rl115">;
|
|
def RL116 : NVPTXReg<"%rl116">;
|
|
def RL117 : NVPTXReg<"%rl117">;
|
|
def RL118 : NVPTXReg<"%rl118">;
|
|
def RL119 : NVPTXReg<"%rl119">;
|
|
def RL120 : NVPTXReg<"%rl120">;
|
|
def RL121 : NVPTXReg<"%rl121">;
|
|
def RL122 : NVPTXReg<"%rl122">;
|
|
def RL123 : NVPTXReg<"%rl123">;
|
|
def RL124 : NVPTXReg<"%rl124">;
|
|
def RL125 : NVPTXReg<"%rl125">;
|
|
def RL126 : NVPTXReg<"%rl126">;
|
|
def RL127 : NVPTXReg<"%rl127">;
|
|
def RL128 : NVPTXReg<"%rl128">;
|
|
def RL129 : NVPTXReg<"%rl129">;
|
|
def RL130 : NVPTXReg<"%rl130">;
|
|
def RL131 : NVPTXReg<"%rl131">;
|
|
def RL132 : NVPTXReg<"%rl132">;
|
|
def RL133 : NVPTXReg<"%rl133">;
|
|
def RL134 : NVPTXReg<"%rl134">;
|
|
def RL135 : NVPTXReg<"%rl135">;
|
|
def RL136 : NVPTXReg<"%rl136">;
|
|
def RL137 : NVPTXReg<"%rl137">;
|
|
def RL138 : NVPTXReg<"%rl138">;
|
|
def RL139 : NVPTXReg<"%rl139">;
|
|
def RL140 : NVPTXReg<"%rl140">;
|
|
def RL141 : NVPTXReg<"%rl141">;
|
|
def RL142 : NVPTXReg<"%rl142">;
|
|
def RL143 : NVPTXReg<"%rl143">;
|
|
def RL144 : NVPTXReg<"%rl144">;
|
|
def RL145 : NVPTXReg<"%rl145">;
|
|
def RL146 : NVPTXReg<"%rl146">;
|
|
def RL147 : NVPTXReg<"%rl147">;
|
|
def RL148 : NVPTXReg<"%rl148">;
|
|
def RL149 : NVPTXReg<"%rl149">;
|
|
def RL150 : NVPTXReg<"%rl150">;
|
|
def RL151 : NVPTXReg<"%rl151">;
|
|
def RL152 : NVPTXReg<"%rl152">;
|
|
def RL153 : NVPTXReg<"%rl153">;
|
|
def RL154 : NVPTXReg<"%rl154">;
|
|
def RL155 : NVPTXReg<"%rl155">;
|
|
def RL156 : NVPTXReg<"%rl156">;
|
|
def RL157 : NVPTXReg<"%rl157">;
|
|
def RL158 : NVPTXReg<"%rl158">;
|
|
def RL159 : NVPTXReg<"%rl159">;
|
|
def RL160 : NVPTXReg<"%rl160">;
|
|
def RL161 : NVPTXReg<"%rl161">;
|
|
def RL162 : NVPTXReg<"%rl162">;
|
|
def RL163 : NVPTXReg<"%rl163">;
|
|
def RL164 : NVPTXReg<"%rl164">;
|
|
def RL165 : NVPTXReg<"%rl165">;
|
|
def RL166 : NVPTXReg<"%rl166">;
|
|
def RL167 : NVPTXReg<"%rl167">;
|
|
def RL168 : NVPTXReg<"%rl168">;
|
|
def RL169 : NVPTXReg<"%rl169">;
|
|
def RL170 : NVPTXReg<"%rl170">;
|
|
def RL171 : NVPTXReg<"%rl171">;
|
|
def RL172 : NVPTXReg<"%rl172">;
|
|
def RL173 : NVPTXReg<"%rl173">;
|
|
def RL174 : NVPTXReg<"%rl174">;
|
|
def RL175 : NVPTXReg<"%rl175">;
|
|
def RL176 : NVPTXReg<"%rl176">;
|
|
def RL177 : NVPTXReg<"%rl177">;
|
|
def RL178 : NVPTXReg<"%rl178">;
|
|
def RL179 : NVPTXReg<"%rl179">;
|
|
def RL180 : NVPTXReg<"%rl180">;
|
|
def RL181 : NVPTXReg<"%rl181">;
|
|
def RL182 : NVPTXReg<"%rl182">;
|
|
def RL183 : NVPTXReg<"%rl183">;
|
|
def RL184 : NVPTXReg<"%rl184">;
|
|
def RL185 : NVPTXReg<"%rl185">;
|
|
def RL186 : NVPTXReg<"%rl186">;
|
|
def RL187 : NVPTXReg<"%rl187">;
|
|
def RL188 : NVPTXReg<"%rl188">;
|
|
def RL189 : NVPTXReg<"%rl189">;
|
|
def RL190 : NVPTXReg<"%rl190">;
|
|
def RL191 : NVPTXReg<"%rl191">;
|
|
def RL192 : NVPTXReg<"%rl192">;
|
|
def RL193 : NVPTXReg<"%rl193">;
|
|
def RL194 : NVPTXReg<"%rl194">;
|
|
def RL195 : NVPTXReg<"%rl195">;
|
|
def RL196 : NVPTXReg<"%rl196">;
|
|
def RL197 : NVPTXReg<"%rl197">;
|
|
def RL198 : NVPTXReg<"%rl198">;
|
|
def RL199 : NVPTXReg<"%rl199">;
|
|
def RL200 : NVPTXReg<"%rl200">;
|
|
def RL201 : NVPTXReg<"%rl201">;
|
|
def RL202 : NVPTXReg<"%rl202">;
|
|
def RL203 : NVPTXReg<"%rl203">;
|
|
def RL204 : NVPTXReg<"%rl204">;
|
|
def RL205 : NVPTXReg<"%rl205">;
|
|
def RL206 : NVPTXReg<"%rl206">;
|
|
def RL207 : NVPTXReg<"%rl207">;
|
|
def RL208 : NVPTXReg<"%rl208">;
|
|
def RL209 : NVPTXReg<"%rl209">;
|
|
def RL210 : NVPTXReg<"%rl210">;
|
|
def RL211 : NVPTXReg<"%rl211">;
|
|
def RL212 : NVPTXReg<"%rl212">;
|
|
def RL213 : NVPTXReg<"%rl213">;
|
|
def RL214 : NVPTXReg<"%rl214">;
|
|
def RL215 : NVPTXReg<"%rl215">;
|
|
def RL216 : NVPTXReg<"%rl216">;
|
|
def RL217 : NVPTXReg<"%rl217">;
|
|
def RL218 : NVPTXReg<"%rl218">;
|
|
def RL219 : NVPTXReg<"%rl219">;
|
|
def RL220 : NVPTXReg<"%rl220">;
|
|
def RL221 : NVPTXReg<"%rl221">;
|
|
def RL222 : NVPTXReg<"%rl222">;
|
|
def RL223 : NVPTXReg<"%rl223">;
|
|
def RL224 : NVPTXReg<"%rl224">;
|
|
def RL225 : NVPTXReg<"%rl225">;
|
|
def RL226 : NVPTXReg<"%rl226">;
|
|
def RL227 : NVPTXReg<"%rl227">;
|
|
def RL228 : NVPTXReg<"%rl228">;
|
|
def RL229 : NVPTXReg<"%rl229">;
|
|
def RL230 : NVPTXReg<"%rl230">;
|
|
def RL231 : NVPTXReg<"%rl231">;
|
|
def RL232 : NVPTXReg<"%rl232">;
|
|
def RL233 : NVPTXReg<"%rl233">;
|
|
def RL234 : NVPTXReg<"%rl234">;
|
|
def RL235 : NVPTXReg<"%rl235">;
|
|
def RL236 : NVPTXReg<"%rl236">;
|
|
def RL237 : NVPTXReg<"%rl237">;
|
|
def RL238 : NVPTXReg<"%rl238">;
|
|
def RL239 : NVPTXReg<"%rl239">;
|
|
def RL240 : NVPTXReg<"%rl240">;
|
|
def RL241 : NVPTXReg<"%rl241">;
|
|
def RL242 : NVPTXReg<"%rl242">;
|
|
def RL243 : NVPTXReg<"%rl243">;
|
|
def RL244 : NVPTXReg<"%rl244">;
|
|
def RL245 : NVPTXReg<"%rl245">;
|
|
def RL246 : NVPTXReg<"%rl246">;
|
|
def RL247 : NVPTXReg<"%rl247">;
|
|
def RL248 : NVPTXReg<"%rl248">;
|
|
def RL249 : NVPTXReg<"%rl249">;
|
|
def RL250 : NVPTXReg<"%rl250">;
|
|
def RL251 : NVPTXReg<"%rl251">;
|
|
def RL252 : NVPTXReg<"%rl252">;
|
|
def RL253 : NVPTXReg<"%rl253">;
|
|
def RL254 : NVPTXReg<"%rl254">;
|
|
def RL255 : NVPTXReg<"%rl255">;
|
|
def RL256 : NVPTXReg<"%rl256">;
|
|
def RL257 : NVPTXReg<"%rl257">;
|
|
def RL258 : NVPTXReg<"%rl258">;
|
|
def RL259 : NVPTXReg<"%rl259">;
|
|
def RL260 : NVPTXReg<"%rl260">;
|
|
def RL261 : NVPTXReg<"%rl261">;
|
|
def RL262 : NVPTXReg<"%rl262">;
|
|
def RL263 : NVPTXReg<"%rl263">;
|
|
def RL264 : NVPTXReg<"%rl264">;
|
|
def RL265 : NVPTXReg<"%rl265">;
|
|
def RL266 : NVPTXReg<"%rl266">;
|
|
def RL267 : NVPTXReg<"%rl267">;
|
|
def RL268 : NVPTXReg<"%rl268">;
|
|
def RL269 : NVPTXReg<"%rl269">;
|
|
def RL270 : NVPTXReg<"%rl270">;
|
|
def RL271 : NVPTXReg<"%rl271">;
|
|
def RL272 : NVPTXReg<"%rl272">;
|
|
def RL273 : NVPTXReg<"%rl273">;
|
|
def RL274 : NVPTXReg<"%rl274">;
|
|
def RL275 : NVPTXReg<"%rl275">;
|
|
def RL276 : NVPTXReg<"%rl276">;
|
|
def RL277 : NVPTXReg<"%rl277">;
|
|
def RL278 : NVPTXReg<"%rl278">;
|
|
def RL279 : NVPTXReg<"%rl279">;
|
|
def RL280 : NVPTXReg<"%rl280">;
|
|
def RL281 : NVPTXReg<"%rl281">;
|
|
def RL282 : NVPTXReg<"%rl282">;
|
|
def RL283 : NVPTXReg<"%rl283">;
|
|
def RL284 : NVPTXReg<"%rl284">;
|
|
def RL285 : NVPTXReg<"%rl285">;
|
|
def RL286 : NVPTXReg<"%rl286">;
|
|
def RL287 : NVPTXReg<"%rl287">;
|
|
def RL288 : NVPTXReg<"%rl288">;
|
|
def RL289 : NVPTXReg<"%rl289">;
|
|
def RL290 : NVPTXReg<"%rl290">;
|
|
def RL291 : NVPTXReg<"%rl291">;
|
|
def RL292 : NVPTXReg<"%rl292">;
|
|
def RL293 : NVPTXReg<"%rl293">;
|
|
def RL294 : NVPTXReg<"%rl294">;
|
|
def RL295 : NVPTXReg<"%rl295">;
|
|
def RL296 : NVPTXReg<"%rl296">;
|
|
def RL297 : NVPTXReg<"%rl297">;
|
|
def RL298 : NVPTXReg<"%rl298">;
|
|
def RL299 : NVPTXReg<"%rl299">;
|
|
def RL300 : NVPTXReg<"%rl300">;
|
|
def RL301 : NVPTXReg<"%rl301">;
|
|
def RL302 : NVPTXReg<"%rl302">;
|
|
def RL303 : NVPTXReg<"%rl303">;
|
|
def RL304 : NVPTXReg<"%rl304">;
|
|
def RL305 : NVPTXReg<"%rl305">;
|
|
def RL306 : NVPTXReg<"%rl306">;
|
|
def RL307 : NVPTXReg<"%rl307">;
|
|
def RL308 : NVPTXReg<"%rl308">;
|
|
def RL309 : NVPTXReg<"%rl309">;
|
|
def RL310 : NVPTXReg<"%rl310">;
|
|
def RL311 : NVPTXReg<"%rl311">;
|
|
def RL312 : NVPTXReg<"%rl312">;
|
|
def RL313 : NVPTXReg<"%rl313">;
|
|
def RL314 : NVPTXReg<"%rl314">;
|
|
def RL315 : NVPTXReg<"%rl315">;
|
|
def RL316 : NVPTXReg<"%rl316">;
|
|
def RL317 : NVPTXReg<"%rl317">;
|
|
def RL318 : NVPTXReg<"%rl318">;
|
|
def RL319 : NVPTXReg<"%rl319">;
|
|
def RL320 : NVPTXReg<"%rl320">;
|
|
def RL321 : NVPTXReg<"%rl321">;
|
|
def RL322 : NVPTXReg<"%rl322">;
|
|
def RL323 : NVPTXReg<"%rl323">;
|
|
def RL324 : NVPTXReg<"%rl324">;
|
|
def RL325 : NVPTXReg<"%rl325">;
|
|
def RL326 : NVPTXReg<"%rl326">;
|
|
def RL327 : NVPTXReg<"%rl327">;
|
|
def RL328 : NVPTXReg<"%rl328">;
|
|
def RL329 : NVPTXReg<"%rl329">;
|
|
def RL330 : NVPTXReg<"%rl330">;
|
|
def RL331 : NVPTXReg<"%rl331">;
|
|
def RL332 : NVPTXReg<"%rl332">;
|
|
def RL333 : NVPTXReg<"%rl333">;
|
|
def RL334 : NVPTXReg<"%rl334">;
|
|
def RL335 : NVPTXReg<"%rl335">;
|
|
def RL336 : NVPTXReg<"%rl336">;
|
|
def RL337 : NVPTXReg<"%rl337">;
|
|
def RL338 : NVPTXReg<"%rl338">;
|
|
def RL339 : NVPTXReg<"%rl339">;
|
|
def RL340 : NVPTXReg<"%rl340">;
|
|
def RL341 : NVPTXReg<"%rl341">;
|
|
def RL342 : NVPTXReg<"%rl342">;
|
|
def RL343 : NVPTXReg<"%rl343">;
|
|
def RL344 : NVPTXReg<"%rl344">;
|
|
def RL345 : NVPTXReg<"%rl345">;
|
|
def RL346 : NVPTXReg<"%rl346">;
|
|
def RL347 : NVPTXReg<"%rl347">;
|
|
def RL348 : NVPTXReg<"%rl348">;
|
|
def RL349 : NVPTXReg<"%rl349">;
|
|
def RL350 : NVPTXReg<"%rl350">;
|
|
def RL351 : NVPTXReg<"%rl351">;
|
|
def RL352 : NVPTXReg<"%rl352">;
|
|
def RL353 : NVPTXReg<"%rl353">;
|
|
def RL354 : NVPTXReg<"%rl354">;
|
|
def RL355 : NVPTXReg<"%rl355">;
|
|
def RL356 : NVPTXReg<"%rl356">;
|
|
def RL357 : NVPTXReg<"%rl357">;
|
|
def RL358 : NVPTXReg<"%rl358">;
|
|
def RL359 : NVPTXReg<"%rl359">;
|
|
def RL360 : NVPTXReg<"%rl360">;
|
|
def RL361 : NVPTXReg<"%rl361">;
|
|
def RL362 : NVPTXReg<"%rl362">;
|
|
def RL363 : NVPTXReg<"%rl363">;
|
|
def RL364 : NVPTXReg<"%rl364">;
|
|
def RL365 : NVPTXReg<"%rl365">;
|
|
def RL366 : NVPTXReg<"%rl366">;
|
|
def RL367 : NVPTXReg<"%rl367">;
|
|
def RL368 : NVPTXReg<"%rl368">;
|
|
def RL369 : NVPTXReg<"%rl369">;
|
|
def RL370 : NVPTXReg<"%rl370">;
|
|
def RL371 : NVPTXReg<"%rl371">;
|
|
def RL372 : NVPTXReg<"%rl372">;
|
|
def RL373 : NVPTXReg<"%rl373">;
|
|
def RL374 : NVPTXReg<"%rl374">;
|
|
def RL375 : NVPTXReg<"%rl375">;
|
|
def RL376 : NVPTXReg<"%rl376">;
|
|
def RL377 : NVPTXReg<"%rl377">;
|
|
def RL378 : NVPTXReg<"%rl378">;
|
|
def RL379 : NVPTXReg<"%rl379">;
|
|
def RL380 : NVPTXReg<"%rl380">;
|
|
def RL381 : NVPTXReg<"%rl381">;
|
|
def RL382 : NVPTXReg<"%rl382">;
|
|
def RL383 : NVPTXReg<"%rl383">;
|
|
def RL384 : NVPTXReg<"%rl384">;
|
|
def RL385 : NVPTXReg<"%rl385">;
|
|
def RL386 : NVPTXReg<"%rl386">;
|
|
def RL387 : NVPTXReg<"%rl387">;
|
|
def RL388 : NVPTXReg<"%rl388">;
|
|
def RL389 : NVPTXReg<"%rl389">;
|
|
def RL390 : NVPTXReg<"%rl390">;
|
|
def RL391 : NVPTXReg<"%rl391">;
|
|
def RL392 : NVPTXReg<"%rl392">;
|
|
def RL393 : NVPTXReg<"%rl393">;
|
|
def RL394 : NVPTXReg<"%rl394">;
|
|
def RL395 : NVPTXReg<"%rl395">;
|
|
|
|
//===--- 32-bit float -----------------------------------------------------===//
|
|
def F0 : NVPTXReg<"%f0">;
|
|
def F1 : NVPTXReg<"%f1">;
|
|
def F2 : NVPTXReg<"%f2">;
|
|
def F3 : NVPTXReg<"%f3">;
|
|
def F4 : NVPTXReg<"%f4">;
|
|
def F5 : NVPTXReg<"%f5">;
|
|
def F6 : NVPTXReg<"%f6">;
|
|
def F7 : NVPTXReg<"%f7">;
|
|
def F8 : NVPTXReg<"%f8">;
|
|
def F9 : NVPTXReg<"%f9">;
|
|
def F10 : NVPTXReg<"%f10">;
|
|
def F11 : NVPTXReg<"%f11">;
|
|
def F12 : NVPTXReg<"%f12">;
|
|
def F13 : NVPTXReg<"%f13">;
|
|
def F14 : NVPTXReg<"%f14">;
|
|
def F15 : NVPTXReg<"%f15">;
|
|
def F16 : NVPTXReg<"%f16">;
|
|
def F17 : NVPTXReg<"%f17">;
|
|
def F18 : NVPTXReg<"%f18">;
|
|
def F19 : NVPTXReg<"%f19">;
|
|
def F20 : NVPTXReg<"%f20">;
|
|
def F21 : NVPTXReg<"%f21">;
|
|
def F22 : NVPTXReg<"%f22">;
|
|
def F23 : NVPTXReg<"%f23">;
|
|
def F24 : NVPTXReg<"%f24">;
|
|
def F25 : NVPTXReg<"%f25">;
|
|
def F26 : NVPTXReg<"%f26">;
|
|
def F27 : NVPTXReg<"%f27">;
|
|
def F28 : NVPTXReg<"%f28">;
|
|
def F29 : NVPTXReg<"%f29">;
|
|
def F30 : NVPTXReg<"%f30">;
|
|
def F31 : NVPTXReg<"%f31">;
|
|
def F32 : NVPTXReg<"%f32">;
|
|
def F33 : NVPTXReg<"%f33">;
|
|
def F34 : NVPTXReg<"%f34">;
|
|
def F35 : NVPTXReg<"%f35">;
|
|
def F36 : NVPTXReg<"%f36">;
|
|
def F37 : NVPTXReg<"%f37">;
|
|
def F38 : NVPTXReg<"%f38">;
|
|
def F39 : NVPTXReg<"%f39">;
|
|
def F40 : NVPTXReg<"%f40">;
|
|
def F41 : NVPTXReg<"%f41">;
|
|
def F42 : NVPTXReg<"%f42">;
|
|
def F43 : NVPTXReg<"%f43">;
|
|
def F44 : NVPTXReg<"%f44">;
|
|
def F45 : NVPTXReg<"%f45">;
|
|
def F46 : NVPTXReg<"%f46">;
|
|
def F47 : NVPTXReg<"%f47">;
|
|
def F48 : NVPTXReg<"%f48">;
|
|
def F49 : NVPTXReg<"%f49">;
|
|
def F50 : NVPTXReg<"%f50">;
|
|
def F51 : NVPTXReg<"%f51">;
|
|
def F52 : NVPTXReg<"%f52">;
|
|
def F53 : NVPTXReg<"%f53">;
|
|
def F54 : NVPTXReg<"%f54">;
|
|
def F55 : NVPTXReg<"%f55">;
|
|
def F56 : NVPTXReg<"%f56">;
|
|
def F57 : NVPTXReg<"%f57">;
|
|
def F58 : NVPTXReg<"%f58">;
|
|
def F59 : NVPTXReg<"%f59">;
|
|
def F60 : NVPTXReg<"%f60">;
|
|
def F61 : NVPTXReg<"%f61">;
|
|
def F62 : NVPTXReg<"%f62">;
|
|
def F63 : NVPTXReg<"%f63">;
|
|
def F64 : NVPTXReg<"%f64">;
|
|
def F65 : NVPTXReg<"%f65">;
|
|
def F66 : NVPTXReg<"%f66">;
|
|
def F67 : NVPTXReg<"%f67">;
|
|
def F68 : NVPTXReg<"%f68">;
|
|
def F69 : NVPTXReg<"%f69">;
|
|
def F70 : NVPTXReg<"%f70">;
|
|
def F71 : NVPTXReg<"%f71">;
|
|
def F72 : NVPTXReg<"%f72">;
|
|
def F73 : NVPTXReg<"%f73">;
|
|
def F74 : NVPTXReg<"%f74">;
|
|
def F75 : NVPTXReg<"%f75">;
|
|
def F76 : NVPTXReg<"%f76">;
|
|
def F77 : NVPTXReg<"%f77">;
|
|
def F78 : NVPTXReg<"%f78">;
|
|
def F79 : NVPTXReg<"%f79">;
|
|
def F80 : NVPTXReg<"%f80">;
|
|
def F81 : NVPTXReg<"%f81">;
|
|
def F82 : NVPTXReg<"%f82">;
|
|
def F83 : NVPTXReg<"%f83">;
|
|
def F84 : NVPTXReg<"%f84">;
|
|
def F85 : NVPTXReg<"%f85">;
|
|
def F86 : NVPTXReg<"%f86">;
|
|
def F87 : NVPTXReg<"%f87">;
|
|
def F88 : NVPTXReg<"%f88">;
|
|
def F89 : NVPTXReg<"%f89">;
|
|
def F90 : NVPTXReg<"%f90">;
|
|
def F91 : NVPTXReg<"%f91">;
|
|
def F92 : NVPTXReg<"%f92">;
|
|
def F93 : NVPTXReg<"%f93">;
|
|
def F94 : NVPTXReg<"%f94">;
|
|
def F95 : NVPTXReg<"%f95">;
|
|
def F96 : NVPTXReg<"%f96">;
|
|
def F97 : NVPTXReg<"%f97">;
|
|
def F98 : NVPTXReg<"%f98">;
|
|
def F99 : NVPTXReg<"%f99">;
|
|
def F100 : NVPTXReg<"%f100">;
|
|
def F101 : NVPTXReg<"%f101">;
|
|
def F102 : NVPTXReg<"%f102">;
|
|
def F103 : NVPTXReg<"%f103">;
|
|
def F104 : NVPTXReg<"%f104">;
|
|
def F105 : NVPTXReg<"%f105">;
|
|
def F106 : NVPTXReg<"%f106">;
|
|
def F107 : NVPTXReg<"%f107">;
|
|
def F108 : NVPTXReg<"%f108">;
|
|
def F109 : NVPTXReg<"%f109">;
|
|
def F110 : NVPTXReg<"%f110">;
|
|
def F111 : NVPTXReg<"%f111">;
|
|
def F112 : NVPTXReg<"%f112">;
|
|
def F113 : NVPTXReg<"%f113">;
|
|
def F114 : NVPTXReg<"%f114">;
|
|
def F115 : NVPTXReg<"%f115">;
|
|
def F116 : NVPTXReg<"%f116">;
|
|
def F117 : NVPTXReg<"%f117">;
|
|
def F118 : NVPTXReg<"%f118">;
|
|
def F119 : NVPTXReg<"%f119">;
|
|
def F120 : NVPTXReg<"%f120">;
|
|
def F121 : NVPTXReg<"%f121">;
|
|
def F122 : NVPTXReg<"%f122">;
|
|
def F123 : NVPTXReg<"%f123">;
|
|
def F124 : NVPTXReg<"%f124">;
|
|
def F125 : NVPTXReg<"%f125">;
|
|
def F126 : NVPTXReg<"%f126">;
|
|
def F127 : NVPTXReg<"%f127">;
|
|
def F128 : NVPTXReg<"%f128">;
|
|
def F129 : NVPTXReg<"%f129">;
|
|
def F130 : NVPTXReg<"%f130">;
|
|
def F131 : NVPTXReg<"%f131">;
|
|
def F132 : NVPTXReg<"%f132">;
|
|
def F133 : NVPTXReg<"%f133">;
|
|
def F134 : NVPTXReg<"%f134">;
|
|
def F135 : NVPTXReg<"%f135">;
|
|
def F136 : NVPTXReg<"%f136">;
|
|
def F137 : NVPTXReg<"%f137">;
|
|
def F138 : NVPTXReg<"%f138">;
|
|
def F139 : NVPTXReg<"%f139">;
|
|
def F140 : NVPTXReg<"%f140">;
|
|
def F141 : NVPTXReg<"%f141">;
|
|
def F142 : NVPTXReg<"%f142">;
|
|
def F143 : NVPTXReg<"%f143">;
|
|
def F144 : NVPTXReg<"%f144">;
|
|
def F145 : NVPTXReg<"%f145">;
|
|
def F146 : NVPTXReg<"%f146">;
|
|
def F147 : NVPTXReg<"%f147">;
|
|
def F148 : NVPTXReg<"%f148">;
|
|
def F149 : NVPTXReg<"%f149">;
|
|
def F150 : NVPTXReg<"%f150">;
|
|
def F151 : NVPTXReg<"%f151">;
|
|
def F152 : NVPTXReg<"%f152">;
|
|
def F153 : NVPTXReg<"%f153">;
|
|
def F154 : NVPTXReg<"%f154">;
|
|
def F155 : NVPTXReg<"%f155">;
|
|
def F156 : NVPTXReg<"%f156">;
|
|
def F157 : NVPTXReg<"%f157">;
|
|
def F158 : NVPTXReg<"%f158">;
|
|
def F159 : NVPTXReg<"%f159">;
|
|
def F160 : NVPTXReg<"%f160">;
|
|
def F161 : NVPTXReg<"%f161">;
|
|
def F162 : NVPTXReg<"%f162">;
|
|
def F163 : NVPTXReg<"%f163">;
|
|
def F164 : NVPTXReg<"%f164">;
|
|
def F165 : NVPTXReg<"%f165">;
|
|
def F166 : NVPTXReg<"%f166">;
|
|
def F167 : NVPTXReg<"%f167">;
|
|
def F168 : NVPTXReg<"%f168">;
|
|
def F169 : NVPTXReg<"%f169">;
|
|
def F170 : NVPTXReg<"%f170">;
|
|
def F171 : NVPTXReg<"%f171">;
|
|
def F172 : NVPTXReg<"%f172">;
|
|
def F173 : NVPTXReg<"%f173">;
|
|
def F174 : NVPTXReg<"%f174">;
|
|
def F175 : NVPTXReg<"%f175">;
|
|
def F176 : NVPTXReg<"%f176">;
|
|
def F177 : NVPTXReg<"%f177">;
|
|
def F178 : NVPTXReg<"%f178">;
|
|
def F179 : NVPTXReg<"%f179">;
|
|
def F180 : NVPTXReg<"%f180">;
|
|
def F181 : NVPTXReg<"%f181">;
|
|
def F182 : NVPTXReg<"%f182">;
|
|
def F183 : NVPTXReg<"%f183">;
|
|
def F184 : NVPTXReg<"%f184">;
|
|
def F185 : NVPTXReg<"%f185">;
|
|
def F186 : NVPTXReg<"%f186">;
|
|
def F187 : NVPTXReg<"%f187">;
|
|
def F188 : NVPTXReg<"%f188">;
|
|
def F189 : NVPTXReg<"%f189">;
|
|
def F190 : NVPTXReg<"%f190">;
|
|
def F191 : NVPTXReg<"%f191">;
|
|
def F192 : NVPTXReg<"%f192">;
|
|
def F193 : NVPTXReg<"%f193">;
|
|
def F194 : NVPTXReg<"%f194">;
|
|
def F195 : NVPTXReg<"%f195">;
|
|
def F196 : NVPTXReg<"%f196">;
|
|
def F197 : NVPTXReg<"%f197">;
|
|
def F198 : NVPTXReg<"%f198">;
|
|
def F199 : NVPTXReg<"%f199">;
|
|
def F200 : NVPTXReg<"%f200">;
|
|
def F201 : NVPTXReg<"%f201">;
|
|
def F202 : NVPTXReg<"%f202">;
|
|
def F203 : NVPTXReg<"%f203">;
|
|
def F204 : NVPTXReg<"%f204">;
|
|
def F205 : NVPTXReg<"%f205">;
|
|
def F206 : NVPTXReg<"%f206">;
|
|
def F207 : NVPTXReg<"%f207">;
|
|
def F208 : NVPTXReg<"%f208">;
|
|
def F209 : NVPTXReg<"%f209">;
|
|
def F210 : NVPTXReg<"%f210">;
|
|
def F211 : NVPTXReg<"%f211">;
|
|
def F212 : NVPTXReg<"%f212">;
|
|
def F213 : NVPTXReg<"%f213">;
|
|
def F214 : NVPTXReg<"%f214">;
|
|
def F215 : NVPTXReg<"%f215">;
|
|
def F216 : NVPTXReg<"%f216">;
|
|
def F217 : NVPTXReg<"%f217">;
|
|
def F218 : NVPTXReg<"%f218">;
|
|
def F219 : NVPTXReg<"%f219">;
|
|
def F220 : NVPTXReg<"%f220">;
|
|
def F221 : NVPTXReg<"%f221">;
|
|
def F222 : NVPTXReg<"%f222">;
|
|
def F223 : NVPTXReg<"%f223">;
|
|
def F224 : NVPTXReg<"%f224">;
|
|
def F225 : NVPTXReg<"%f225">;
|
|
def F226 : NVPTXReg<"%f226">;
|
|
def F227 : NVPTXReg<"%f227">;
|
|
def F228 : NVPTXReg<"%f228">;
|
|
def F229 : NVPTXReg<"%f229">;
|
|
def F230 : NVPTXReg<"%f230">;
|
|
def F231 : NVPTXReg<"%f231">;
|
|
def F232 : NVPTXReg<"%f232">;
|
|
def F233 : NVPTXReg<"%f233">;
|
|
def F234 : NVPTXReg<"%f234">;
|
|
def F235 : NVPTXReg<"%f235">;
|
|
def F236 : NVPTXReg<"%f236">;
|
|
def F237 : NVPTXReg<"%f237">;
|
|
def F238 : NVPTXReg<"%f238">;
|
|
def F239 : NVPTXReg<"%f239">;
|
|
def F240 : NVPTXReg<"%f240">;
|
|
def F241 : NVPTXReg<"%f241">;
|
|
def F242 : NVPTXReg<"%f242">;
|
|
def F243 : NVPTXReg<"%f243">;
|
|
def F244 : NVPTXReg<"%f244">;
|
|
def F245 : NVPTXReg<"%f245">;
|
|
def F246 : NVPTXReg<"%f246">;
|
|
def F247 : NVPTXReg<"%f247">;
|
|
def F248 : NVPTXReg<"%f248">;
|
|
def F249 : NVPTXReg<"%f249">;
|
|
def F250 : NVPTXReg<"%f250">;
|
|
def F251 : NVPTXReg<"%f251">;
|
|
def F252 : NVPTXReg<"%f252">;
|
|
def F253 : NVPTXReg<"%f253">;
|
|
def F254 : NVPTXReg<"%f254">;
|
|
def F255 : NVPTXReg<"%f255">;
|
|
def F256 : NVPTXReg<"%f256">;
|
|
def F257 : NVPTXReg<"%f257">;
|
|
def F258 : NVPTXReg<"%f258">;
|
|
def F259 : NVPTXReg<"%f259">;
|
|
def F260 : NVPTXReg<"%f260">;
|
|
def F261 : NVPTXReg<"%f261">;
|
|
def F262 : NVPTXReg<"%f262">;
|
|
def F263 : NVPTXReg<"%f263">;
|
|
def F264 : NVPTXReg<"%f264">;
|
|
def F265 : NVPTXReg<"%f265">;
|
|
def F266 : NVPTXReg<"%f266">;
|
|
def F267 : NVPTXReg<"%f267">;
|
|
def F268 : NVPTXReg<"%f268">;
|
|
def F269 : NVPTXReg<"%f269">;
|
|
def F270 : NVPTXReg<"%f270">;
|
|
def F271 : NVPTXReg<"%f271">;
|
|
def F272 : NVPTXReg<"%f272">;
|
|
def F273 : NVPTXReg<"%f273">;
|
|
def F274 : NVPTXReg<"%f274">;
|
|
def F275 : NVPTXReg<"%f275">;
|
|
def F276 : NVPTXReg<"%f276">;
|
|
def F277 : NVPTXReg<"%f277">;
|
|
def F278 : NVPTXReg<"%f278">;
|
|
def F279 : NVPTXReg<"%f279">;
|
|
def F280 : NVPTXReg<"%f280">;
|
|
def F281 : NVPTXReg<"%f281">;
|
|
def F282 : NVPTXReg<"%f282">;
|
|
def F283 : NVPTXReg<"%f283">;
|
|
def F284 : NVPTXReg<"%f284">;
|
|
def F285 : NVPTXReg<"%f285">;
|
|
def F286 : NVPTXReg<"%f286">;
|
|
def F287 : NVPTXReg<"%f287">;
|
|
def F288 : NVPTXReg<"%f288">;
|
|
def F289 : NVPTXReg<"%f289">;
|
|
def F290 : NVPTXReg<"%f290">;
|
|
def F291 : NVPTXReg<"%f291">;
|
|
def F292 : NVPTXReg<"%f292">;
|
|
def F293 : NVPTXReg<"%f293">;
|
|
def F294 : NVPTXReg<"%f294">;
|
|
def F295 : NVPTXReg<"%f295">;
|
|
def F296 : NVPTXReg<"%f296">;
|
|
def F297 : NVPTXReg<"%f297">;
|
|
def F298 : NVPTXReg<"%f298">;
|
|
def F299 : NVPTXReg<"%f299">;
|
|
def F300 : NVPTXReg<"%f300">;
|
|
def F301 : NVPTXReg<"%f301">;
|
|
def F302 : NVPTXReg<"%f302">;
|
|
def F303 : NVPTXReg<"%f303">;
|
|
def F304 : NVPTXReg<"%f304">;
|
|
def F305 : NVPTXReg<"%f305">;
|
|
def F306 : NVPTXReg<"%f306">;
|
|
def F307 : NVPTXReg<"%f307">;
|
|
def F308 : NVPTXReg<"%f308">;
|
|
def F309 : NVPTXReg<"%f309">;
|
|
def F310 : NVPTXReg<"%f310">;
|
|
def F311 : NVPTXReg<"%f311">;
|
|
def F312 : NVPTXReg<"%f312">;
|
|
def F313 : NVPTXReg<"%f313">;
|
|
def F314 : NVPTXReg<"%f314">;
|
|
def F315 : NVPTXReg<"%f315">;
|
|
def F316 : NVPTXReg<"%f316">;
|
|
def F317 : NVPTXReg<"%f317">;
|
|
def F318 : NVPTXReg<"%f318">;
|
|
def F319 : NVPTXReg<"%f319">;
|
|
def F320 : NVPTXReg<"%f320">;
|
|
def F321 : NVPTXReg<"%f321">;
|
|
def F322 : NVPTXReg<"%f322">;
|
|
def F323 : NVPTXReg<"%f323">;
|
|
def F324 : NVPTXReg<"%f324">;
|
|
def F325 : NVPTXReg<"%f325">;
|
|
def F326 : NVPTXReg<"%f326">;
|
|
def F327 : NVPTXReg<"%f327">;
|
|
def F328 : NVPTXReg<"%f328">;
|
|
def F329 : NVPTXReg<"%f329">;
|
|
def F330 : NVPTXReg<"%f330">;
|
|
def F331 : NVPTXReg<"%f331">;
|
|
def F332 : NVPTXReg<"%f332">;
|
|
def F333 : NVPTXReg<"%f333">;
|
|
def F334 : NVPTXReg<"%f334">;
|
|
def F335 : NVPTXReg<"%f335">;
|
|
def F336 : NVPTXReg<"%f336">;
|
|
def F337 : NVPTXReg<"%f337">;
|
|
def F338 : NVPTXReg<"%f338">;
|
|
def F339 : NVPTXReg<"%f339">;
|
|
def F340 : NVPTXReg<"%f340">;
|
|
def F341 : NVPTXReg<"%f341">;
|
|
def F342 : NVPTXReg<"%f342">;
|
|
def F343 : NVPTXReg<"%f343">;
|
|
def F344 : NVPTXReg<"%f344">;
|
|
def F345 : NVPTXReg<"%f345">;
|
|
def F346 : NVPTXReg<"%f346">;
|
|
def F347 : NVPTXReg<"%f347">;
|
|
def F348 : NVPTXReg<"%f348">;
|
|
def F349 : NVPTXReg<"%f349">;
|
|
def F350 : NVPTXReg<"%f350">;
|
|
def F351 : NVPTXReg<"%f351">;
|
|
def F352 : NVPTXReg<"%f352">;
|
|
def F353 : NVPTXReg<"%f353">;
|
|
def F354 : NVPTXReg<"%f354">;
|
|
def F355 : NVPTXReg<"%f355">;
|
|
def F356 : NVPTXReg<"%f356">;
|
|
def F357 : NVPTXReg<"%f357">;
|
|
def F358 : NVPTXReg<"%f358">;
|
|
def F359 : NVPTXReg<"%f359">;
|
|
def F360 : NVPTXReg<"%f360">;
|
|
def F361 : NVPTXReg<"%f361">;
|
|
def F362 : NVPTXReg<"%f362">;
|
|
def F363 : NVPTXReg<"%f363">;
|
|
def F364 : NVPTXReg<"%f364">;
|
|
def F365 : NVPTXReg<"%f365">;
|
|
def F366 : NVPTXReg<"%f366">;
|
|
def F367 : NVPTXReg<"%f367">;
|
|
def F368 : NVPTXReg<"%f368">;
|
|
def F369 : NVPTXReg<"%f369">;
|
|
def F370 : NVPTXReg<"%f370">;
|
|
def F371 : NVPTXReg<"%f371">;
|
|
def F372 : NVPTXReg<"%f372">;
|
|
def F373 : NVPTXReg<"%f373">;
|
|
def F374 : NVPTXReg<"%f374">;
|
|
def F375 : NVPTXReg<"%f375">;
|
|
def F376 : NVPTXReg<"%f376">;
|
|
def F377 : NVPTXReg<"%f377">;
|
|
def F378 : NVPTXReg<"%f378">;
|
|
def F379 : NVPTXReg<"%f379">;
|
|
def F380 : NVPTXReg<"%f380">;
|
|
def F381 : NVPTXReg<"%f381">;
|
|
def F382 : NVPTXReg<"%f382">;
|
|
def F383 : NVPTXReg<"%f383">;
|
|
def F384 : NVPTXReg<"%f384">;
|
|
def F385 : NVPTXReg<"%f385">;
|
|
def F386 : NVPTXReg<"%f386">;
|
|
def F387 : NVPTXReg<"%f387">;
|
|
def F388 : NVPTXReg<"%f388">;
|
|
def F389 : NVPTXReg<"%f389">;
|
|
def F390 : NVPTXReg<"%f390">;
|
|
def F391 : NVPTXReg<"%f391">;
|
|
def F392 : NVPTXReg<"%f392">;
|
|
def F393 : NVPTXReg<"%f393">;
|
|
def F394 : NVPTXReg<"%f394">;
|
|
def F395 : NVPTXReg<"%f395">;
|
|
|
|
//===--- 64-bit float -----------------------------------------------------===//
|
|
def FL0 : NVPTXReg<"%fl0">;
|
|
def FL1 : NVPTXReg<"%fl1">;
|
|
def FL2 : NVPTXReg<"%fl2">;
|
|
def FL3 : NVPTXReg<"%fl3">;
|
|
def FL4 : NVPTXReg<"%fl4">;
|
|
def FL5 : NVPTXReg<"%fl5">;
|
|
def FL6 : NVPTXReg<"%fl6">;
|
|
def FL7 : NVPTXReg<"%fl7">;
|
|
def FL8 : NVPTXReg<"%fl8">;
|
|
def FL9 : NVPTXReg<"%fl9">;
|
|
def FL10 : NVPTXReg<"%fl10">;
|
|
def FL11 : NVPTXReg<"%fl11">;
|
|
def FL12 : NVPTXReg<"%fl12">;
|
|
def FL13 : NVPTXReg<"%fl13">;
|
|
def FL14 : NVPTXReg<"%fl14">;
|
|
def FL15 : NVPTXReg<"%fl15">;
|
|
def FL16 : NVPTXReg<"%fl16">;
|
|
def FL17 : NVPTXReg<"%fl17">;
|
|
def FL18 : NVPTXReg<"%fl18">;
|
|
def FL19 : NVPTXReg<"%fl19">;
|
|
def FL20 : NVPTXReg<"%fl20">;
|
|
def FL21 : NVPTXReg<"%fl21">;
|
|
def FL22 : NVPTXReg<"%fl22">;
|
|
def FL23 : NVPTXReg<"%fl23">;
|
|
def FL24 : NVPTXReg<"%fl24">;
|
|
def FL25 : NVPTXReg<"%fl25">;
|
|
def FL26 : NVPTXReg<"%fl26">;
|
|
def FL27 : NVPTXReg<"%fl27">;
|
|
def FL28 : NVPTXReg<"%fl28">;
|
|
def FL29 : NVPTXReg<"%fl29">;
|
|
def FL30 : NVPTXReg<"%fl30">;
|
|
def FL31 : NVPTXReg<"%fl31">;
|
|
def FL32 : NVPTXReg<"%fl32">;
|
|
def FL33 : NVPTXReg<"%fl33">;
|
|
def FL34 : NVPTXReg<"%fl34">;
|
|
def FL35 : NVPTXReg<"%fl35">;
|
|
def FL36 : NVPTXReg<"%fl36">;
|
|
def FL37 : NVPTXReg<"%fl37">;
|
|
def FL38 : NVPTXReg<"%fl38">;
|
|
def FL39 : NVPTXReg<"%fl39">;
|
|
def FL40 : NVPTXReg<"%fl40">;
|
|
def FL41 : NVPTXReg<"%fl41">;
|
|
def FL42 : NVPTXReg<"%fl42">;
|
|
def FL43 : NVPTXReg<"%fl43">;
|
|
def FL44 : NVPTXReg<"%fl44">;
|
|
def FL45 : NVPTXReg<"%fl45">;
|
|
def FL46 : NVPTXReg<"%fl46">;
|
|
def FL47 : NVPTXReg<"%fl47">;
|
|
def FL48 : NVPTXReg<"%fl48">;
|
|
def FL49 : NVPTXReg<"%fl49">;
|
|
def FL50 : NVPTXReg<"%fl50">;
|
|
def FL51 : NVPTXReg<"%fl51">;
|
|
def FL52 : NVPTXReg<"%fl52">;
|
|
def FL53 : NVPTXReg<"%fl53">;
|
|
def FL54 : NVPTXReg<"%fl54">;
|
|
def FL55 : NVPTXReg<"%fl55">;
|
|
def FL56 : NVPTXReg<"%fl56">;
|
|
def FL57 : NVPTXReg<"%fl57">;
|
|
def FL58 : NVPTXReg<"%fl58">;
|
|
def FL59 : NVPTXReg<"%fl59">;
|
|
def FL60 : NVPTXReg<"%fl60">;
|
|
def FL61 : NVPTXReg<"%fl61">;
|
|
def FL62 : NVPTXReg<"%fl62">;
|
|
def FL63 : NVPTXReg<"%fl63">;
|
|
def FL64 : NVPTXReg<"%fl64">;
|
|
def FL65 : NVPTXReg<"%fl65">;
|
|
def FL66 : NVPTXReg<"%fl66">;
|
|
def FL67 : NVPTXReg<"%fl67">;
|
|
def FL68 : NVPTXReg<"%fl68">;
|
|
def FL69 : NVPTXReg<"%fl69">;
|
|
def FL70 : NVPTXReg<"%fl70">;
|
|
def FL71 : NVPTXReg<"%fl71">;
|
|
def FL72 : NVPTXReg<"%fl72">;
|
|
def FL73 : NVPTXReg<"%fl73">;
|
|
def FL74 : NVPTXReg<"%fl74">;
|
|
def FL75 : NVPTXReg<"%fl75">;
|
|
def FL76 : NVPTXReg<"%fl76">;
|
|
def FL77 : NVPTXReg<"%fl77">;
|
|
def FL78 : NVPTXReg<"%fl78">;
|
|
def FL79 : NVPTXReg<"%fl79">;
|
|
def FL80 : NVPTXReg<"%fl80">;
|
|
def FL81 : NVPTXReg<"%fl81">;
|
|
def FL82 : NVPTXReg<"%fl82">;
|
|
def FL83 : NVPTXReg<"%fl83">;
|
|
def FL84 : NVPTXReg<"%fl84">;
|
|
def FL85 : NVPTXReg<"%fl85">;
|
|
def FL86 : NVPTXReg<"%fl86">;
|
|
def FL87 : NVPTXReg<"%fl87">;
|
|
def FL88 : NVPTXReg<"%fl88">;
|
|
def FL89 : NVPTXReg<"%fl89">;
|
|
def FL90 : NVPTXReg<"%fl90">;
|
|
def FL91 : NVPTXReg<"%fl91">;
|
|
def FL92 : NVPTXReg<"%fl92">;
|
|
def FL93 : NVPTXReg<"%fl93">;
|
|
def FL94 : NVPTXReg<"%fl94">;
|
|
def FL95 : NVPTXReg<"%fl95">;
|
|
def FL96 : NVPTXReg<"%fl96">;
|
|
def FL97 : NVPTXReg<"%fl97">;
|
|
def FL98 : NVPTXReg<"%fl98">;
|
|
def FL99 : NVPTXReg<"%fl99">;
|
|
def FL100 : NVPTXReg<"%fl100">;
|
|
def FL101 : NVPTXReg<"%fl101">;
|
|
def FL102 : NVPTXReg<"%fl102">;
|
|
def FL103 : NVPTXReg<"%fl103">;
|
|
def FL104 : NVPTXReg<"%fl104">;
|
|
def FL105 : NVPTXReg<"%fl105">;
|
|
def FL106 : NVPTXReg<"%fl106">;
|
|
def FL107 : NVPTXReg<"%fl107">;
|
|
def FL108 : NVPTXReg<"%fl108">;
|
|
def FL109 : NVPTXReg<"%fl109">;
|
|
def FL110 : NVPTXReg<"%fl110">;
|
|
def FL111 : NVPTXReg<"%fl111">;
|
|
def FL112 : NVPTXReg<"%fl112">;
|
|
def FL113 : NVPTXReg<"%fl113">;
|
|
def FL114 : NVPTXReg<"%fl114">;
|
|
def FL115 : NVPTXReg<"%fl115">;
|
|
def FL116 : NVPTXReg<"%fl116">;
|
|
def FL117 : NVPTXReg<"%fl117">;
|
|
def FL118 : NVPTXReg<"%fl118">;
|
|
def FL119 : NVPTXReg<"%fl119">;
|
|
def FL120 : NVPTXReg<"%fl120">;
|
|
def FL121 : NVPTXReg<"%fl121">;
|
|
def FL122 : NVPTXReg<"%fl122">;
|
|
def FL123 : NVPTXReg<"%fl123">;
|
|
def FL124 : NVPTXReg<"%fl124">;
|
|
def FL125 : NVPTXReg<"%fl125">;
|
|
def FL126 : NVPTXReg<"%fl126">;
|
|
def FL127 : NVPTXReg<"%fl127">;
|
|
def FL128 : NVPTXReg<"%fl128">;
|
|
def FL129 : NVPTXReg<"%fl129">;
|
|
def FL130 : NVPTXReg<"%fl130">;
|
|
def FL131 : NVPTXReg<"%fl131">;
|
|
def FL132 : NVPTXReg<"%fl132">;
|
|
def FL133 : NVPTXReg<"%fl133">;
|
|
def FL134 : NVPTXReg<"%fl134">;
|
|
def FL135 : NVPTXReg<"%fl135">;
|
|
def FL136 : NVPTXReg<"%fl136">;
|
|
def FL137 : NVPTXReg<"%fl137">;
|
|
def FL138 : NVPTXReg<"%fl138">;
|
|
def FL139 : NVPTXReg<"%fl139">;
|
|
def FL140 : NVPTXReg<"%fl140">;
|
|
def FL141 : NVPTXReg<"%fl141">;
|
|
def FL142 : NVPTXReg<"%fl142">;
|
|
def FL143 : NVPTXReg<"%fl143">;
|
|
def FL144 : NVPTXReg<"%fl144">;
|
|
def FL145 : NVPTXReg<"%fl145">;
|
|
def FL146 : NVPTXReg<"%fl146">;
|
|
def FL147 : NVPTXReg<"%fl147">;
|
|
def FL148 : NVPTXReg<"%fl148">;
|
|
def FL149 : NVPTXReg<"%fl149">;
|
|
def FL150 : NVPTXReg<"%fl150">;
|
|
def FL151 : NVPTXReg<"%fl151">;
|
|
def FL152 : NVPTXReg<"%fl152">;
|
|
def FL153 : NVPTXReg<"%fl153">;
|
|
def FL154 : NVPTXReg<"%fl154">;
|
|
def FL155 : NVPTXReg<"%fl155">;
|
|
def FL156 : NVPTXReg<"%fl156">;
|
|
def FL157 : NVPTXReg<"%fl157">;
|
|
def FL158 : NVPTXReg<"%fl158">;
|
|
def FL159 : NVPTXReg<"%fl159">;
|
|
def FL160 : NVPTXReg<"%fl160">;
|
|
def FL161 : NVPTXReg<"%fl161">;
|
|
def FL162 : NVPTXReg<"%fl162">;
|
|
def FL163 : NVPTXReg<"%fl163">;
|
|
def FL164 : NVPTXReg<"%fl164">;
|
|
def FL165 : NVPTXReg<"%fl165">;
|
|
def FL166 : NVPTXReg<"%fl166">;
|
|
def FL167 : NVPTXReg<"%fl167">;
|
|
def FL168 : NVPTXReg<"%fl168">;
|
|
def FL169 : NVPTXReg<"%fl169">;
|
|
def FL170 : NVPTXReg<"%fl170">;
|
|
def FL171 : NVPTXReg<"%fl171">;
|
|
def FL172 : NVPTXReg<"%fl172">;
|
|
def FL173 : NVPTXReg<"%fl173">;
|
|
def FL174 : NVPTXReg<"%fl174">;
|
|
def FL175 : NVPTXReg<"%fl175">;
|
|
def FL176 : NVPTXReg<"%fl176">;
|
|
def FL177 : NVPTXReg<"%fl177">;
|
|
def FL178 : NVPTXReg<"%fl178">;
|
|
def FL179 : NVPTXReg<"%fl179">;
|
|
def FL180 : NVPTXReg<"%fl180">;
|
|
def FL181 : NVPTXReg<"%fl181">;
|
|
def FL182 : NVPTXReg<"%fl182">;
|
|
def FL183 : NVPTXReg<"%fl183">;
|
|
def FL184 : NVPTXReg<"%fl184">;
|
|
def FL185 : NVPTXReg<"%fl185">;
|
|
def FL186 : NVPTXReg<"%fl186">;
|
|
def FL187 : NVPTXReg<"%fl187">;
|
|
def FL188 : NVPTXReg<"%fl188">;
|
|
def FL189 : NVPTXReg<"%fl189">;
|
|
def FL190 : NVPTXReg<"%fl190">;
|
|
def FL191 : NVPTXReg<"%fl191">;
|
|
def FL192 : NVPTXReg<"%fl192">;
|
|
def FL193 : NVPTXReg<"%fl193">;
|
|
def FL194 : NVPTXReg<"%fl194">;
|
|
def FL195 : NVPTXReg<"%fl195">;
|
|
def FL196 : NVPTXReg<"%fl196">;
|
|
def FL197 : NVPTXReg<"%fl197">;
|
|
def FL198 : NVPTXReg<"%fl198">;
|
|
def FL199 : NVPTXReg<"%fl199">;
|
|
def FL200 : NVPTXReg<"%fl200">;
|
|
def FL201 : NVPTXReg<"%fl201">;
|
|
def FL202 : NVPTXReg<"%fl202">;
|
|
def FL203 : NVPTXReg<"%fl203">;
|
|
def FL204 : NVPTXReg<"%fl204">;
|
|
def FL205 : NVPTXReg<"%fl205">;
|
|
def FL206 : NVPTXReg<"%fl206">;
|
|
def FL207 : NVPTXReg<"%fl207">;
|
|
def FL208 : NVPTXReg<"%fl208">;
|
|
def FL209 : NVPTXReg<"%fl209">;
|
|
def FL210 : NVPTXReg<"%fl210">;
|
|
def FL211 : NVPTXReg<"%fl211">;
|
|
def FL212 : NVPTXReg<"%fl212">;
|
|
def FL213 : NVPTXReg<"%fl213">;
|
|
def FL214 : NVPTXReg<"%fl214">;
|
|
def FL215 : NVPTXReg<"%fl215">;
|
|
def FL216 : NVPTXReg<"%fl216">;
|
|
def FL217 : NVPTXReg<"%fl217">;
|
|
def FL218 : NVPTXReg<"%fl218">;
|
|
def FL219 : NVPTXReg<"%fl219">;
|
|
def FL220 : NVPTXReg<"%fl220">;
|
|
def FL221 : NVPTXReg<"%fl221">;
|
|
def FL222 : NVPTXReg<"%fl222">;
|
|
def FL223 : NVPTXReg<"%fl223">;
|
|
def FL224 : NVPTXReg<"%fl224">;
|
|
def FL225 : NVPTXReg<"%fl225">;
|
|
def FL226 : NVPTXReg<"%fl226">;
|
|
def FL227 : NVPTXReg<"%fl227">;
|
|
def FL228 : NVPTXReg<"%fl228">;
|
|
def FL229 : NVPTXReg<"%fl229">;
|
|
def FL230 : NVPTXReg<"%fl230">;
|
|
def FL231 : NVPTXReg<"%fl231">;
|
|
def FL232 : NVPTXReg<"%fl232">;
|
|
def FL233 : NVPTXReg<"%fl233">;
|
|
def FL234 : NVPTXReg<"%fl234">;
|
|
def FL235 : NVPTXReg<"%fl235">;
|
|
def FL236 : NVPTXReg<"%fl236">;
|
|
def FL237 : NVPTXReg<"%fl237">;
|
|
def FL238 : NVPTXReg<"%fl238">;
|
|
def FL239 : NVPTXReg<"%fl239">;
|
|
def FL240 : NVPTXReg<"%fl240">;
|
|
def FL241 : NVPTXReg<"%fl241">;
|
|
def FL242 : NVPTXReg<"%fl242">;
|
|
def FL243 : NVPTXReg<"%fl243">;
|
|
def FL244 : NVPTXReg<"%fl244">;
|
|
def FL245 : NVPTXReg<"%fl245">;
|
|
def FL246 : NVPTXReg<"%fl246">;
|
|
def FL247 : NVPTXReg<"%fl247">;
|
|
def FL248 : NVPTXReg<"%fl248">;
|
|
def FL249 : NVPTXReg<"%fl249">;
|
|
def FL250 : NVPTXReg<"%fl250">;
|
|
def FL251 : NVPTXReg<"%fl251">;
|
|
def FL252 : NVPTXReg<"%fl252">;
|
|
def FL253 : NVPTXReg<"%fl253">;
|
|
def FL254 : NVPTXReg<"%fl254">;
|
|
def FL255 : NVPTXReg<"%fl255">;
|
|
def FL256 : NVPTXReg<"%fl256">;
|
|
def FL257 : NVPTXReg<"%fl257">;
|
|
def FL258 : NVPTXReg<"%fl258">;
|
|
def FL259 : NVPTXReg<"%fl259">;
|
|
def FL260 : NVPTXReg<"%fl260">;
|
|
def FL261 : NVPTXReg<"%fl261">;
|
|
def FL262 : NVPTXReg<"%fl262">;
|
|
def FL263 : NVPTXReg<"%fl263">;
|
|
def FL264 : NVPTXReg<"%fl264">;
|
|
def FL265 : NVPTXReg<"%fl265">;
|
|
def FL266 : NVPTXReg<"%fl266">;
|
|
def FL267 : NVPTXReg<"%fl267">;
|
|
def FL268 : NVPTXReg<"%fl268">;
|
|
def FL269 : NVPTXReg<"%fl269">;
|
|
def FL270 : NVPTXReg<"%fl270">;
|
|
def FL271 : NVPTXReg<"%fl271">;
|
|
def FL272 : NVPTXReg<"%fl272">;
|
|
def FL273 : NVPTXReg<"%fl273">;
|
|
def FL274 : NVPTXReg<"%fl274">;
|
|
def FL275 : NVPTXReg<"%fl275">;
|
|
def FL276 : NVPTXReg<"%fl276">;
|
|
def FL277 : NVPTXReg<"%fl277">;
|
|
def FL278 : NVPTXReg<"%fl278">;
|
|
def FL279 : NVPTXReg<"%fl279">;
|
|
def FL280 : NVPTXReg<"%fl280">;
|
|
def FL281 : NVPTXReg<"%fl281">;
|
|
def FL282 : NVPTXReg<"%fl282">;
|
|
def FL283 : NVPTXReg<"%fl283">;
|
|
def FL284 : NVPTXReg<"%fl284">;
|
|
def FL285 : NVPTXReg<"%fl285">;
|
|
def FL286 : NVPTXReg<"%fl286">;
|
|
def FL287 : NVPTXReg<"%fl287">;
|
|
def FL288 : NVPTXReg<"%fl288">;
|
|
def FL289 : NVPTXReg<"%fl289">;
|
|
def FL290 : NVPTXReg<"%fl290">;
|
|
def FL291 : NVPTXReg<"%fl291">;
|
|
def FL292 : NVPTXReg<"%fl292">;
|
|
def FL293 : NVPTXReg<"%fl293">;
|
|
def FL294 : NVPTXReg<"%fl294">;
|
|
def FL295 : NVPTXReg<"%fl295">;
|
|
def FL296 : NVPTXReg<"%fl296">;
|
|
def FL297 : NVPTXReg<"%fl297">;
|
|
def FL298 : NVPTXReg<"%fl298">;
|
|
def FL299 : NVPTXReg<"%fl299">;
|
|
def FL300 : NVPTXReg<"%fl300">;
|
|
def FL301 : NVPTXReg<"%fl301">;
|
|
def FL302 : NVPTXReg<"%fl302">;
|
|
def FL303 : NVPTXReg<"%fl303">;
|
|
def FL304 : NVPTXReg<"%fl304">;
|
|
def FL305 : NVPTXReg<"%fl305">;
|
|
def FL306 : NVPTXReg<"%fl306">;
|
|
def FL307 : NVPTXReg<"%fl307">;
|
|
def FL308 : NVPTXReg<"%fl308">;
|
|
def FL309 : NVPTXReg<"%fl309">;
|
|
def FL310 : NVPTXReg<"%fl310">;
|
|
def FL311 : NVPTXReg<"%fl311">;
|
|
def FL312 : NVPTXReg<"%fl312">;
|
|
def FL313 : NVPTXReg<"%fl313">;
|
|
def FL314 : NVPTXReg<"%fl314">;
|
|
def FL315 : NVPTXReg<"%fl315">;
|
|
def FL316 : NVPTXReg<"%fl316">;
|
|
def FL317 : NVPTXReg<"%fl317">;
|
|
def FL318 : NVPTXReg<"%fl318">;
|
|
def FL319 : NVPTXReg<"%fl319">;
|
|
def FL320 : NVPTXReg<"%fl320">;
|
|
def FL321 : NVPTXReg<"%fl321">;
|
|
def FL322 : NVPTXReg<"%fl322">;
|
|
def FL323 : NVPTXReg<"%fl323">;
|
|
def FL324 : NVPTXReg<"%fl324">;
|
|
def FL325 : NVPTXReg<"%fl325">;
|
|
def FL326 : NVPTXReg<"%fl326">;
|
|
def FL327 : NVPTXReg<"%fl327">;
|
|
def FL328 : NVPTXReg<"%fl328">;
|
|
def FL329 : NVPTXReg<"%fl329">;
|
|
def FL330 : NVPTXReg<"%fl330">;
|
|
def FL331 : NVPTXReg<"%fl331">;
|
|
def FL332 : NVPTXReg<"%fl332">;
|
|
def FL333 : NVPTXReg<"%fl333">;
|
|
def FL334 : NVPTXReg<"%fl334">;
|
|
def FL335 : NVPTXReg<"%fl335">;
|
|
def FL336 : NVPTXReg<"%fl336">;
|
|
def FL337 : NVPTXReg<"%fl337">;
|
|
def FL338 : NVPTXReg<"%fl338">;
|
|
def FL339 : NVPTXReg<"%fl339">;
|
|
def FL340 : NVPTXReg<"%fl340">;
|
|
def FL341 : NVPTXReg<"%fl341">;
|
|
def FL342 : NVPTXReg<"%fl342">;
|
|
def FL343 : NVPTXReg<"%fl343">;
|
|
def FL344 : NVPTXReg<"%fl344">;
|
|
def FL345 : NVPTXReg<"%fl345">;
|
|
def FL346 : NVPTXReg<"%fl346">;
|
|
def FL347 : NVPTXReg<"%fl347">;
|
|
def FL348 : NVPTXReg<"%fl348">;
|
|
def FL349 : NVPTXReg<"%fl349">;
|
|
def FL350 : NVPTXReg<"%fl350">;
|
|
def FL351 : NVPTXReg<"%fl351">;
|
|
def FL352 : NVPTXReg<"%fl352">;
|
|
def FL353 : NVPTXReg<"%fl353">;
|
|
def FL354 : NVPTXReg<"%fl354">;
|
|
def FL355 : NVPTXReg<"%fl355">;
|
|
def FL356 : NVPTXReg<"%fl356">;
|
|
def FL357 : NVPTXReg<"%fl357">;
|
|
def FL358 : NVPTXReg<"%fl358">;
|
|
def FL359 : NVPTXReg<"%fl359">;
|
|
def FL360 : NVPTXReg<"%fl360">;
|
|
def FL361 : NVPTXReg<"%fl361">;
|
|
def FL362 : NVPTXReg<"%fl362">;
|
|
def FL363 : NVPTXReg<"%fl363">;
|
|
def FL364 : NVPTXReg<"%fl364">;
|
|
def FL365 : NVPTXReg<"%fl365">;
|
|
def FL366 : NVPTXReg<"%fl366">;
|
|
def FL367 : NVPTXReg<"%fl367">;
|
|
def FL368 : NVPTXReg<"%fl368">;
|
|
def FL369 : NVPTXReg<"%fl369">;
|
|
def FL370 : NVPTXReg<"%fl370">;
|
|
def FL371 : NVPTXReg<"%fl371">;
|
|
def FL372 : NVPTXReg<"%fl372">;
|
|
def FL373 : NVPTXReg<"%fl373">;
|
|
def FL374 : NVPTXReg<"%fl374">;
|
|
def FL375 : NVPTXReg<"%fl375">;
|
|
def FL376 : NVPTXReg<"%fl376">;
|
|
def FL377 : NVPTXReg<"%fl377">;
|
|
def FL378 : NVPTXReg<"%fl378">;
|
|
def FL379 : NVPTXReg<"%fl379">;
|
|
def FL380 : NVPTXReg<"%fl380">;
|
|
def FL381 : NVPTXReg<"%fl381">;
|
|
def FL382 : NVPTXReg<"%fl382">;
|
|
def FL383 : NVPTXReg<"%fl383">;
|
|
def FL384 : NVPTXReg<"%fl384">;
|
|
def FL385 : NVPTXReg<"%fl385">;
|
|
def FL386 : NVPTXReg<"%fl386">;
|
|
def FL387 : NVPTXReg<"%fl387">;
|
|
def FL388 : NVPTXReg<"%fl388">;
|
|
def FL389 : NVPTXReg<"%fl389">;
|
|
def FL390 : NVPTXReg<"%fl390">;
|
|
def FL391 : NVPTXReg<"%fl391">;
|
|
def FL392 : NVPTXReg<"%fl392">;
|
|
def FL393 : NVPTXReg<"%fl393">;
|
|
def FL394 : NVPTXReg<"%fl394">;
|
|
def FL395 : NVPTXReg<"%fl395">;
|
|
|
|
//===--- Vector -----------------------------------------------------------===//
|
|
def v2b8_0 : NVPTXReg<"%v2b8_0">;
|
|
def v2b8_1 : NVPTXReg<"%v2b8_1">;
|
|
def v2b8_2 : NVPTXReg<"%v2b8_2">;
|
|
def v2b8_3 : NVPTXReg<"%v2b8_3">;
|
|
def v2b8_4 : NVPTXReg<"%v2b8_4">;
|
|
def v2b8_5 : NVPTXReg<"%v2b8_5">;
|
|
def v2b8_6 : NVPTXReg<"%v2b8_6">;
|
|
def v2b8_7 : NVPTXReg<"%v2b8_7">;
|
|
def v2b8_8 : NVPTXReg<"%v2b8_8">;
|
|
def v2b8_9 : NVPTXReg<"%v2b8_9">;
|
|
def v2b8_10 : NVPTXReg<"%v2b8_10">;
|
|
def v2b8_11 : NVPTXReg<"%v2b8_11">;
|
|
def v2b8_12 : NVPTXReg<"%v2b8_12">;
|
|
def v2b8_13 : NVPTXReg<"%v2b8_13">;
|
|
def v2b8_14 : NVPTXReg<"%v2b8_14">;
|
|
def v2b8_15 : NVPTXReg<"%v2b8_15">;
|
|
def v2b8_16 : NVPTXReg<"%v2b8_16">;
|
|
def v2b8_17 : NVPTXReg<"%v2b8_17">;
|
|
def v2b8_18 : NVPTXReg<"%v2b8_18">;
|
|
def v2b8_19 : NVPTXReg<"%v2b8_19">;
|
|
def v2b8_20 : NVPTXReg<"%v2b8_20">;
|
|
def v2b8_21 : NVPTXReg<"%v2b8_21">;
|
|
def v2b8_22 : NVPTXReg<"%v2b8_22">;
|
|
def v2b8_23 : NVPTXReg<"%v2b8_23">;
|
|
def v2b8_24 : NVPTXReg<"%v2b8_24">;
|
|
def v2b8_25 : NVPTXReg<"%v2b8_25">;
|
|
def v2b8_26 : NVPTXReg<"%v2b8_26">;
|
|
def v2b8_27 : NVPTXReg<"%v2b8_27">;
|
|
def v2b8_28 : NVPTXReg<"%v2b8_28">;
|
|
def v2b8_29 : NVPTXReg<"%v2b8_29">;
|
|
def v2b8_30 : NVPTXReg<"%v2b8_30">;
|
|
def v2b8_31 : NVPTXReg<"%v2b8_31">;
|
|
def v2b8_32 : NVPTXReg<"%v2b8_32">;
|
|
def v2b8_33 : NVPTXReg<"%v2b8_33">;
|
|
def v2b8_34 : NVPTXReg<"%v2b8_34">;
|
|
def v2b8_35 : NVPTXReg<"%v2b8_35">;
|
|
def v2b8_36 : NVPTXReg<"%v2b8_36">;
|
|
def v2b8_37 : NVPTXReg<"%v2b8_37">;
|
|
def v2b8_38 : NVPTXReg<"%v2b8_38">;
|
|
def v2b8_39 : NVPTXReg<"%v2b8_39">;
|
|
def v2b8_40 : NVPTXReg<"%v2b8_40">;
|
|
def v2b8_41 : NVPTXReg<"%v2b8_41">;
|
|
def v2b8_42 : NVPTXReg<"%v2b8_42">;
|
|
def v2b8_43 : NVPTXReg<"%v2b8_43">;
|
|
def v2b8_44 : NVPTXReg<"%v2b8_44">;
|
|
def v2b8_45 : NVPTXReg<"%v2b8_45">;
|
|
def v2b8_46 : NVPTXReg<"%v2b8_46">;
|
|
def v2b8_47 : NVPTXReg<"%v2b8_47">;
|
|
def v2b8_48 : NVPTXReg<"%v2b8_48">;
|
|
def v2b8_49 : NVPTXReg<"%v2b8_49">;
|
|
def v2b8_50 : NVPTXReg<"%v2b8_50">;
|
|
def v2b8_51 : NVPTXReg<"%v2b8_51">;
|
|
def v2b8_52 : NVPTXReg<"%v2b8_52">;
|
|
def v2b8_53 : NVPTXReg<"%v2b8_53">;
|
|
def v2b8_54 : NVPTXReg<"%v2b8_54">;
|
|
def v2b8_55 : NVPTXReg<"%v2b8_55">;
|
|
def v2b8_56 : NVPTXReg<"%v2b8_56">;
|
|
def v2b8_57 : NVPTXReg<"%v2b8_57">;
|
|
def v2b8_58 : NVPTXReg<"%v2b8_58">;
|
|
def v2b8_59 : NVPTXReg<"%v2b8_59">;
|
|
def v2b8_60 : NVPTXReg<"%v2b8_60">;
|
|
def v2b8_61 : NVPTXReg<"%v2b8_61">;
|
|
def v2b8_62 : NVPTXReg<"%v2b8_62">;
|
|
def v2b8_63 : NVPTXReg<"%v2b8_63">;
|
|
def v2b8_64 : NVPTXReg<"%v2b8_64">;
|
|
def v2b8_65 : NVPTXReg<"%v2b8_65">;
|
|
def v2b8_66 : NVPTXReg<"%v2b8_66">;
|
|
def v2b8_67 : NVPTXReg<"%v2b8_67">;
|
|
def v2b8_68 : NVPTXReg<"%v2b8_68">;
|
|
def v2b8_69 : NVPTXReg<"%v2b8_69">;
|
|
def v2b8_70 : NVPTXReg<"%v2b8_70">;
|
|
def v2b8_71 : NVPTXReg<"%v2b8_71">;
|
|
def v2b8_72 : NVPTXReg<"%v2b8_72">;
|
|
def v2b8_73 : NVPTXReg<"%v2b8_73">;
|
|
def v2b8_74 : NVPTXReg<"%v2b8_74">;
|
|
def v2b8_75 : NVPTXReg<"%v2b8_75">;
|
|
def v2b8_76 : NVPTXReg<"%v2b8_76">;
|
|
def v2b8_77 : NVPTXReg<"%v2b8_77">;
|
|
def v2b8_78 : NVPTXReg<"%v2b8_78">;
|
|
def v2b8_79 : NVPTXReg<"%v2b8_79">;
|
|
def v2b8_80 : NVPTXReg<"%v2b8_80">;
|
|
def v2b8_81 : NVPTXReg<"%v2b8_81">;
|
|
def v2b8_82 : NVPTXReg<"%v2b8_82">;
|
|
def v2b8_83 : NVPTXReg<"%v2b8_83">;
|
|
def v2b8_84 : NVPTXReg<"%v2b8_84">;
|
|
def v2b8_85 : NVPTXReg<"%v2b8_85">;
|
|
def v2b8_86 : NVPTXReg<"%v2b8_86">;
|
|
def v2b8_87 : NVPTXReg<"%v2b8_87">;
|
|
def v2b8_88 : NVPTXReg<"%v2b8_88">;
|
|
def v2b8_89 : NVPTXReg<"%v2b8_89">;
|
|
def v2b8_90 : NVPTXReg<"%v2b8_90">;
|
|
def v2b8_91 : NVPTXReg<"%v2b8_91">;
|
|
def v2b8_92 : NVPTXReg<"%v2b8_92">;
|
|
def v2b8_93 : NVPTXReg<"%v2b8_93">;
|
|
def v2b8_94 : NVPTXReg<"%v2b8_94">;
|
|
def v2b8_95 : NVPTXReg<"%v2b8_95">;
|
|
def v2b8_96 : NVPTXReg<"%v2b8_96">;
|
|
def v2b8_97 : NVPTXReg<"%v2b8_97">;
|
|
def v2b8_98 : NVPTXReg<"%v2b8_98">;
|
|
def v2b8_99 : NVPTXReg<"%v2b8_99">;
|
|
def v2b8_100 : NVPTXReg<"%v2b8_100">;
|
|
def v2b8_101 : NVPTXReg<"%v2b8_101">;
|
|
def v2b8_102 : NVPTXReg<"%v2b8_102">;
|
|
def v2b8_103 : NVPTXReg<"%v2b8_103">;
|
|
def v2b8_104 : NVPTXReg<"%v2b8_104">;
|
|
def v2b8_105 : NVPTXReg<"%v2b8_105">;
|
|
def v2b8_106 : NVPTXReg<"%v2b8_106">;
|
|
def v2b8_107 : NVPTXReg<"%v2b8_107">;
|
|
def v2b8_108 : NVPTXReg<"%v2b8_108">;
|
|
def v2b8_109 : NVPTXReg<"%v2b8_109">;
|
|
def v2b8_110 : NVPTXReg<"%v2b8_110">;
|
|
def v2b8_111 : NVPTXReg<"%v2b8_111">;
|
|
def v2b8_112 : NVPTXReg<"%v2b8_112">;
|
|
def v2b8_113 : NVPTXReg<"%v2b8_113">;
|
|
def v2b8_114 : NVPTXReg<"%v2b8_114">;
|
|
def v2b8_115 : NVPTXReg<"%v2b8_115">;
|
|
def v2b8_116 : NVPTXReg<"%v2b8_116">;
|
|
def v2b8_117 : NVPTXReg<"%v2b8_117">;
|
|
def v2b8_118 : NVPTXReg<"%v2b8_118">;
|
|
def v2b8_119 : NVPTXReg<"%v2b8_119">;
|
|
def v2b8_120 : NVPTXReg<"%v2b8_120">;
|
|
def v2b8_121 : NVPTXReg<"%v2b8_121">;
|
|
def v2b8_122 : NVPTXReg<"%v2b8_122">;
|
|
def v2b8_123 : NVPTXReg<"%v2b8_123">;
|
|
def v2b8_124 : NVPTXReg<"%v2b8_124">;
|
|
def v2b8_125 : NVPTXReg<"%v2b8_125">;
|
|
def v2b8_126 : NVPTXReg<"%v2b8_126">;
|
|
def v2b8_127 : NVPTXReg<"%v2b8_127">;
|
|
def v2b8_128 : NVPTXReg<"%v2b8_128">;
|
|
def v2b8_129 : NVPTXReg<"%v2b8_129">;
|
|
def v2b8_130 : NVPTXReg<"%v2b8_130">;
|
|
def v2b8_131 : NVPTXReg<"%v2b8_131">;
|
|
def v2b8_132 : NVPTXReg<"%v2b8_132">;
|
|
def v2b8_133 : NVPTXReg<"%v2b8_133">;
|
|
def v2b8_134 : NVPTXReg<"%v2b8_134">;
|
|
def v2b8_135 : NVPTXReg<"%v2b8_135">;
|
|
def v2b8_136 : NVPTXReg<"%v2b8_136">;
|
|
def v2b8_137 : NVPTXReg<"%v2b8_137">;
|
|
def v2b8_138 : NVPTXReg<"%v2b8_138">;
|
|
def v2b8_139 : NVPTXReg<"%v2b8_139">;
|
|
def v2b8_140 : NVPTXReg<"%v2b8_140">;
|
|
def v2b8_141 : NVPTXReg<"%v2b8_141">;
|
|
def v2b8_142 : NVPTXReg<"%v2b8_142">;
|
|
def v2b8_143 : NVPTXReg<"%v2b8_143">;
|
|
def v2b8_144 : NVPTXReg<"%v2b8_144">;
|
|
def v2b8_145 : NVPTXReg<"%v2b8_145">;
|
|
def v2b8_146 : NVPTXReg<"%v2b8_146">;
|
|
def v2b8_147 : NVPTXReg<"%v2b8_147">;
|
|
def v2b8_148 : NVPTXReg<"%v2b8_148">;
|
|
def v2b8_149 : NVPTXReg<"%v2b8_149">;
|
|
def v2b8_150 : NVPTXReg<"%v2b8_150">;
|
|
def v2b8_151 : NVPTXReg<"%v2b8_151">;
|
|
def v2b8_152 : NVPTXReg<"%v2b8_152">;
|
|
def v2b8_153 : NVPTXReg<"%v2b8_153">;
|
|
def v2b8_154 : NVPTXReg<"%v2b8_154">;
|
|
def v2b8_155 : NVPTXReg<"%v2b8_155">;
|
|
def v2b8_156 : NVPTXReg<"%v2b8_156">;
|
|
def v2b8_157 : NVPTXReg<"%v2b8_157">;
|
|
def v2b8_158 : NVPTXReg<"%v2b8_158">;
|
|
def v2b8_159 : NVPTXReg<"%v2b8_159">;
|
|
def v2b8_160 : NVPTXReg<"%v2b8_160">;
|
|
def v2b8_161 : NVPTXReg<"%v2b8_161">;
|
|
def v2b8_162 : NVPTXReg<"%v2b8_162">;
|
|
def v2b8_163 : NVPTXReg<"%v2b8_163">;
|
|
def v2b8_164 : NVPTXReg<"%v2b8_164">;
|
|
def v2b8_165 : NVPTXReg<"%v2b8_165">;
|
|
def v2b8_166 : NVPTXReg<"%v2b8_166">;
|
|
def v2b8_167 : NVPTXReg<"%v2b8_167">;
|
|
def v2b8_168 : NVPTXReg<"%v2b8_168">;
|
|
def v2b8_169 : NVPTXReg<"%v2b8_169">;
|
|
def v2b8_170 : NVPTXReg<"%v2b8_170">;
|
|
def v2b8_171 : NVPTXReg<"%v2b8_171">;
|
|
def v2b8_172 : NVPTXReg<"%v2b8_172">;
|
|
def v2b8_173 : NVPTXReg<"%v2b8_173">;
|
|
def v2b8_174 : NVPTXReg<"%v2b8_174">;
|
|
def v2b8_175 : NVPTXReg<"%v2b8_175">;
|
|
def v2b8_176 : NVPTXReg<"%v2b8_176">;
|
|
def v2b8_177 : NVPTXReg<"%v2b8_177">;
|
|
def v2b8_178 : NVPTXReg<"%v2b8_178">;
|
|
def v2b8_179 : NVPTXReg<"%v2b8_179">;
|
|
def v2b8_180 : NVPTXReg<"%v2b8_180">;
|
|
def v2b8_181 : NVPTXReg<"%v2b8_181">;
|
|
def v2b8_182 : NVPTXReg<"%v2b8_182">;
|
|
def v2b8_183 : NVPTXReg<"%v2b8_183">;
|
|
def v2b8_184 : NVPTXReg<"%v2b8_184">;
|
|
def v2b8_185 : NVPTXReg<"%v2b8_185">;
|
|
def v2b8_186 : NVPTXReg<"%v2b8_186">;
|
|
def v2b8_187 : NVPTXReg<"%v2b8_187">;
|
|
def v2b8_188 : NVPTXReg<"%v2b8_188">;
|
|
def v2b8_189 : NVPTXReg<"%v2b8_189">;
|
|
def v2b8_190 : NVPTXReg<"%v2b8_190">;
|
|
def v2b8_191 : NVPTXReg<"%v2b8_191">;
|
|
def v2b8_192 : NVPTXReg<"%v2b8_192">;
|
|
def v2b8_193 : NVPTXReg<"%v2b8_193">;
|
|
def v2b8_194 : NVPTXReg<"%v2b8_194">;
|
|
def v2b8_195 : NVPTXReg<"%v2b8_195">;
|
|
def v2b8_196 : NVPTXReg<"%v2b8_196">;
|
|
def v2b8_197 : NVPTXReg<"%v2b8_197">;
|
|
def v2b8_198 : NVPTXReg<"%v2b8_198">;
|
|
def v2b8_199 : NVPTXReg<"%v2b8_199">;
|
|
def v2b8_200 : NVPTXReg<"%v2b8_200">;
|
|
def v2b8_201 : NVPTXReg<"%v2b8_201">;
|
|
def v2b8_202 : NVPTXReg<"%v2b8_202">;
|
|
def v2b8_203 : NVPTXReg<"%v2b8_203">;
|
|
def v2b8_204 : NVPTXReg<"%v2b8_204">;
|
|
def v2b8_205 : NVPTXReg<"%v2b8_205">;
|
|
def v2b8_206 : NVPTXReg<"%v2b8_206">;
|
|
def v2b8_207 : NVPTXReg<"%v2b8_207">;
|
|
def v2b8_208 : NVPTXReg<"%v2b8_208">;
|
|
def v2b8_209 : NVPTXReg<"%v2b8_209">;
|
|
def v2b8_210 : NVPTXReg<"%v2b8_210">;
|
|
def v2b8_211 : NVPTXReg<"%v2b8_211">;
|
|
def v2b8_212 : NVPTXReg<"%v2b8_212">;
|
|
def v2b8_213 : NVPTXReg<"%v2b8_213">;
|
|
def v2b8_214 : NVPTXReg<"%v2b8_214">;
|
|
def v2b8_215 : NVPTXReg<"%v2b8_215">;
|
|
def v2b8_216 : NVPTXReg<"%v2b8_216">;
|
|
def v2b8_217 : NVPTXReg<"%v2b8_217">;
|
|
def v2b8_218 : NVPTXReg<"%v2b8_218">;
|
|
def v2b8_219 : NVPTXReg<"%v2b8_219">;
|
|
def v2b8_220 : NVPTXReg<"%v2b8_220">;
|
|
def v2b8_221 : NVPTXReg<"%v2b8_221">;
|
|
def v2b8_222 : NVPTXReg<"%v2b8_222">;
|
|
def v2b8_223 : NVPTXReg<"%v2b8_223">;
|
|
def v2b8_224 : NVPTXReg<"%v2b8_224">;
|
|
def v2b8_225 : NVPTXReg<"%v2b8_225">;
|
|
def v2b8_226 : NVPTXReg<"%v2b8_226">;
|
|
def v2b8_227 : NVPTXReg<"%v2b8_227">;
|
|
def v2b8_228 : NVPTXReg<"%v2b8_228">;
|
|
def v2b8_229 : NVPTXReg<"%v2b8_229">;
|
|
def v2b8_230 : NVPTXReg<"%v2b8_230">;
|
|
def v2b8_231 : NVPTXReg<"%v2b8_231">;
|
|
def v2b8_232 : NVPTXReg<"%v2b8_232">;
|
|
def v2b8_233 : NVPTXReg<"%v2b8_233">;
|
|
def v2b8_234 : NVPTXReg<"%v2b8_234">;
|
|
def v2b8_235 : NVPTXReg<"%v2b8_235">;
|
|
def v2b8_236 : NVPTXReg<"%v2b8_236">;
|
|
def v2b8_237 : NVPTXReg<"%v2b8_237">;
|
|
def v2b8_238 : NVPTXReg<"%v2b8_238">;
|
|
def v2b8_239 : NVPTXReg<"%v2b8_239">;
|
|
def v2b8_240 : NVPTXReg<"%v2b8_240">;
|
|
def v2b8_241 : NVPTXReg<"%v2b8_241">;
|
|
def v2b8_242 : NVPTXReg<"%v2b8_242">;
|
|
def v2b8_243 : NVPTXReg<"%v2b8_243">;
|
|
def v2b8_244 : NVPTXReg<"%v2b8_244">;
|
|
def v2b8_245 : NVPTXReg<"%v2b8_245">;
|
|
def v2b8_246 : NVPTXReg<"%v2b8_246">;
|
|
def v2b8_247 : NVPTXReg<"%v2b8_247">;
|
|
def v2b8_248 : NVPTXReg<"%v2b8_248">;
|
|
def v2b8_249 : NVPTXReg<"%v2b8_249">;
|
|
def v2b8_250 : NVPTXReg<"%v2b8_250">;
|
|
def v2b8_251 : NVPTXReg<"%v2b8_251">;
|
|
def v2b8_252 : NVPTXReg<"%v2b8_252">;
|
|
def v2b8_253 : NVPTXReg<"%v2b8_253">;
|
|
def v2b8_254 : NVPTXReg<"%v2b8_254">;
|
|
def v2b8_255 : NVPTXReg<"%v2b8_255">;
|
|
def v2b8_256 : NVPTXReg<"%v2b8_256">;
|
|
def v2b8_257 : NVPTXReg<"%v2b8_257">;
|
|
def v2b8_258 : NVPTXReg<"%v2b8_258">;
|
|
def v2b8_259 : NVPTXReg<"%v2b8_259">;
|
|
def v2b8_260 : NVPTXReg<"%v2b8_260">;
|
|
def v2b8_261 : NVPTXReg<"%v2b8_261">;
|
|
def v2b8_262 : NVPTXReg<"%v2b8_262">;
|
|
def v2b8_263 : NVPTXReg<"%v2b8_263">;
|
|
def v2b8_264 : NVPTXReg<"%v2b8_264">;
|
|
def v2b8_265 : NVPTXReg<"%v2b8_265">;
|
|
def v2b8_266 : NVPTXReg<"%v2b8_266">;
|
|
def v2b8_267 : NVPTXReg<"%v2b8_267">;
|
|
def v2b8_268 : NVPTXReg<"%v2b8_268">;
|
|
def v2b8_269 : NVPTXReg<"%v2b8_269">;
|
|
def v2b8_270 : NVPTXReg<"%v2b8_270">;
|
|
def v2b8_271 : NVPTXReg<"%v2b8_271">;
|
|
def v2b8_272 : NVPTXReg<"%v2b8_272">;
|
|
def v2b8_273 : NVPTXReg<"%v2b8_273">;
|
|
def v2b8_274 : NVPTXReg<"%v2b8_274">;
|
|
def v2b8_275 : NVPTXReg<"%v2b8_275">;
|
|
def v2b8_276 : NVPTXReg<"%v2b8_276">;
|
|
def v2b8_277 : NVPTXReg<"%v2b8_277">;
|
|
def v2b8_278 : NVPTXReg<"%v2b8_278">;
|
|
def v2b8_279 : NVPTXReg<"%v2b8_279">;
|
|
def v2b8_280 : NVPTXReg<"%v2b8_280">;
|
|
def v2b8_281 : NVPTXReg<"%v2b8_281">;
|
|
def v2b8_282 : NVPTXReg<"%v2b8_282">;
|
|
def v2b8_283 : NVPTXReg<"%v2b8_283">;
|
|
def v2b8_284 : NVPTXReg<"%v2b8_284">;
|
|
def v2b8_285 : NVPTXReg<"%v2b8_285">;
|
|
def v2b8_286 : NVPTXReg<"%v2b8_286">;
|
|
def v2b8_287 : NVPTXReg<"%v2b8_287">;
|
|
def v2b8_288 : NVPTXReg<"%v2b8_288">;
|
|
def v2b8_289 : NVPTXReg<"%v2b8_289">;
|
|
def v2b8_290 : NVPTXReg<"%v2b8_290">;
|
|
def v2b8_291 : NVPTXReg<"%v2b8_291">;
|
|
def v2b8_292 : NVPTXReg<"%v2b8_292">;
|
|
def v2b8_293 : NVPTXReg<"%v2b8_293">;
|
|
def v2b8_294 : NVPTXReg<"%v2b8_294">;
|
|
def v2b8_295 : NVPTXReg<"%v2b8_295">;
|
|
def v2b8_296 : NVPTXReg<"%v2b8_296">;
|
|
def v2b8_297 : NVPTXReg<"%v2b8_297">;
|
|
def v2b8_298 : NVPTXReg<"%v2b8_298">;
|
|
def v2b8_299 : NVPTXReg<"%v2b8_299">;
|
|
def v2b8_300 : NVPTXReg<"%v2b8_300">;
|
|
def v2b8_301 : NVPTXReg<"%v2b8_301">;
|
|
def v2b8_302 : NVPTXReg<"%v2b8_302">;
|
|
def v2b8_303 : NVPTXReg<"%v2b8_303">;
|
|
def v2b8_304 : NVPTXReg<"%v2b8_304">;
|
|
def v2b8_305 : NVPTXReg<"%v2b8_305">;
|
|
def v2b8_306 : NVPTXReg<"%v2b8_306">;
|
|
def v2b8_307 : NVPTXReg<"%v2b8_307">;
|
|
def v2b8_308 : NVPTXReg<"%v2b8_308">;
|
|
def v2b8_309 : NVPTXReg<"%v2b8_309">;
|
|
def v2b8_310 : NVPTXReg<"%v2b8_310">;
|
|
def v2b8_311 : NVPTXReg<"%v2b8_311">;
|
|
def v2b8_312 : NVPTXReg<"%v2b8_312">;
|
|
def v2b8_313 : NVPTXReg<"%v2b8_313">;
|
|
def v2b8_314 : NVPTXReg<"%v2b8_314">;
|
|
def v2b8_315 : NVPTXReg<"%v2b8_315">;
|
|
def v2b8_316 : NVPTXReg<"%v2b8_316">;
|
|
def v2b8_317 : NVPTXReg<"%v2b8_317">;
|
|
def v2b8_318 : NVPTXReg<"%v2b8_318">;
|
|
def v2b8_319 : NVPTXReg<"%v2b8_319">;
|
|
def v2b8_320 : NVPTXReg<"%v2b8_320">;
|
|
def v2b8_321 : NVPTXReg<"%v2b8_321">;
|
|
def v2b8_322 : NVPTXReg<"%v2b8_322">;
|
|
def v2b8_323 : NVPTXReg<"%v2b8_323">;
|
|
def v2b8_324 : NVPTXReg<"%v2b8_324">;
|
|
def v2b8_325 : NVPTXReg<"%v2b8_325">;
|
|
def v2b8_326 : NVPTXReg<"%v2b8_326">;
|
|
def v2b8_327 : NVPTXReg<"%v2b8_327">;
|
|
def v2b8_328 : NVPTXReg<"%v2b8_328">;
|
|
def v2b8_329 : NVPTXReg<"%v2b8_329">;
|
|
def v2b8_330 : NVPTXReg<"%v2b8_330">;
|
|
def v2b8_331 : NVPTXReg<"%v2b8_331">;
|
|
def v2b8_332 : NVPTXReg<"%v2b8_332">;
|
|
def v2b8_333 : NVPTXReg<"%v2b8_333">;
|
|
def v2b8_334 : NVPTXReg<"%v2b8_334">;
|
|
def v2b8_335 : NVPTXReg<"%v2b8_335">;
|
|
def v2b8_336 : NVPTXReg<"%v2b8_336">;
|
|
def v2b8_337 : NVPTXReg<"%v2b8_337">;
|
|
def v2b8_338 : NVPTXReg<"%v2b8_338">;
|
|
def v2b8_339 : NVPTXReg<"%v2b8_339">;
|
|
def v2b8_340 : NVPTXReg<"%v2b8_340">;
|
|
def v2b8_341 : NVPTXReg<"%v2b8_341">;
|
|
def v2b8_342 : NVPTXReg<"%v2b8_342">;
|
|
def v2b8_343 : NVPTXReg<"%v2b8_343">;
|
|
def v2b8_344 : NVPTXReg<"%v2b8_344">;
|
|
def v2b8_345 : NVPTXReg<"%v2b8_345">;
|
|
def v2b8_346 : NVPTXReg<"%v2b8_346">;
|
|
def v2b8_347 : NVPTXReg<"%v2b8_347">;
|
|
def v2b8_348 : NVPTXReg<"%v2b8_348">;
|
|
def v2b8_349 : NVPTXReg<"%v2b8_349">;
|
|
def v2b8_350 : NVPTXReg<"%v2b8_350">;
|
|
def v2b8_351 : NVPTXReg<"%v2b8_351">;
|
|
def v2b8_352 : NVPTXReg<"%v2b8_352">;
|
|
def v2b8_353 : NVPTXReg<"%v2b8_353">;
|
|
def v2b8_354 : NVPTXReg<"%v2b8_354">;
|
|
def v2b8_355 : NVPTXReg<"%v2b8_355">;
|
|
def v2b8_356 : NVPTXReg<"%v2b8_356">;
|
|
def v2b8_357 : NVPTXReg<"%v2b8_357">;
|
|
def v2b8_358 : NVPTXReg<"%v2b8_358">;
|
|
def v2b8_359 : NVPTXReg<"%v2b8_359">;
|
|
def v2b8_360 : NVPTXReg<"%v2b8_360">;
|
|
def v2b8_361 : NVPTXReg<"%v2b8_361">;
|
|
def v2b8_362 : NVPTXReg<"%v2b8_362">;
|
|
def v2b8_363 : NVPTXReg<"%v2b8_363">;
|
|
def v2b8_364 : NVPTXReg<"%v2b8_364">;
|
|
def v2b8_365 : NVPTXReg<"%v2b8_365">;
|
|
def v2b8_366 : NVPTXReg<"%v2b8_366">;
|
|
def v2b8_367 : NVPTXReg<"%v2b8_367">;
|
|
def v2b8_368 : NVPTXReg<"%v2b8_368">;
|
|
def v2b8_369 : NVPTXReg<"%v2b8_369">;
|
|
def v2b8_370 : NVPTXReg<"%v2b8_370">;
|
|
def v2b8_371 : NVPTXReg<"%v2b8_371">;
|
|
def v2b8_372 : NVPTXReg<"%v2b8_372">;
|
|
def v2b8_373 : NVPTXReg<"%v2b8_373">;
|
|
def v2b8_374 : NVPTXReg<"%v2b8_374">;
|
|
def v2b8_375 : NVPTXReg<"%v2b8_375">;
|
|
def v2b8_376 : NVPTXReg<"%v2b8_376">;
|
|
def v2b8_377 : NVPTXReg<"%v2b8_377">;
|
|
def v2b8_378 : NVPTXReg<"%v2b8_378">;
|
|
def v2b8_379 : NVPTXReg<"%v2b8_379">;
|
|
def v2b8_380 : NVPTXReg<"%v2b8_380">;
|
|
def v2b8_381 : NVPTXReg<"%v2b8_381">;
|
|
def v2b8_382 : NVPTXReg<"%v2b8_382">;
|
|
def v2b8_383 : NVPTXReg<"%v2b8_383">;
|
|
def v2b8_384 : NVPTXReg<"%v2b8_384">;
|
|
def v2b8_385 : NVPTXReg<"%v2b8_385">;
|
|
def v2b8_386 : NVPTXReg<"%v2b8_386">;
|
|
def v2b8_387 : NVPTXReg<"%v2b8_387">;
|
|
def v2b8_388 : NVPTXReg<"%v2b8_388">;
|
|
def v2b8_389 : NVPTXReg<"%v2b8_389">;
|
|
def v2b8_390 : NVPTXReg<"%v2b8_390">;
|
|
def v2b8_391 : NVPTXReg<"%v2b8_391">;
|
|
def v2b8_392 : NVPTXReg<"%v2b8_392">;
|
|
def v2b8_393 : NVPTXReg<"%v2b8_393">;
|
|
def v2b8_394 : NVPTXReg<"%v2b8_394">;
|
|
def v2b8_395 : NVPTXReg<"%v2b8_395">;
|
|
def v2b16_0 : NVPTXReg<"%v2b16_0">;
|
|
def v2b16_1 : NVPTXReg<"%v2b16_1">;
|
|
def v2b16_2 : NVPTXReg<"%v2b16_2">;
|
|
def v2b16_3 : NVPTXReg<"%v2b16_3">;
|
|
def v2b16_4 : NVPTXReg<"%v2b16_4">;
|
|
def v2b16_5 : NVPTXReg<"%v2b16_5">;
|
|
def v2b16_6 : NVPTXReg<"%v2b16_6">;
|
|
def v2b16_7 : NVPTXReg<"%v2b16_7">;
|
|
def v2b16_8 : NVPTXReg<"%v2b16_8">;
|
|
def v2b16_9 : NVPTXReg<"%v2b16_9">;
|
|
def v2b16_10 : NVPTXReg<"%v2b16_10">;
|
|
def v2b16_11 : NVPTXReg<"%v2b16_11">;
|
|
def v2b16_12 : NVPTXReg<"%v2b16_12">;
|
|
def v2b16_13 : NVPTXReg<"%v2b16_13">;
|
|
def v2b16_14 : NVPTXReg<"%v2b16_14">;
|
|
def v2b16_15 : NVPTXReg<"%v2b16_15">;
|
|
def v2b16_16 : NVPTXReg<"%v2b16_16">;
|
|
def v2b16_17 : NVPTXReg<"%v2b16_17">;
|
|
def v2b16_18 : NVPTXReg<"%v2b16_18">;
|
|
def v2b16_19 : NVPTXReg<"%v2b16_19">;
|
|
def v2b16_20 : NVPTXReg<"%v2b16_20">;
|
|
def v2b16_21 : NVPTXReg<"%v2b16_21">;
|
|
def v2b16_22 : NVPTXReg<"%v2b16_22">;
|
|
def v2b16_23 : NVPTXReg<"%v2b16_23">;
|
|
def v2b16_24 : NVPTXReg<"%v2b16_24">;
|
|
def v2b16_25 : NVPTXReg<"%v2b16_25">;
|
|
def v2b16_26 : NVPTXReg<"%v2b16_26">;
|
|
def v2b16_27 : NVPTXReg<"%v2b16_27">;
|
|
def v2b16_28 : NVPTXReg<"%v2b16_28">;
|
|
def v2b16_29 : NVPTXReg<"%v2b16_29">;
|
|
def v2b16_30 : NVPTXReg<"%v2b16_30">;
|
|
def v2b16_31 : NVPTXReg<"%v2b16_31">;
|
|
def v2b16_32 : NVPTXReg<"%v2b16_32">;
|
|
def v2b16_33 : NVPTXReg<"%v2b16_33">;
|
|
def v2b16_34 : NVPTXReg<"%v2b16_34">;
|
|
def v2b16_35 : NVPTXReg<"%v2b16_35">;
|
|
def v2b16_36 : NVPTXReg<"%v2b16_36">;
|
|
def v2b16_37 : NVPTXReg<"%v2b16_37">;
|
|
def v2b16_38 : NVPTXReg<"%v2b16_38">;
|
|
def v2b16_39 : NVPTXReg<"%v2b16_39">;
|
|
def v2b16_40 : NVPTXReg<"%v2b16_40">;
|
|
def v2b16_41 : NVPTXReg<"%v2b16_41">;
|
|
def v2b16_42 : NVPTXReg<"%v2b16_42">;
|
|
def v2b16_43 : NVPTXReg<"%v2b16_43">;
|
|
def v2b16_44 : NVPTXReg<"%v2b16_44">;
|
|
def v2b16_45 : NVPTXReg<"%v2b16_45">;
|
|
def v2b16_46 : NVPTXReg<"%v2b16_46">;
|
|
def v2b16_47 : NVPTXReg<"%v2b16_47">;
|
|
def v2b16_48 : NVPTXReg<"%v2b16_48">;
|
|
def v2b16_49 : NVPTXReg<"%v2b16_49">;
|
|
def v2b16_50 : NVPTXReg<"%v2b16_50">;
|
|
def v2b16_51 : NVPTXReg<"%v2b16_51">;
|
|
def v2b16_52 : NVPTXReg<"%v2b16_52">;
|
|
def v2b16_53 : NVPTXReg<"%v2b16_53">;
|
|
def v2b16_54 : NVPTXReg<"%v2b16_54">;
|
|
def v2b16_55 : NVPTXReg<"%v2b16_55">;
|
|
def v2b16_56 : NVPTXReg<"%v2b16_56">;
|
|
def v2b16_57 : NVPTXReg<"%v2b16_57">;
|
|
def v2b16_58 : NVPTXReg<"%v2b16_58">;
|
|
def v2b16_59 : NVPTXReg<"%v2b16_59">;
|
|
def v2b16_60 : NVPTXReg<"%v2b16_60">;
|
|
def v2b16_61 : NVPTXReg<"%v2b16_61">;
|
|
def v2b16_62 : NVPTXReg<"%v2b16_62">;
|
|
def v2b16_63 : NVPTXReg<"%v2b16_63">;
|
|
def v2b16_64 : NVPTXReg<"%v2b16_64">;
|
|
def v2b16_65 : NVPTXReg<"%v2b16_65">;
|
|
def v2b16_66 : NVPTXReg<"%v2b16_66">;
|
|
def v2b16_67 : NVPTXReg<"%v2b16_67">;
|
|
def v2b16_68 : NVPTXReg<"%v2b16_68">;
|
|
def v2b16_69 : NVPTXReg<"%v2b16_69">;
|
|
def v2b16_70 : NVPTXReg<"%v2b16_70">;
|
|
def v2b16_71 : NVPTXReg<"%v2b16_71">;
|
|
def v2b16_72 : NVPTXReg<"%v2b16_72">;
|
|
def v2b16_73 : NVPTXReg<"%v2b16_73">;
|
|
def v2b16_74 : NVPTXReg<"%v2b16_74">;
|
|
def v2b16_75 : NVPTXReg<"%v2b16_75">;
|
|
def v2b16_76 : NVPTXReg<"%v2b16_76">;
|
|
def v2b16_77 : NVPTXReg<"%v2b16_77">;
|
|
def v2b16_78 : NVPTXReg<"%v2b16_78">;
|
|
def v2b16_79 : NVPTXReg<"%v2b16_79">;
|
|
def v2b16_80 : NVPTXReg<"%v2b16_80">;
|
|
def v2b16_81 : NVPTXReg<"%v2b16_81">;
|
|
def v2b16_82 : NVPTXReg<"%v2b16_82">;
|
|
def v2b16_83 : NVPTXReg<"%v2b16_83">;
|
|
def v2b16_84 : NVPTXReg<"%v2b16_84">;
|
|
def v2b16_85 : NVPTXReg<"%v2b16_85">;
|
|
def v2b16_86 : NVPTXReg<"%v2b16_86">;
|
|
def v2b16_87 : NVPTXReg<"%v2b16_87">;
|
|
def v2b16_88 : NVPTXReg<"%v2b16_88">;
|
|
def v2b16_89 : NVPTXReg<"%v2b16_89">;
|
|
def v2b16_90 : NVPTXReg<"%v2b16_90">;
|
|
def v2b16_91 : NVPTXReg<"%v2b16_91">;
|
|
def v2b16_92 : NVPTXReg<"%v2b16_92">;
|
|
def v2b16_93 : NVPTXReg<"%v2b16_93">;
|
|
def v2b16_94 : NVPTXReg<"%v2b16_94">;
|
|
def v2b16_95 : NVPTXReg<"%v2b16_95">;
|
|
def v2b16_96 : NVPTXReg<"%v2b16_96">;
|
|
def v2b16_97 : NVPTXReg<"%v2b16_97">;
|
|
def v2b16_98 : NVPTXReg<"%v2b16_98">;
|
|
def v2b16_99 : NVPTXReg<"%v2b16_99">;
|
|
def v2b16_100 : NVPTXReg<"%v2b16_100">;
|
|
def v2b16_101 : NVPTXReg<"%v2b16_101">;
|
|
def v2b16_102 : NVPTXReg<"%v2b16_102">;
|
|
def v2b16_103 : NVPTXReg<"%v2b16_103">;
|
|
def v2b16_104 : NVPTXReg<"%v2b16_104">;
|
|
def v2b16_105 : NVPTXReg<"%v2b16_105">;
|
|
def v2b16_106 : NVPTXReg<"%v2b16_106">;
|
|
def v2b16_107 : NVPTXReg<"%v2b16_107">;
|
|
def v2b16_108 : NVPTXReg<"%v2b16_108">;
|
|
def v2b16_109 : NVPTXReg<"%v2b16_109">;
|
|
def v2b16_110 : NVPTXReg<"%v2b16_110">;
|
|
def v2b16_111 : NVPTXReg<"%v2b16_111">;
|
|
def v2b16_112 : NVPTXReg<"%v2b16_112">;
|
|
def v2b16_113 : NVPTXReg<"%v2b16_113">;
|
|
def v2b16_114 : NVPTXReg<"%v2b16_114">;
|
|
def v2b16_115 : NVPTXReg<"%v2b16_115">;
|
|
def v2b16_116 : NVPTXReg<"%v2b16_116">;
|
|
def v2b16_117 : NVPTXReg<"%v2b16_117">;
|
|
def v2b16_118 : NVPTXReg<"%v2b16_118">;
|
|
def v2b16_119 : NVPTXReg<"%v2b16_119">;
|
|
def v2b16_120 : NVPTXReg<"%v2b16_120">;
|
|
def v2b16_121 : NVPTXReg<"%v2b16_121">;
|
|
def v2b16_122 : NVPTXReg<"%v2b16_122">;
|
|
def v2b16_123 : NVPTXReg<"%v2b16_123">;
|
|
def v2b16_124 : NVPTXReg<"%v2b16_124">;
|
|
def v2b16_125 : NVPTXReg<"%v2b16_125">;
|
|
def v2b16_126 : NVPTXReg<"%v2b16_126">;
|
|
def v2b16_127 : NVPTXReg<"%v2b16_127">;
|
|
def v2b16_128 : NVPTXReg<"%v2b16_128">;
|
|
def v2b16_129 : NVPTXReg<"%v2b16_129">;
|
|
def v2b16_130 : NVPTXReg<"%v2b16_130">;
|
|
def v2b16_131 : NVPTXReg<"%v2b16_131">;
|
|
def v2b16_132 : NVPTXReg<"%v2b16_132">;
|
|
def v2b16_133 : NVPTXReg<"%v2b16_133">;
|
|
def v2b16_134 : NVPTXReg<"%v2b16_134">;
|
|
def v2b16_135 : NVPTXReg<"%v2b16_135">;
|
|
def v2b16_136 : NVPTXReg<"%v2b16_136">;
|
|
def v2b16_137 : NVPTXReg<"%v2b16_137">;
|
|
def v2b16_138 : NVPTXReg<"%v2b16_138">;
|
|
def v2b16_139 : NVPTXReg<"%v2b16_139">;
|
|
def v2b16_140 : NVPTXReg<"%v2b16_140">;
|
|
def v2b16_141 : NVPTXReg<"%v2b16_141">;
|
|
def v2b16_142 : NVPTXReg<"%v2b16_142">;
|
|
def v2b16_143 : NVPTXReg<"%v2b16_143">;
|
|
def v2b16_144 : NVPTXReg<"%v2b16_144">;
|
|
def v2b16_145 : NVPTXReg<"%v2b16_145">;
|
|
def v2b16_146 : NVPTXReg<"%v2b16_146">;
|
|
def v2b16_147 : NVPTXReg<"%v2b16_147">;
|
|
def v2b16_148 : NVPTXReg<"%v2b16_148">;
|
|
def v2b16_149 : NVPTXReg<"%v2b16_149">;
|
|
def v2b16_150 : NVPTXReg<"%v2b16_150">;
|
|
def v2b16_151 : NVPTXReg<"%v2b16_151">;
|
|
def v2b16_152 : NVPTXReg<"%v2b16_152">;
|
|
def v2b16_153 : NVPTXReg<"%v2b16_153">;
|
|
def v2b16_154 : NVPTXReg<"%v2b16_154">;
|
|
def v2b16_155 : NVPTXReg<"%v2b16_155">;
|
|
def v2b16_156 : NVPTXReg<"%v2b16_156">;
|
|
def v2b16_157 : NVPTXReg<"%v2b16_157">;
|
|
def v2b16_158 : NVPTXReg<"%v2b16_158">;
|
|
def v2b16_159 : NVPTXReg<"%v2b16_159">;
|
|
def v2b16_160 : NVPTXReg<"%v2b16_160">;
|
|
def v2b16_161 : NVPTXReg<"%v2b16_161">;
|
|
def v2b16_162 : NVPTXReg<"%v2b16_162">;
|
|
def v2b16_163 : NVPTXReg<"%v2b16_163">;
|
|
def v2b16_164 : NVPTXReg<"%v2b16_164">;
|
|
def v2b16_165 : NVPTXReg<"%v2b16_165">;
|
|
def v2b16_166 : NVPTXReg<"%v2b16_166">;
|
|
def v2b16_167 : NVPTXReg<"%v2b16_167">;
|
|
def v2b16_168 : NVPTXReg<"%v2b16_168">;
|
|
def v2b16_169 : NVPTXReg<"%v2b16_169">;
|
|
def v2b16_170 : NVPTXReg<"%v2b16_170">;
|
|
def v2b16_171 : NVPTXReg<"%v2b16_171">;
|
|
def v2b16_172 : NVPTXReg<"%v2b16_172">;
|
|
def v2b16_173 : NVPTXReg<"%v2b16_173">;
|
|
def v2b16_174 : NVPTXReg<"%v2b16_174">;
|
|
def v2b16_175 : NVPTXReg<"%v2b16_175">;
|
|
def v2b16_176 : NVPTXReg<"%v2b16_176">;
|
|
def v2b16_177 : NVPTXReg<"%v2b16_177">;
|
|
def v2b16_178 : NVPTXReg<"%v2b16_178">;
|
|
def v2b16_179 : NVPTXReg<"%v2b16_179">;
|
|
def v2b16_180 : NVPTXReg<"%v2b16_180">;
|
|
def v2b16_181 : NVPTXReg<"%v2b16_181">;
|
|
def v2b16_182 : NVPTXReg<"%v2b16_182">;
|
|
def v2b16_183 : NVPTXReg<"%v2b16_183">;
|
|
def v2b16_184 : NVPTXReg<"%v2b16_184">;
|
|
def v2b16_185 : NVPTXReg<"%v2b16_185">;
|
|
def v2b16_186 : NVPTXReg<"%v2b16_186">;
|
|
def v2b16_187 : NVPTXReg<"%v2b16_187">;
|
|
def v2b16_188 : NVPTXReg<"%v2b16_188">;
|
|
def v2b16_189 : NVPTXReg<"%v2b16_189">;
|
|
def v2b16_190 : NVPTXReg<"%v2b16_190">;
|
|
def v2b16_191 : NVPTXReg<"%v2b16_191">;
|
|
def v2b16_192 : NVPTXReg<"%v2b16_192">;
|
|
def v2b16_193 : NVPTXReg<"%v2b16_193">;
|
|
def v2b16_194 : NVPTXReg<"%v2b16_194">;
|
|
def v2b16_195 : NVPTXReg<"%v2b16_195">;
|
|
def v2b16_196 : NVPTXReg<"%v2b16_196">;
|
|
def v2b16_197 : NVPTXReg<"%v2b16_197">;
|
|
def v2b16_198 : NVPTXReg<"%v2b16_198">;
|
|
def v2b16_199 : NVPTXReg<"%v2b16_199">;
|
|
def v2b16_200 : NVPTXReg<"%v2b16_200">;
|
|
def v2b16_201 : NVPTXReg<"%v2b16_201">;
|
|
def v2b16_202 : NVPTXReg<"%v2b16_202">;
|
|
def v2b16_203 : NVPTXReg<"%v2b16_203">;
|
|
def v2b16_204 : NVPTXReg<"%v2b16_204">;
|
|
def v2b16_205 : NVPTXReg<"%v2b16_205">;
|
|
def v2b16_206 : NVPTXReg<"%v2b16_206">;
|
|
def v2b16_207 : NVPTXReg<"%v2b16_207">;
|
|
def v2b16_208 : NVPTXReg<"%v2b16_208">;
|
|
def v2b16_209 : NVPTXReg<"%v2b16_209">;
|
|
def v2b16_210 : NVPTXReg<"%v2b16_210">;
|
|
def v2b16_211 : NVPTXReg<"%v2b16_211">;
|
|
def v2b16_212 : NVPTXReg<"%v2b16_212">;
|
|
def v2b16_213 : NVPTXReg<"%v2b16_213">;
|
|
def v2b16_214 : NVPTXReg<"%v2b16_214">;
|
|
def v2b16_215 : NVPTXReg<"%v2b16_215">;
|
|
def v2b16_216 : NVPTXReg<"%v2b16_216">;
|
|
def v2b16_217 : NVPTXReg<"%v2b16_217">;
|
|
def v2b16_218 : NVPTXReg<"%v2b16_218">;
|
|
def v2b16_219 : NVPTXReg<"%v2b16_219">;
|
|
def v2b16_220 : NVPTXReg<"%v2b16_220">;
|
|
def v2b16_221 : NVPTXReg<"%v2b16_221">;
|
|
def v2b16_222 : NVPTXReg<"%v2b16_222">;
|
|
def v2b16_223 : NVPTXReg<"%v2b16_223">;
|
|
def v2b16_224 : NVPTXReg<"%v2b16_224">;
|
|
def v2b16_225 : NVPTXReg<"%v2b16_225">;
|
|
def v2b16_226 : NVPTXReg<"%v2b16_226">;
|
|
def v2b16_227 : NVPTXReg<"%v2b16_227">;
|
|
def v2b16_228 : NVPTXReg<"%v2b16_228">;
|
|
def v2b16_229 : NVPTXReg<"%v2b16_229">;
|
|
def v2b16_230 : NVPTXReg<"%v2b16_230">;
|
|
def v2b16_231 : NVPTXReg<"%v2b16_231">;
|
|
def v2b16_232 : NVPTXReg<"%v2b16_232">;
|
|
def v2b16_233 : NVPTXReg<"%v2b16_233">;
|
|
def v2b16_234 : NVPTXReg<"%v2b16_234">;
|
|
def v2b16_235 : NVPTXReg<"%v2b16_235">;
|
|
def v2b16_236 : NVPTXReg<"%v2b16_236">;
|
|
def v2b16_237 : NVPTXReg<"%v2b16_237">;
|
|
def v2b16_238 : NVPTXReg<"%v2b16_238">;
|
|
def v2b16_239 : NVPTXReg<"%v2b16_239">;
|
|
def v2b16_240 : NVPTXReg<"%v2b16_240">;
|
|
def v2b16_241 : NVPTXReg<"%v2b16_241">;
|
|
def v2b16_242 : NVPTXReg<"%v2b16_242">;
|
|
def v2b16_243 : NVPTXReg<"%v2b16_243">;
|
|
def v2b16_244 : NVPTXReg<"%v2b16_244">;
|
|
def v2b16_245 : NVPTXReg<"%v2b16_245">;
|
|
def v2b16_246 : NVPTXReg<"%v2b16_246">;
|
|
def v2b16_247 : NVPTXReg<"%v2b16_247">;
|
|
def v2b16_248 : NVPTXReg<"%v2b16_248">;
|
|
def v2b16_249 : NVPTXReg<"%v2b16_249">;
|
|
def v2b16_250 : NVPTXReg<"%v2b16_250">;
|
|
def v2b16_251 : NVPTXReg<"%v2b16_251">;
|
|
def v2b16_252 : NVPTXReg<"%v2b16_252">;
|
|
def v2b16_253 : NVPTXReg<"%v2b16_253">;
|
|
def v2b16_254 : NVPTXReg<"%v2b16_254">;
|
|
def v2b16_255 : NVPTXReg<"%v2b16_255">;
|
|
def v2b16_256 : NVPTXReg<"%v2b16_256">;
|
|
def v2b16_257 : NVPTXReg<"%v2b16_257">;
|
|
def v2b16_258 : NVPTXReg<"%v2b16_258">;
|
|
def v2b16_259 : NVPTXReg<"%v2b16_259">;
|
|
def v2b16_260 : NVPTXReg<"%v2b16_260">;
|
|
def v2b16_261 : NVPTXReg<"%v2b16_261">;
|
|
def v2b16_262 : NVPTXReg<"%v2b16_262">;
|
|
def v2b16_263 : NVPTXReg<"%v2b16_263">;
|
|
def v2b16_264 : NVPTXReg<"%v2b16_264">;
|
|
def v2b16_265 : NVPTXReg<"%v2b16_265">;
|
|
def v2b16_266 : NVPTXReg<"%v2b16_266">;
|
|
def v2b16_267 : NVPTXReg<"%v2b16_267">;
|
|
def v2b16_268 : NVPTXReg<"%v2b16_268">;
|
|
def v2b16_269 : NVPTXReg<"%v2b16_269">;
|
|
def v2b16_270 : NVPTXReg<"%v2b16_270">;
|
|
def v2b16_271 : NVPTXReg<"%v2b16_271">;
|
|
def v2b16_272 : NVPTXReg<"%v2b16_272">;
|
|
def v2b16_273 : NVPTXReg<"%v2b16_273">;
|
|
def v2b16_274 : NVPTXReg<"%v2b16_274">;
|
|
def v2b16_275 : NVPTXReg<"%v2b16_275">;
|
|
def v2b16_276 : NVPTXReg<"%v2b16_276">;
|
|
def v2b16_277 : NVPTXReg<"%v2b16_277">;
|
|
def v2b16_278 : NVPTXReg<"%v2b16_278">;
|
|
def v2b16_279 : NVPTXReg<"%v2b16_279">;
|
|
def v2b16_280 : NVPTXReg<"%v2b16_280">;
|
|
def v2b16_281 : NVPTXReg<"%v2b16_281">;
|
|
def v2b16_282 : NVPTXReg<"%v2b16_282">;
|
|
def v2b16_283 : NVPTXReg<"%v2b16_283">;
|
|
def v2b16_284 : NVPTXReg<"%v2b16_284">;
|
|
def v2b16_285 : NVPTXReg<"%v2b16_285">;
|
|
def v2b16_286 : NVPTXReg<"%v2b16_286">;
|
|
def v2b16_287 : NVPTXReg<"%v2b16_287">;
|
|
def v2b16_288 : NVPTXReg<"%v2b16_288">;
|
|
def v2b16_289 : NVPTXReg<"%v2b16_289">;
|
|
def v2b16_290 : NVPTXReg<"%v2b16_290">;
|
|
def v2b16_291 : NVPTXReg<"%v2b16_291">;
|
|
def v2b16_292 : NVPTXReg<"%v2b16_292">;
|
|
def v2b16_293 : NVPTXReg<"%v2b16_293">;
|
|
def v2b16_294 : NVPTXReg<"%v2b16_294">;
|
|
def v2b16_295 : NVPTXReg<"%v2b16_295">;
|
|
def v2b16_296 : NVPTXReg<"%v2b16_296">;
|
|
def v2b16_297 : NVPTXReg<"%v2b16_297">;
|
|
def v2b16_298 : NVPTXReg<"%v2b16_298">;
|
|
def v2b16_299 : NVPTXReg<"%v2b16_299">;
|
|
def v2b16_300 : NVPTXReg<"%v2b16_300">;
|
|
def v2b16_301 : NVPTXReg<"%v2b16_301">;
|
|
def v2b16_302 : NVPTXReg<"%v2b16_302">;
|
|
def v2b16_303 : NVPTXReg<"%v2b16_303">;
|
|
def v2b16_304 : NVPTXReg<"%v2b16_304">;
|
|
def v2b16_305 : NVPTXReg<"%v2b16_305">;
|
|
def v2b16_306 : NVPTXReg<"%v2b16_306">;
|
|
def v2b16_307 : NVPTXReg<"%v2b16_307">;
|
|
def v2b16_308 : NVPTXReg<"%v2b16_308">;
|
|
def v2b16_309 : NVPTXReg<"%v2b16_309">;
|
|
def v2b16_310 : NVPTXReg<"%v2b16_310">;
|
|
def v2b16_311 : NVPTXReg<"%v2b16_311">;
|
|
def v2b16_312 : NVPTXReg<"%v2b16_312">;
|
|
def v2b16_313 : NVPTXReg<"%v2b16_313">;
|
|
def v2b16_314 : NVPTXReg<"%v2b16_314">;
|
|
def v2b16_315 : NVPTXReg<"%v2b16_315">;
|
|
def v2b16_316 : NVPTXReg<"%v2b16_316">;
|
|
def v2b16_317 : NVPTXReg<"%v2b16_317">;
|
|
def v2b16_318 : NVPTXReg<"%v2b16_318">;
|
|
def v2b16_319 : NVPTXReg<"%v2b16_319">;
|
|
def v2b16_320 : NVPTXReg<"%v2b16_320">;
|
|
def v2b16_321 : NVPTXReg<"%v2b16_321">;
|
|
def v2b16_322 : NVPTXReg<"%v2b16_322">;
|
|
def v2b16_323 : NVPTXReg<"%v2b16_323">;
|
|
def v2b16_324 : NVPTXReg<"%v2b16_324">;
|
|
def v2b16_325 : NVPTXReg<"%v2b16_325">;
|
|
def v2b16_326 : NVPTXReg<"%v2b16_326">;
|
|
def v2b16_327 : NVPTXReg<"%v2b16_327">;
|
|
def v2b16_328 : NVPTXReg<"%v2b16_328">;
|
|
def v2b16_329 : NVPTXReg<"%v2b16_329">;
|
|
def v2b16_330 : NVPTXReg<"%v2b16_330">;
|
|
def v2b16_331 : NVPTXReg<"%v2b16_331">;
|
|
def v2b16_332 : NVPTXReg<"%v2b16_332">;
|
|
def v2b16_333 : NVPTXReg<"%v2b16_333">;
|
|
def v2b16_334 : NVPTXReg<"%v2b16_334">;
|
|
def v2b16_335 : NVPTXReg<"%v2b16_335">;
|
|
def v2b16_336 : NVPTXReg<"%v2b16_336">;
|
|
def v2b16_337 : NVPTXReg<"%v2b16_337">;
|
|
def v2b16_338 : NVPTXReg<"%v2b16_338">;
|
|
def v2b16_339 : NVPTXReg<"%v2b16_339">;
|
|
def v2b16_340 : NVPTXReg<"%v2b16_340">;
|
|
def v2b16_341 : NVPTXReg<"%v2b16_341">;
|
|
def v2b16_342 : NVPTXReg<"%v2b16_342">;
|
|
def v2b16_343 : NVPTXReg<"%v2b16_343">;
|
|
def v2b16_344 : NVPTXReg<"%v2b16_344">;
|
|
def v2b16_345 : NVPTXReg<"%v2b16_345">;
|
|
def v2b16_346 : NVPTXReg<"%v2b16_346">;
|
|
def v2b16_347 : NVPTXReg<"%v2b16_347">;
|
|
def v2b16_348 : NVPTXReg<"%v2b16_348">;
|
|
def v2b16_349 : NVPTXReg<"%v2b16_349">;
|
|
def v2b16_350 : NVPTXReg<"%v2b16_350">;
|
|
def v2b16_351 : NVPTXReg<"%v2b16_351">;
|
|
def v2b16_352 : NVPTXReg<"%v2b16_352">;
|
|
def v2b16_353 : NVPTXReg<"%v2b16_353">;
|
|
def v2b16_354 : NVPTXReg<"%v2b16_354">;
|
|
def v2b16_355 : NVPTXReg<"%v2b16_355">;
|
|
def v2b16_356 : NVPTXReg<"%v2b16_356">;
|
|
def v2b16_357 : NVPTXReg<"%v2b16_357">;
|
|
def v2b16_358 : NVPTXReg<"%v2b16_358">;
|
|
def v2b16_359 : NVPTXReg<"%v2b16_359">;
|
|
def v2b16_360 : NVPTXReg<"%v2b16_360">;
|
|
def v2b16_361 : NVPTXReg<"%v2b16_361">;
|
|
def v2b16_362 : NVPTXReg<"%v2b16_362">;
|
|
def v2b16_363 : NVPTXReg<"%v2b16_363">;
|
|
def v2b16_364 : NVPTXReg<"%v2b16_364">;
|
|
def v2b16_365 : NVPTXReg<"%v2b16_365">;
|
|
def v2b16_366 : NVPTXReg<"%v2b16_366">;
|
|
def v2b16_367 : NVPTXReg<"%v2b16_367">;
|
|
def v2b16_368 : NVPTXReg<"%v2b16_368">;
|
|
def v2b16_369 : NVPTXReg<"%v2b16_369">;
|
|
def v2b16_370 : NVPTXReg<"%v2b16_370">;
|
|
def v2b16_371 : NVPTXReg<"%v2b16_371">;
|
|
def v2b16_372 : NVPTXReg<"%v2b16_372">;
|
|
def v2b16_373 : NVPTXReg<"%v2b16_373">;
|
|
def v2b16_374 : NVPTXReg<"%v2b16_374">;
|
|
def v2b16_375 : NVPTXReg<"%v2b16_375">;
|
|
def v2b16_376 : NVPTXReg<"%v2b16_376">;
|
|
def v2b16_377 : NVPTXReg<"%v2b16_377">;
|
|
def v2b16_378 : NVPTXReg<"%v2b16_378">;
|
|
def v2b16_379 : NVPTXReg<"%v2b16_379">;
|
|
def v2b16_380 : NVPTXReg<"%v2b16_380">;
|
|
def v2b16_381 : NVPTXReg<"%v2b16_381">;
|
|
def v2b16_382 : NVPTXReg<"%v2b16_382">;
|
|
def v2b16_383 : NVPTXReg<"%v2b16_383">;
|
|
def v2b16_384 : NVPTXReg<"%v2b16_384">;
|
|
def v2b16_385 : NVPTXReg<"%v2b16_385">;
|
|
def v2b16_386 : NVPTXReg<"%v2b16_386">;
|
|
def v2b16_387 : NVPTXReg<"%v2b16_387">;
|
|
def v2b16_388 : NVPTXReg<"%v2b16_388">;
|
|
def v2b16_389 : NVPTXReg<"%v2b16_389">;
|
|
def v2b16_390 : NVPTXReg<"%v2b16_390">;
|
|
def v2b16_391 : NVPTXReg<"%v2b16_391">;
|
|
def v2b16_392 : NVPTXReg<"%v2b16_392">;
|
|
def v2b16_393 : NVPTXReg<"%v2b16_393">;
|
|
def v2b16_394 : NVPTXReg<"%v2b16_394">;
|
|
def v2b16_395 : NVPTXReg<"%v2b16_395">;
|
|
def v2b32_0 : NVPTXReg<"%v2b32_0">;
|
|
def v2b32_1 : NVPTXReg<"%v2b32_1">;
|
|
def v2b32_2 : NVPTXReg<"%v2b32_2">;
|
|
def v2b32_3 : NVPTXReg<"%v2b32_3">;
|
|
def v2b32_4 : NVPTXReg<"%v2b32_4">;
|
|
def v2b32_5 : NVPTXReg<"%v2b32_5">;
|
|
def v2b32_6 : NVPTXReg<"%v2b32_6">;
|
|
def v2b32_7 : NVPTXReg<"%v2b32_7">;
|
|
def v2b32_8 : NVPTXReg<"%v2b32_8">;
|
|
def v2b32_9 : NVPTXReg<"%v2b32_9">;
|
|
def v2b32_10 : NVPTXReg<"%v2b32_10">;
|
|
def v2b32_11 : NVPTXReg<"%v2b32_11">;
|
|
def v2b32_12 : NVPTXReg<"%v2b32_12">;
|
|
def v2b32_13 : NVPTXReg<"%v2b32_13">;
|
|
def v2b32_14 : NVPTXReg<"%v2b32_14">;
|
|
def v2b32_15 : NVPTXReg<"%v2b32_15">;
|
|
def v2b32_16 : NVPTXReg<"%v2b32_16">;
|
|
def v2b32_17 : NVPTXReg<"%v2b32_17">;
|
|
def v2b32_18 : NVPTXReg<"%v2b32_18">;
|
|
def v2b32_19 : NVPTXReg<"%v2b32_19">;
|
|
def v2b32_20 : NVPTXReg<"%v2b32_20">;
|
|
def v2b32_21 : NVPTXReg<"%v2b32_21">;
|
|
def v2b32_22 : NVPTXReg<"%v2b32_22">;
|
|
def v2b32_23 : NVPTXReg<"%v2b32_23">;
|
|
def v2b32_24 : NVPTXReg<"%v2b32_24">;
|
|
def v2b32_25 : NVPTXReg<"%v2b32_25">;
|
|
def v2b32_26 : NVPTXReg<"%v2b32_26">;
|
|
def v2b32_27 : NVPTXReg<"%v2b32_27">;
|
|
def v2b32_28 : NVPTXReg<"%v2b32_28">;
|
|
def v2b32_29 : NVPTXReg<"%v2b32_29">;
|
|
def v2b32_30 : NVPTXReg<"%v2b32_30">;
|
|
def v2b32_31 : NVPTXReg<"%v2b32_31">;
|
|
def v2b32_32 : NVPTXReg<"%v2b32_32">;
|
|
def v2b32_33 : NVPTXReg<"%v2b32_33">;
|
|
def v2b32_34 : NVPTXReg<"%v2b32_34">;
|
|
def v2b32_35 : NVPTXReg<"%v2b32_35">;
|
|
def v2b32_36 : NVPTXReg<"%v2b32_36">;
|
|
def v2b32_37 : NVPTXReg<"%v2b32_37">;
|
|
def v2b32_38 : NVPTXReg<"%v2b32_38">;
|
|
def v2b32_39 : NVPTXReg<"%v2b32_39">;
|
|
def v2b32_40 : NVPTXReg<"%v2b32_40">;
|
|
def v2b32_41 : NVPTXReg<"%v2b32_41">;
|
|
def v2b32_42 : NVPTXReg<"%v2b32_42">;
|
|
def v2b32_43 : NVPTXReg<"%v2b32_43">;
|
|
def v2b32_44 : NVPTXReg<"%v2b32_44">;
|
|
def v2b32_45 : NVPTXReg<"%v2b32_45">;
|
|
def v2b32_46 : NVPTXReg<"%v2b32_46">;
|
|
def v2b32_47 : NVPTXReg<"%v2b32_47">;
|
|
def v2b32_48 : NVPTXReg<"%v2b32_48">;
|
|
def v2b32_49 : NVPTXReg<"%v2b32_49">;
|
|
def v2b32_50 : NVPTXReg<"%v2b32_50">;
|
|
def v2b32_51 : NVPTXReg<"%v2b32_51">;
|
|
def v2b32_52 : NVPTXReg<"%v2b32_52">;
|
|
def v2b32_53 : NVPTXReg<"%v2b32_53">;
|
|
def v2b32_54 : NVPTXReg<"%v2b32_54">;
|
|
def v2b32_55 : NVPTXReg<"%v2b32_55">;
|
|
def v2b32_56 : NVPTXReg<"%v2b32_56">;
|
|
def v2b32_57 : NVPTXReg<"%v2b32_57">;
|
|
def v2b32_58 : NVPTXReg<"%v2b32_58">;
|
|
def v2b32_59 : NVPTXReg<"%v2b32_59">;
|
|
def v2b32_60 : NVPTXReg<"%v2b32_60">;
|
|
def v2b32_61 : NVPTXReg<"%v2b32_61">;
|
|
def v2b32_62 : NVPTXReg<"%v2b32_62">;
|
|
def v2b32_63 : NVPTXReg<"%v2b32_63">;
|
|
def v2b32_64 : NVPTXReg<"%v2b32_64">;
|
|
def v2b32_65 : NVPTXReg<"%v2b32_65">;
|
|
def v2b32_66 : NVPTXReg<"%v2b32_66">;
|
|
def v2b32_67 : NVPTXReg<"%v2b32_67">;
|
|
def v2b32_68 : NVPTXReg<"%v2b32_68">;
|
|
def v2b32_69 : NVPTXReg<"%v2b32_69">;
|
|
def v2b32_70 : NVPTXReg<"%v2b32_70">;
|
|
def v2b32_71 : NVPTXReg<"%v2b32_71">;
|
|
def v2b32_72 : NVPTXReg<"%v2b32_72">;
|
|
def v2b32_73 : NVPTXReg<"%v2b32_73">;
|
|
def v2b32_74 : NVPTXReg<"%v2b32_74">;
|
|
def v2b32_75 : NVPTXReg<"%v2b32_75">;
|
|
def v2b32_76 : NVPTXReg<"%v2b32_76">;
|
|
def v2b32_77 : NVPTXReg<"%v2b32_77">;
|
|
def v2b32_78 : NVPTXReg<"%v2b32_78">;
|
|
def v2b32_79 : NVPTXReg<"%v2b32_79">;
|
|
def v2b32_80 : NVPTXReg<"%v2b32_80">;
|
|
def v2b32_81 : NVPTXReg<"%v2b32_81">;
|
|
def v2b32_82 : NVPTXReg<"%v2b32_82">;
|
|
def v2b32_83 : NVPTXReg<"%v2b32_83">;
|
|
def v2b32_84 : NVPTXReg<"%v2b32_84">;
|
|
def v2b32_85 : NVPTXReg<"%v2b32_85">;
|
|
def v2b32_86 : NVPTXReg<"%v2b32_86">;
|
|
def v2b32_87 : NVPTXReg<"%v2b32_87">;
|
|
def v2b32_88 : NVPTXReg<"%v2b32_88">;
|
|
def v2b32_89 : NVPTXReg<"%v2b32_89">;
|
|
def v2b32_90 : NVPTXReg<"%v2b32_90">;
|
|
def v2b32_91 : NVPTXReg<"%v2b32_91">;
|
|
def v2b32_92 : NVPTXReg<"%v2b32_92">;
|
|
def v2b32_93 : NVPTXReg<"%v2b32_93">;
|
|
def v2b32_94 : NVPTXReg<"%v2b32_94">;
|
|
def v2b32_95 : NVPTXReg<"%v2b32_95">;
|
|
def v2b32_96 : NVPTXReg<"%v2b32_96">;
|
|
def v2b32_97 : NVPTXReg<"%v2b32_97">;
|
|
def v2b32_98 : NVPTXReg<"%v2b32_98">;
|
|
def v2b32_99 : NVPTXReg<"%v2b32_99">;
|
|
def v2b32_100 : NVPTXReg<"%v2b32_100">;
|
|
def v2b32_101 : NVPTXReg<"%v2b32_101">;
|
|
def v2b32_102 : NVPTXReg<"%v2b32_102">;
|
|
def v2b32_103 : NVPTXReg<"%v2b32_103">;
|
|
def v2b32_104 : NVPTXReg<"%v2b32_104">;
|
|
def v2b32_105 : NVPTXReg<"%v2b32_105">;
|
|
def v2b32_106 : NVPTXReg<"%v2b32_106">;
|
|
def v2b32_107 : NVPTXReg<"%v2b32_107">;
|
|
def v2b32_108 : NVPTXReg<"%v2b32_108">;
|
|
def v2b32_109 : NVPTXReg<"%v2b32_109">;
|
|
def v2b32_110 : NVPTXReg<"%v2b32_110">;
|
|
def v2b32_111 : NVPTXReg<"%v2b32_111">;
|
|
def v2b32_112 : NVPTXReg<"%v2b32_112">;
|
|
def v2b32_113 : NVPTXReg<"%v2b32_113">;
|
|
def v2b32_114 : NVPTXReg<"%v2b32_114">;
|
|
def v2b32_115 : NVPTXReg<"%v2b32_115">;
|
|
def v2b32_116 : NVPTXReg<"%v2b32_116">;
|
|
def v2b32_117 : NVPTXReg<"%v2b32_117">;
|
|
def v2b32_118 : NVPTXReg<"%v2b32_118">;
|
|
def v2b32_119 : NVPTXReg<"%v2b32_119">;
|
|
def v2b32_120 : NVPTXReg<"%v2b32_120">;
|
|
def v2b32_121 : NVPTXReg<"%v2b32_121">;
|
|
def v2b32_122 : NVPTXReg<"%v2b32_122">;
|
|
def v2b32_123 : NVPTXReg<"%v2b32_123">;
|
|
def v2b32_124 : NVPTXReg<"%v2b32_124">;
|
|
def v2b32_125 : NVPTXReg<"%v2b32_125">;
|
|
def v2b32_126 : NVPTXReg<"%v2b32_126">;
|
|
def v2b32_127 : NVPTXReg<"%v2b32_127">;
|
|
def v2b32_128 : NVPTXReg<"%v2b32_128">;
|
|
def v2b32_129 : NVPTXReg<"%v2b32_129">;
|
|
def v2b32_130 : NVPTXReg<"%v2b32_130">;
|
|
def v2b32_131 : NVPTXReg<"%v2b32_131">;
|
|
def v2b32_132 : NVPTXReg<"%v2b32_132">;
|
|
def v2b32_133 : NVPTXReg<"%v2b32_133">;
|
|
def v2b32_134 : NVPTXReg<"%v2b32_134">;
|
|
def v2b32_135 : NVPTXReg<"%v2b32_135">;
|
|
def v2b32_136 : NVPTXReg<"%v2b32_136">;
|
|
def v2b32_137 : NVPTXReg<"%v2b32_137">;
|
|
def v2b32_138 : NVPTXReg<"%v2b32_138">;
|
|
def v2b32_139 : NVPTXReg<"%v2b32_139">;
|
|
def v2b32_140 : NVPTXReg<"%v2b32_140">;
|
|
def v2b32_141 : NVPTXReg<"%v2b32_141">;
|
|
def v2b32_142 : NVPTXReg<"%v2b32_142">;
|
|
def v2b32_143 : NVPTXReg<"%v2b32_143">;
|
|
def v2b32_144 : NVPTXReg<"%v2b32_144">;
|
|
def v2b32_145 : NVPTXReg<"%v2b32_145">;
|
|
def v2b32_146 : NVPTXReg<"%v2b32_146">;
|
|
def v2b32_147 : NVPTXReg<"%v2b32_147">;
|
|
def v2b32_148 : NVPTXReg<"%v2b32_148">;
|
|
def v2b32_149 : NVPTXReg<"%v2b32_149">;
|
|
def v2b32_150 : NVPTXReg<"%v2b32_150">;
|
|
def v2b32_151 : NVPTXReg<"%v2b32_151">;
|
|
def v2b32_152 : NVPTXReg<"%v2b32_152">;
|
|
def v2b32_153 : NVPTXReg<"%v2b32_153">;
|
|
def v2b32_154 : NVPTXReg<"%v2b32_154">;
|
|
def v2b32_155 : NVPTXReg<"%v2b32_155">;
|
|
def v2b32_156 : NVPTXReg<"%v2b32_156">;
|
|
def v2b32_157 : NVPTXReg<"%v2b32_157">;
|
|
def v2b32_158 : NVPTXReg<"%v2b32_158">;
|
|
def v2b32_159 : NVPTXReg<"%v2b32_159">;
|
|
def v2b32_160 : NVPTXReg<"%v2b32_160">;
|
|
def v2b32_161 : NVPTXReg<"%v2b32_161">;
|
|
def v2b32_162 : NVPTXReg<"%v2b32_162">;
|
|
def v2b32_163 : NVPTXReg<"%v2b32_163">;
|
|
def v2b32_164 : NVPTXReg<"%v2b32_164">;
|
|
def v2b32_165 : NVPTXReg<"%v2b32_165">;
|
|
def v2b32_166 : NVPTXReg<"%v2b32_166">;
|
|
def v2b32_167 : NVPTXReg<"%v2b32_167">;
|
|
def v2b32_168 : NVPTXReg<"%v2b32_168">;
|
|
def v2b32_169 : NVPTXReg<"%v2b32_169">;
|
|
def v2b32_170 : NVPTXReg<"%v2b32_170">;
|
|
def v2b32_171 : NVPTXReg<"%v2b32_171">;
|
|
def v2b32_172 : NVPTXReg<"%v2b32_172">;
|
|
def v2b32_173 : NVPTXReg<"%v2b32_173">;
|
|
def v2b32_174 : NVPTXReg<"%v2b32_174">;
|
|
def v2b32_175 : NVPTXReg<"%v2b32_175">;
|
|
def v2b32_176 : NVPTXReg<"%v2b32_176">;
|
|
def v2b32_177 : NVPTXReg<"%v2b32_177">;
|
|
def v2b32_178 : NVPTXReg<"%v2b32_178">;
|
|
def v2b32_179 : NVPTXReg<"%v2b32_179">;
|
|
def v2b32_180 : NVPTXReg<"%v2b32_180">;
|
|
def v2b32_181 : NVPTXReg<"%v2b32_181">;
|
|
def v2b32_182 : NVPTXReg<"%v2b32_182">;
|
|
def v2b32_183 : NVPTXReg<"%v2b32_183">;
|
|
def v2b32_184 : NVPTXReg<"%v2b32_184">;
|
|
def v2b32_185 : NVPTXReg<"%v2b32_185">;
|
|
def v2b32_186 : NVPTXReg<"%v2b32_186">;
|
|
def v2b32_187 : NVPTXReg<"%v2b32_187">;
|
|
def v2b32_188 : NVPTXReg<"%v2b32_188">;
|
|
def v2b32_189 : NVPTXReg<"%v2b32_189">;
|
|
def v2b32_190 : NVPTXReg<"%v2b32_190">;
|
|
def v2b32_191 : NVPTXReg<"%v2b32_191">;
|
|
def v2b32_192 : NVPTXReg<"%v2b32_192">;
|
|
def v2b32_193 : NVPTXReg<"%v2b32_193">;
|
|
def v2b32_194 : NVPTXReg<"%v2b32_194">;
|
|
def v2b32_195 : NVPTXReg<"%v2b32_195">;
|
|
def v2b32_196 : NVPTXReg<"%v2b32_196">;
|
|
def v2b32_197 : NVPTXReg<"%v2b32_197">;
|
|
def v2b32_198 : NVPTXReg<"%v2b32_198">;
|
|
def v2b32_199 : NVPTXReg<"%v2b32_199">;
|
|
def v2b32_200 : NVPTXReg<"%v2b32_200">;
|
|
def v2b32_201 : NVPTXReg<"%v2b32_201">;
|
|
def v2b32_202 : NVPTXReg<"%v2b32_202">;
|
|
def v2b32_203 : NVPTXReg<"%v2b32_203">;
|
|
def v2b32_204 : NVPTXReg<"%v2b32_204">;
|
|
def v2b32_205 : NVPTXReg<"%v2b32_205">;
|
|
def v2b32_206 : NVPTXReg<"%v2b32_206">;
|
|
def v2b32_207 : NVPTXReg<"%v2b32_207">;
|
|
def v2b32_208 : NVPTXReg<"%v2b32_208">;
|
|
def v2b32_209 : NVPTXReg<"%v2b32_209">;
|
|
def v2b32_210 : NVPTXReg<"%v2b32_210">;
|
|
def v2b32_211 : NVPTXReg<"%v2b32_211">;
|
|
def v2b32_212 : NVPTXReg<"%v2b32_212">;
|
|
def v2b32_213 : NVPTXReg<"%v2b32_213">;
|
|
def v2b32_214 : NVPTXReg<"%v2b32_214">;
|
|
def v2b32_215 : NVPTXReg<"%v2b32_215">;
|
|
def v2b32_216 : NVPTXReg<"%v2b32_216">;
|
|
def v2b32_217 : NVPTXReg<"%v2b32_217">;
|
|
def v2b32_218 : NVPTXReg<"%v2b32_218">;
|
|
def v2b32_219 : NVPTXReg<"%v2b32_219">;
|
|
def v2b32_220 : NVPTXReg<"%v2b32_220">;
|
|
def v2b32_221 : NVPTXReg<"%v2b32_221">;
|
|
def v2b32_222 : NVPTXReg<"%v2b32_222">;
|
|
def v2b32_223 : NVPTXReg<"%v2b32_223">;
|
|
def v2b32_224 : NVPTXReg<"%v2b32_224">;
|
|
def v2b32_225 : NVPTXReg<"%v2b32_225">;
|
|
def v2b32_226 : NVPTXReg<"%v2b32_226">;
|
|
def v2b32_227 : NVPTXReg<"%v2b32_227">;
|
|
def v2b32_228 : NVPTXReg<"%v2b32_228">;
|
|
def v2b32_229 : NVPTXReg<"%v2b32_229">;
|
|
def v2b32_230 : NVPTXReg<"%v2b32_230">;
|
|
def v2b32_231 : NVPTXReg<"%v2b32_231">;
|
|
def v2b32_232 : NVPTXReg<"%v2b32_232">;
|
|
def v2b32_233 : NVPTXReg<"%v2b32_233">;
|
|
def v2b32_234 : NVPTXReg<"%v2b32_234">;
|
|
def v2b32_235 : NVPTXReg<"%v2b32_235">;
|
|
def v2b32_236 : NVPTXReg<"%v2b32_236">;
|
|
def v2b32_237 : NVPTXReg<"%v2b32_237">;
|
|
def v2b32_238 : NVPTXReg<"%v2b32_238">;
|
|
def v2b32_239 : NVPTXReg<"%v2b32_239">;
|
|
def v2b32_240 : NVPTXReg<"%v2b32_240">;
|
|
def v2b32_241 : NVPTXReg<"%v2b32_241">;
|
|
def v2b32_242 : NVPTXReg<"%v2b32_242">;
|
|
def v2b32_243 : NVPTXReg<"%v2b32_243">;
|
|
def v2b32_244 : NVPTXReg<"%v2b32_244">;
|
|
def v2b32_245 : NVPTXReg<"%v2b32_245">;
|
|
def v2b32_246 : NVPTXReg<"%v2b32_246">;
|
|
def v2b32_247 : NVPTXReg<"%v2b32_247">;
|
|
def v2b32_248 : NVPTXReg<"%v2b32_248">;
|
|
def v2b32_249 : NVPTXReg<"%v2b32_249">;
|
|
def v2b32_250 : NVPTXReg<"%v2b32_250">;
|
|
def v2b32_251 : NVPTXReg<"%v2b32_251">;
|
|
def v2b32_252 : NVPTXReg<"%v2b32_252">;
|
|
def v2b32_253 : NVPTXReg<"%v2b32_253">;
|
|
def v2b32_254 : NVPTXReg<"%v2b32_254">;
|
|
def v2b32_255 : NVPTXReg<"%v2b32_255">;
|
|
def v2b32_256 : NVPTXReg<"%v2b32_256">;
|
|
def v2b32_257 : NVPTXReg<"%v2b32_257">;
|
|
def v2b32_258 : NVPTXReg<"%v2b32_258">;
|
|
def v2b32_259 : NVPTXReg<"%v2b32_259">;
|
|
def v2b32_260 : NVPTXReg<"%v2b32_260">;
|
|
def v2b32_261 : NVPTXReg<"%v2b32_261">;
|
|
def v2b32_262 : NVPTXReg<"%v2b32_262">;
|
|
def v2b32_263 : NVPTXReg<"%v2b32_263">;
|
|
def v2b32_264 : NVPTXReg<"%v2b32_264">;
|
|
def v2b32_265 : NVPTXReg<"%v2b32_265">;
|
|
def v2b32_266 : NVPTXReg<"%v2b32_266">;
|
|
def v2b32_267 : NVPTXReg<"%v2b32_267">;
|
|
def v2b32_268 : NVPTXReg<"%v2b32_268">;
|
|
def v2b32_269 : NVPTXReg<"%v2b32_269">;
|
|
def v2b32_270 : NVPTXReg<"%v2b32_270">;
|
|
def v2b32_271 : NVPTXReg<"%v2b32_271">;
|
|
def v2b32_272 : NVPTXReg<"%v2b32_272">;
|
|
def v2b32_273 : NVPTXReg<"%v2b32_273">;
|
|
def v2b32_274 : NVPTXReg<"%v2b32_274">;
|
|
def v2b32_275 : NVPTXReg<"%v2b32_275">;
|
|
def v2b32_276 : NVPTXReg<"%v2b32_276">;
|
|
def v2b32_277 : NVPTXReg<"%v2b32_277">;
|
|
def v2b32_278 : NVPTXReg<"%v2b32_278">;
|
|
def v2b32_279 : NVPTXReg<"%v2b32_279">;
|
|
def v2b32_280 : NVPTXReg<"%v2b32_280">;
|
|
def v2b32_281 : NVPTXReg<"%v2b32_281">;
|
|
def v2b32_282 : NVPTXReg<"%v2b32_282">;
|
|
def v2b32_283 : NVPTXReg<"%v2b32_283">;
|
|
def v2b32_284 : NVPTXReg<"%v2b32_284">;
|
|
def v2b32_285 : NVPTXReg<"%v2b32_285">;
|
|
def v2b32_286 : NVPTXReg<"%v2b32_286">;
|
|
def v2b32_287 : NVPTXReg<"%v2b32_287">;
|
|
def v2b32_288 : NVPTXReg<"%v2b32_288">;
|
|
def v2b32_289 : NVPTXReg<"%v2b32_289">;
|
|
def v2b32_290 : NVPTXReg<"%v2b32_290">;
|
|
def v2b32_291 : NVPTXReg<"%v2b32_291">;
|
|
def v2b32_292 : NVPTXReg<"%v2b32_292">;
|
|
def v2b32_293 : NVPTXReg<"%v2b32_293">;
|
|
def v2b32_294 : NVPTXReg<"%v2b32_294">;
|
|
def v2b32_295 : NVPTXReg<"%v2b32_295">;
|
|
def v2b32_296 : NVPTXReg<"%v2b32_296">;
|
|
def v2b32_297 : NVPTXReg<"%v2b32_297">;
|
|
def v2b32_298 : NVPTXReg<"%v2b32_298">;
|
|
def v2b32_299 : NVPTXReg<"%v2b32_299">;
|
|
def v2b32_300 : NVPTXReg<"%v2b32_300">;
|
|
def v2b32_301 : NVPTXReg<"%v2b32_301">;
|
|
def v2b32_302 : NVPTXReg<"%v2b32_302">;
|
|
def v2b32_303 : NVPTXReg<"%v2b32_303">;
|
|
def v2b32_304 : NVPTXReg<"%v2b32_304">;
|
|
def v2b32_305 : NVPTXReg<"%v2b32_305">;
|
|
def v2b32_306 : NVPTXReg<"%v2b32_306">;
|
|
def v2b32_307 : NVPTXReg<"%v2b32_307">;
|
|
def v2b32_308 : NVPTXReg<"%v2b32_308">;
|
|
def v2b32_309 : NVPTXReg<"%v2b32_309">;
|
|
def v2b32_310 : NVPTXReg<"%v2b32_310">;
|
|
def v2b32_311 : NVPTXReg<"%v2b32_311">;
|
|
def v2b32_312 : NVPTXReg<"%v2b32_312">;
|
|
def v2b32_313 : NVPTXReg<"%v2b32_313">;
|
|
def v2b32_314 : NVPTXReg<"%v2b32_314">;
|
|
def v2b32_315 : NVPTXReg<"%v2b32_315">;
|
|
def v2b32_316 : NVPTXReg<"%v2b32_316">;
|
|
def v2b32_317 : NVPTXReg<"%v2b32_317">;
|
|
def v2b32_318 : NVPTXReg<"%v2b32_318">;
|
|
def v2b32_319 : NVPTXReg<"%v2b32_319">;
|
|
def v2b32_320 : NVPTXReg<"%v2b32_320">;
|
|
def v2b32_321 : NVPTXReg<"%v2b32_321">;
|
|
def v2b32_322 : NVPTXReg<"%v2b32_322">;
|
|
def v2b32_323 : NVPTXReg<"%v2b32_323">;
|
|
def v2b32_324 : NVPTXReg<"%v2b32_324">;
|
|
def v2b32_325 : NVPTXReg<"%v2b32_325">;
|
|
def v2b32_326 : NVPTXReg<"%v2b32_326">;
|
|
def v2b32_327 : NVPTXReg<"%v2b32_327">;
|
|
def v2b32_328 : NVPTXReg<"%v2b32_328">;
|
|
def v2b32_329 : NVPTXReg<"%v2b32_329">;
|
|
def v2b32_330 : NVPTXReg<"%v2b32_330">;
|
|
def v2b32_331 : NVPTXReg<"%v2b32_331">;
|
|
def v2b32_332 : NVPTXReg<"%v2b32_332">;
|
|
def v2b32_333 : NVPTXReg<"%v2b32_333">;
|
|
def v2b32_334 : NVPTXReg<"%v2b32_334">;
|
|
def v2b32_335 : NVPTXReg<"%v2b32_335">;
|
|
def v2b32_336 : NVPTXReg<"%v2b32_336">;
|
|
def v2b32_337 : NVPTXReg<"%v2b32_337">;
|
|
def v2b32_338 : NVPTXReg<"%v2b32_338">;
|
|
def v2b32_339 : NVPTXReg<"%v2b32_339">;
|
|
def v2b32_340 : NVPTXReg<"%v2b32_340">;
|
|
def v2b32_341 : NVPTXReg<"%v2b32_341">;
|
|
def v2b32_342 : NVPTXReg<"%v2b32_342">;
|
|
def v2b32_343 : NVPTXReg<"%v2b32_343">;
|
|
def v2b32_344 : NVPTXReg<"%v2b32_344">;
|
|
def v2b32_345 : NVPTXReg<"%v2b32_345">;
|
|
def v2b32_346 : NVPTXReg<"%v2b32_346">;
|
|
def v2b32_347 : NVPTXReg<"%v2b32_347">;
|
|
def v2b32_348 : NVPTXReg<"%v2b32_348">;
|
|
def v2b32_349 : NVPTXReg<"%v2b32_349">;
|
|
def v2b32_350 : NVPTXReg<"%v2b32_350">;
|
|
def v2b32_351 : NVPTXReg<"%v2b32_351">;
|
|
def v2b32_352 : NVPTXReg<"%v2b32_352">;
|
|
def v2b32_353 : NVPTXReg<"%v2b32_353">;
|
|
def v2b32_354 : NVPTXReg<"%v2b32_354">;
|
|
def v2b32_355 : NVPTXReg<"%v2b32_355">;
|
|
def v2b32_356 : NVPTXReg<"%v2b32_356">;
|
|
def v2b32_357 : NVPTXReg<"%v2b32_357">;
|
|
def v2b32_358 : NVPTXReg<"%v2b32_358">;
|
|
def v2b32_359 : NVPTXReg<"%v2b32_359">;
|
|
def v2b32_360 : NVPTXReg<"%v2b32_360">;
|
|
def v2b32_361 : NVPTXReg<"%v2b32_361">;
|
|
def v2b32_362 : NVPTXReg<"%v2b32_362">;
|
|
def v2b32_363 : NVPTXReg<"%v2b32_363">;
|
|
def v2b32_364 : NVPTXReg<"%v2b32_364">;
|
|
def v2b32_365 : NVPTXReg<"%v2b32_365">;
|
|
def v2b32_366 : NVPTXReg<"%v2b32_366">;
|
|
def v2b32_367 : NVPTXReg<"%v2b32_367">;
|
|
def v2b32_368 : NVPTXReg<"%v2b32_368">;
|
|
def v2b32_369 : NVPTXReg<"%v2b32_369">;
|
|
def v2b32_370 : NVPTXReg<"%v2b32_370">;
|
|
def v2b32_371 : NVPTXReg<"%v2b32_371">;
|
|
def v2b32_372 : NVPTXReg<"%v2b32_372">;
|
|
def v2b32_373 : NVPTXReg<"%v2b32_373">;
|
|
def v2b32_374 : NVPTXReg<"%v2b32_374">;
|
|
def v2b32_375 : NVPTXReg<"%v2b32_375">;
|
|
def v2b32_376 : NVPTXReg<"%v2b32_376">;
|
|
def v2b32_377 : NVPTXReg<"%v2b32_377">;
|
|
def v2b32_378 : NVPTXReg<"%v2b32_378">;
|
|
def v2b32_379 : NVPTXReg<"%v2b32_379">;
|
|
def v2b32_380 : NVPTXReg<"%v2b32_380">;
|
|
def v2b32_381 : NVPTXReg<"%v2b32_381">;
|
|
def v2b32_382 : NVPTXReg<"%v2b32_382">;
|
|
def v2b32_383 : NVPTXReg<"%v2b32_383">;
|
|
def v2b32_384 : NVPTXReg<"%v2b32_384">;
|
|
def v2b32_385 : NVPTXReg<"%v2b32_385">;
|
|
def v2b32_386 : NVPTXReg<"%v2b32_386">;
|
|
def v2b32_387 : NVPTXReg<"%v2b32_387">;
|
|
def v2b32_388 : NVPTXReg<"%v2b32_388">;
|
|
def v2b32_389 : NVPTXReg<"%v2b32_389">;
|
|
def v2b32_390 : NVPTXReg<"%v2b32_390">;
|
|
def v2b32_391 : NVPTXReg<"%v2b32_391">;
|
|
def v2b32_392 : NVPTXReg<"%v2b32_392">;
|
|
def v2b32_393 : NVPTXReg<"%v2b32_393">;
|
|
def v2b32_394 : NVPTXReg<"%v2b32_394">;
|
|
def v2b32_395 : NVPTXReg<"%v2b32_395">;
|
|
def v2b64_0 : NVPTXReg<"%v2b64_0">;
|
|
def v2b64_1 : NVPTXReg<"%v2b64_1">;
|
|
def v2b64_2 : NVPTXReg<"%v2b64_2">;
|
|
def v2b64_3 : NVPTXReg<"%v2b64_3">;
|
|
def v2b64_4 : NVPTXReg<"%v2b64_4">;
|
|
def v2b64_5 : NVPTXReg<"%v2b64_5">;
|
|
def v2b64_6 : NVPTXReg<"%v2b64_6">;
|
|
def v2b64_7 : NVPTXReg<"%v2b64_7">;
|
|
def v2b64_8 : NVPTXReg<"%v2b64_8">;
|
|
def v2b64_9 : NVPTXReg<"%v2b64_9">;
|
|
def v2b64_10 : NVPTXReg<"%v2b64_10">;
|
|
def v2b64_11 : NVPTXReg<"%v2b64_11">;
|
|
def v2b64_12 : NVPTXReg<"%v2b64_12">;
|
|
def v2b64_13 : NVPTXReg<"%v2b64_13">;
|
|
def v2b64_14 : NVPTXReg<"%v2b64_14">;
|
|
def v2b64_15 : NVPTXReg<"%v2b64_15">;
|
|
def v2b64_16 : NVPTXReg<"%v2b64_16">;
|
|
def v2b64_17 : NVPTXReg<"%v2b64_17">;
|
|
def v2b64_18 : NVPTXReg<"%v2b64_18">;
|
|
def v2b64_19 : NVPTXReg<"%v2b64_19">;
|
|
def v2b64_20 : NVPTXReg<"%v2b64_20">;
|
|
def v2b64_21 : NVPTXReg<"%v2b64_21">;
|
|
def v2b64_22 : NVPTXReg<"%v2b64_22">;
|
|
def v2b64_23 : NVPTXReg<"%v2b64_23">;
|
|
def v2b64_24 : NVPTXReg<"%v2b64_24">;
|
|
def v2b64_25 : NVPTXReg<"%v2b64_25">;
|
|
def v2b64_26 : NVPTXReg<"%v2b64_26">;
|
|
def v2b64_27 : NVPTXReg<"%v2b64_27">;
|
|
def v2b64_28 : NVPTXReg<"%v2b64_28">;
|
|
def v2b64_29 : NVPTXReg<"%v2b64_29">;
|
|
def v2b64_30 : NVPTXReg<"%v2b64_30">;
|
|
def v2b64_31 : NVPTXReg<"%v2b64_31">;
|
|
def v2b64_32 : NVPTXReg<"%v2b64_32">;
|
|
def v2b64_33 : NVPTXReg<"%v2b64_33">;
|
|
def v2b64_34 : NVPTXReg<"%v2b64_34">;
|
|
def v2b64_35 : NVPTXReg<"%v2b64_35">;
|
|
def v2b64_36 : NVPTXReg<"%v2b64_36">;
|
|
def v2b64_37 : NVPTXReg<"%v2b64_37">;
|
|
def v2b64_38 : NVPTXReg<"%v2b64_38">;
|
|
def v2b64_39 : NVPTXReg<"%v2b64_39">;
|
|
def v2b64_40 : NVPTXReg<"%v2b64_40">;
|
|
def v2b64_41 : NVPTXReg<"%v2b64_41">;
|
|
def v2b64_42 : NVPTXReg<"%v2b64_42">;
|
|
def v2b64_43 : NVPTXReg<"%v2b64_43">;
|
|
def v2b64_44 : NVPTXReg<"%v2b64_44">;
|
|
def v2b64_45 : NVPTXReg<"%v2b64_45">;
|
|
def v2b64_46 : NVPTXReg<"%v2b64_46">;
|
|
def v2b64_47 : NVPTXReg<"%v2b64_47">;
|
|
def v2b64_48 : NVPTXReg<"%v2b64_48">;
|
|
def v2b64_49 : NVPTXReg<"%v2b64_49">;
|
|
def v2b64_50 : NVPTXReg<"%v2b64_50">;
|
|
def v2b64_51 : NVPTXReg<"%v2b64_51">;
|
|
def v2b64_52 : NVPTXReg<"%v2b64_52">;
|
|
def v2b64_53 : NVPTXReg<"%v2b64_53">;
|
|
def v2b64_54 : NVPTXReg<"%v2b64_54">;
|
|
def v2b64_55 : NVPTXReg<"%v2b64_55">;
|
|
def v2b64_56 : NVPTXReg<"%v2b64_56">;
|
|
def v2b64_57 : NVPTXReg<"%v2b64_57">;
|
|
def v2b64_58 : NVPTXReg<"%v2b64_58">;
|
|
def v2b64_59 : NVPTXReg<"%v2b64_59">;
|
|
def v2b64_60 : NVPTXReg<"%v2b64_60">;
|
|
def v2b64_61 : NVPTXReg<"%v2b64_61">;
|
|
def v2b64_62 : NVPTXReg<"%v2b64_62">;
|
|
def v2b64_63 : NVPTXReg<"%v2b64_63">;
|
|
def v2b64_64 : NVPTXReg<"%v2b64_64">;
|
|
def v2b64_65 : NVPTXReg<"%v2b64_65">;
|
|
def v2b64_66 : NVPTXReg<"%v2b64_66">;
|
|
def v2b64_67 : NVPTXReg<"%v2b64_67">;
|
|
def v2b64_68 : NVPTXReg<"%v2b64_68">;
|
|
def v2b64_69 : NVPTXReg<"%v2b64_69">;
|
|
def v2b64_70 : NVPTXReg<"%v2b64_70">;
|
|
def v2b64_71 : NVPTXReg<"%v2b64_71">;
|
|
def v2b64_72 : NVPTXReg<"%v2b64_72">;
|
|
def v2b64_73 : NVPTXReg<"%v2b64_73">;
|
|
def v2b64_74 : NVPTXReg<"%v2b64_74">;
|
|
def v2b64_75 : NVPTXReg<"%v2b64_75">;
|
|
def v2b64_76 : NVPTXReg<"%v2b64_76">;
|
|
def v2b64_77 : NVPTXReg<"%v2b64_77">;
|
|
def v2b64_78 : NVPTXReg<"%v2b64_78">;
|
|
def v2b64_79 : NVPTXReg<"%v2b64_79">;
|
|
def v2b64_80 : NVPTXReg<"%v2b64_80">;
|
|
def v2b64_81 : NVPTXReg<"%v2b64_81">;
|
|
def v2b64_82 : NVPTXReg<"%v2b64_82">;
|
|
def v2b64_83 : NVPTXReg<"%v2b64_83">;
|
|
def v2b64_84 : NVPTXReg<"%v2b64_84">;
|
|
def v2b64_85 : NVPTXReg<"%v2b64_85">;
|
|
def v2b64_86 : NVPTXReg<"%v2b64_86">;
|
|
def v2b64_87 : NVPTXReg<"%v2b64_87">;
|
|
def v2b64_88 : NVPTXReg<"%v2b64_88">;
|
|
def v2b64_89 : NVPTXReg<"%v2b64_89">;
|
|
def v2b64_90 : NVPTXReg<"%v2b64_90">;
|
|
def v2b64_91 : NVPTXReg<"%v2b64_91">;
|
|
def v2b64_92 : NVPTXReg<"%v2b64_92">;
|
|
def v2b64_93 : NVPTXReg<"%v2b64_93">;
|
|
def v2b64_94 : NVPTXReg<"%v2b64_94">;
|
|
def v2b64_95 : NVPTXReg<"%v2b64_95">;
|
|
def v2b64_96 : NVPTXReg<"%v2b64_96">;
|
|
def v2b64_97 : NVPTXReg<"%v2b64_97">;
|
|
def v2b64_98 : NVPTXReg<"%v2b64_98">;
|
|
def v2b64_99 : NVPTXReg<"%v2b64_99">;
|
|
def v2b64_100 : NVPTXReg<"%v2b64_100">;
|
|
def v2b64_101 : NVPTXReg<"%v2b64_101">;
|
|
def v2b64_102 : NVPTXReg<"%v2b64_102">;
|
|
def v2b64_103 : NVPTXReg<"%v2b64_103">;
|
|
def v2b64_104 : NVPTXReg<"%v2b64_104">;
|
|
def v2b64_105 : NVPTXReg<"%v2b64_105">;
|
|
def v2b64_106 : NVPTXReg<"%v2b64_106">;
|
|
def v2b64_107 : NVPTXReg<"%v2b64_107">;
|
|
def v2b64_108 : NVPTXReg<"%v2b64_108">;
|
|
def v2b64_109 : NVPTXReg<"%v2b64_109">;
|
|
def v2b64_110 : NVPTXReg<"%v2b64_110">;
|
|
def v2b64_111 : NVPTXReg<"%v2b64_111">;
|
|
def v2b64_112 : NVPTXReg<"%v2b64_112">;
|
|
def v2b64_113 : NVPTXReg<"%v2b64_113">;
|
|
def v2b64_114 : NVPTXReg<"%v2b64_114">;
|
|
def v2b64_115 : NVPTXReg<"%v2b64_115">;
|
|
def v2b64_116 : NVPTXReg<"%v2b64_116">;
|
|
def v2b64_117 : NVPTXReg<"%v2b64_117">;
|
|
def v2b64_118 : NVPTXReg<"%v2b64_118">;
|
|
def v2b64_119 : NVPTXReg<"%v2b64_119">;
|
|
def v2b64_120 : NVPTXReg<"%v2b64_120">;
|
|
def v2b64_121 : NVPTXReg<"%v2b64_121">;
|
|
def v2b64_122 : NVPTXReg<"%v2b64_122">;
|
|
def v2b64_123 : NVPTXReg<"%v2b64_123">;
|
|
def v2b64_124 : NVPTXReg<"%v2b64_124">;
|
|
def v2b64_125 : NVPTXReg<"%v2b64_125">;
|
|
def v2b64_126 : NVPTXReg<"%v2b64_126">;
|
|
def v2b64_127 : NVPTXReg<"%v2b64_127">;
|
|
def v2b64_128 : NVPTXReg<"%v2b64_128">;
|
|
def v2b64_129 : NVPTXReg<"%v2b64_129">;
|
|
def v2b64_130 : NVPTXReg<"%v2b64_130">;
|
|
def v2b64_131 : NVPTXReg<"%v2b64_131">;
|
|
def v2b64_132 : NVPTXReg<"%v2b64_132">;
|
|
def v2b64_133 : NVPTXReg<"%v2b64_133">;
|
|
def v2b64_134 : NVPTXReg<"%v2b64_134">;
|
|
def v2b64_135 : NVPTXReg<"%v2b64_135">;
|
|
def v2b64_136 : NVPTXReg<"%v2b64_136">;
|
|
def v2b64_137 : NVPTXReg<"%v2b64_137">;
|
|
def v2b64_138 : NVPTXReg<"%v2b64_138">;
|
|
def v2b64_139 : NVPTXReg<"%v2b64_139">;
|
|
def v2b64_140 : NVPTXReg<"%v2b64_140">;
|
|
def v2b64_141 : NVPTXReg<"%v2b64_141">;
|
|
def v2b64_142 : NVPTXReg<"%v2b64_142">;
|
|
def v2b64_143 : NVPTXReg<"%v2b64_143">;
|
|
def v2b64_144 : NVPTXReg<"%v2b64_144">;
|
|
def v2b64_145 : NVPTXReg<"%v2b64_145">;
|
|
def v2b64_146 : NVPTXReg<"%v2b64_146">;
|
|
def v2b64_147 : NVPTXReg<"%v2b64_147">;
|
|
def v2b64_148 : NVPTXReg<"%v2b64_148">;
|
|
def v2b64_149 : NVPTXReg<"%v2b64_149">;
|
|
def v2b64_150 : NVPTXReg<"%v2b64_150">;
|
|
def v2b64_151 : NVPTXReg<"%v2b64_151">;
|
|
def v2b64_152 : NVPTXReg<"%v2b64_152">;
|
|
def v2b64_153 : NVPTXReg<"%v2b64_153">;
|
|
def v2b64_154 : NVPTXReg<"%v2b64_154">;
|
|
def v2b64_155 : NVPTXReg<"%v2b64_155">;
|
|
def v2b64_156 : NVPTXReg<"%v2b64_156">;
|
|
def v2b64_157 : NVPTXReg<"%v2b64_157">;
|
|
def v2b64_158 : NVPTXReg<"%v2b64_158">;
|
|
def v2b64_159 : NVPTXReg<"%v2b64_159">;
|
|
def v2b64_160 : NVPTXReg<"%v2b64_160">;
|
|
def v2b64_161 : NVPTXReg<"%v2b64_161">;
|
|
def v2b64_162 : NVPTXReg<"%v2b64_162">;
|
|
def v2b64_163 : NVPTXReg<"%v2b64_163">;
|
|
def v2b64_164 : NVPTXReg<"%v2b64_164">;
|
|
def v2b64_165 : NVPTXReg<"%v2b64_165">;
|
|
def v2b64_166 : NVPTXReg<"%v2b64_166">;
|
|
def v2b64_167 : NVPTXReg<"%v2b64_167">;
|
|
def v2b64_168 : NVPTXReg<"%v2b64_168">;
|
|
def v2b64_169 : NVPTXReg<"%v2b64_169">;
|
|
def v2b64_170 : NVPTXReg<"%v2b64_170">;
|
|
def v2b64_171 : NVPTXReg<"%v2b64_171">;
|
|
def v2b64_172 : NVPTXReg<"%v2b64_172">;
|
|
def v2b64_173 : NVPTXReg<"%v2b64_173">;
|
|
def v2b64_174 : NVPTXReg<"%v2b64_174">;
|
|
def v2b64_175 : NVPTXReg<"%v2b64_175">;
|
|
def v2b64_176 : NVPTXReg<"%v2b64_176">;
|
|
def v2b64_177 : NVPTXReg<"%v2b64_177">;
|
|
def v2b64_178 : NVPTXReg<"%v2b64_178">;
|
|
def v2b64_179 : NVPTXReg<"%v2b64_179">;
|
|
def v2b64_180 : NVPTXReg<"%v2b64_180">;
|
|
def v2b64_181 : NVPTXReg<"%v2b64_181">;
|
|
def v2b64_182 : NVPTXReg<"%v2b64_182">;
|
|
def v2b64_183 : NVPTXReg<"%v2b64_183">;
|
|
def v2b64_184 : NVPTXReg<"%v2b64_184">;
|
|
def v2b64_185 : NVPTXReg<"%v2b64_185">;
|
|
def v2b64_186 : NVPTXReg<"%v2b64_186">;
|
|
def v2b64_187 : NVPTXReg<"%v2b64_187">;
|
|
def v2b64_188 : NVPTXReg<"%v2b64_188">;
|
|
def v2b64_189 : NVPTXReg<"%v2b64_189">;
|
|
def v2b64_190 : NVPTXReg<"%v2b64_190">;
|
|
def v2b64_191 : NVPTXReg<"%v2b64_191">;
|
|
def v2b64_192 : NVPTXReg<"%v2b64_192">;
|
|
def v2b64_193 : NVPTXReg<"%v2b64_193">;
|
|
def v2b64_194 : NVPTXReg<"%v2b64_194">;
|
|
def v2b64_195 : NVPTXReg<"%v2b64_195">;
|
|
def v2b64_196 : NVPTXReg<"%v2b64_196">;
|
|
def v2b64_197 : NVPTXReg<"%v2b64_197">;
|
|
def v2b64_198 : NVPTXReg<"%v2b64_198">;
|
|
def v2b64_199 : NVPTXReg<"%v2b64_199">;
|
|
def v2b64_200 : NVPTXReg<"%v2b64_200">;
|
|
def v2b64_201 : NVPTXReg<"%v2b64_201">;
|
|
def v2b64_202 : NVPTXReg<"%v2b64_202">;
|
|
def v2b64_203 : NVPTXReg<"%v2b64_203">;
|
|
def v2b64_204 : NVPTXReg<"%v2b64_204">;
|
|
def v2b64_205 : NVPTXReg<"%v2b64_205">;
|
|
def v2b64_206 : NVPTXReg<"%v2b64_206">;
|
|
def v2b64_207 : NVPTXReg<"%v2b64_207">;
|
|
def v2b64_208 : NVPTXReg<"%v2b64_208">;
|
|
def v2b64_209 : NVPTXReg<"%v2b64_209">;
|
|
def v2b64_210 : NVPTXReg<"%v2b64_210">;
|
|
def v2b64_211 : NVPTXReg<"%v2b64_211">;
|
|
def v2b64_212 : NVPTXReg<"%v2b64_212">;
|
|
def v2b64_213 : NVPTXReg<"%v2b64_213">;
|
|
def v2b64_214 : NVPTXReg<"%v2b64_214">;
|
|
def v2b64_215 : NVPTXReg<"%v2b64_215">;
|
|
def v2b64_216 : NVPTXReg<"%v2b64_216">;
|
|
def v2b64_217 : NVPTXReg<"%v2b64_217">;
|
|
def v2b64_218 : NVPTXReg<"%v2b64_218">;
|
|
def v2b64_219 : NVPTXReg<"%v2b64_219">;
|
|
def v2b64_220 : NVPTXReg<"%v2b64_220">;
|
|
def v2b64_221 : NVPTXReg<"%v2b64_221">;
|
|
def v2b64_222 : NVPTXReg<"%v2b64_222">;
|
|
def v2b64_223 : NVPTXReg<"%v2b64_223">;
|
|
def v2b64_224 : NVPTXReg<"%v2b64_224">;
|
|
def v2b64_225 : NVPTXReg<"%v2b64_225">;
|
|
def v2b64_226 : NVPTXReg<"%v2b64_226">;
|
|
def v2b64_227 : NVPTXReg<"%v2b64_227">;
|
|
def v2b64_228 : NVPTXReg<"%v2b64_228">;
|
|
def v2b64_229 : NVPTXReg<"%v2b64_229">;
|
|
def v2b64_230 : NVPTXReg<"%v2b64_230">;
|
|
def v2b64_231 : NVPTXReg<"%v2b64_231">;
|
|
def v2b64_232 : NVPTXReg<"%v2b64_232">;
|
|
def v2b64_233 : NVPTXReg<"%v2b64_233">;
|
|
def v2b64_234 : NVPTXReg<"%v2b64_234">;
|
|
def v2b64_235 : NVPTXReg<"%v2b64_235">;
|
|
def v2b64_236 : NVPTXReg<"%v2b64_236">;
|
|
def v2b64_237 : NVPTXReg<"%v2b64_237">;
|
|
def v2b64_238 : NVPTXReg<"%v2b64_238">;
|
|
def v2b64_239 : NVPTXReg<"%v2b64_239">;
|
|
def v2b64_240 : NVPTXReg<"%v2b64_240">;
|
|
def v2b64_241 : NVPTXReg<"%v2b64_241">;
|
|
def v2b64_242 : NVPTXReg<"%v2b64_242">;
|
|
def v2b64_243 : NVPTXReg<"%v2b64_243">;
|
|
def v2b64_244 : NVPTXReg<"%v2b64_244">;
|
|
def v2b64_245 : NVPTXReg<"%v2b64_245">;
|
|
def v2b64_246 : NVPTXReg<"%v2b64_246">;
|
|
def v2b64_247 : NVPTXReg<"%v2b64_247">;
|
|
def v2b64_248 : NVPTXReg<"%v2b64_248">;
|
|
def v2b64_249 : NVPTXReg<"%v2b64_249">;
|
|
def v2b64_250 : NVPTXReg<"%v2b64_250">;
|
|
def v2b64_251 : NVPTXReg<"%v2b64_251">;
|
|
def v2b64_252 : NVPTXReg<"%v2b64_252">;
|
|
def v2b64_253 : NVPTXReg<"%v2b64_253">;
|
|
def v2b64_254 : NVPTXReg<"%v2b64_254">;
|
|
def v2b64_255 : NVPTXReg<"%v2b64_255">;
|
|
def v2b64_256 : NVPTXReg<"%v2b64_256">;
|
|
def v2b64_257 : NVPTXReg<"%v2b64_257">;
|
|
def v2b64_258 : NVPTXReg<"%v2b64_258">;
|
|
def v2b64_259 : NVPTXReg<"%v2b64_259">;
|
|
def v2b64_260 : NVPTXReg<"%v2b64_260">;
|
|
def v2b64_261 : NVPTXReg<"%v2b64_261">;
|
|
def v2b64_262 : NVPTXReg<"%v2b64_262">;
|
|
def v2b64_263 : NVPTXReg<"%v2b64_263">;
|
|
def v2b64_264 : NVPTXReg<"%v2b64_264">;
|
|
def v2b64_265 : NVPTXReg<"%v2b64_265">;
|
|
def v2b64_266 : NVPTXReg<"%v2b64_266">;
|
|
def v2b64_267 : NVPTXReg<"%v2b64_267">;
|
|
def v2b64_268 : NVPTXReg<"%v2b64_268">;
|
|
def v2b64_269 : NVPTXReg<"%v2b64_269">;
|
|
def v2b64_270 : NVPTXReg<"%v2b64_270">;
|
|
def v2b64_271 : NVPTXReg<"%v2b64_271">;
|
|
def v2b64_272 : NVPTXReg<"%v2b64_272">;
|
|
def v2b64_273 : NVPTXReg<"%v2b64_273">;
|
|
def v2b64_274 : NVPTXReg<"%v2b64_274">;
|
|
def v2b64_275 : NVPTXReg<"%v2b64_275">;
|
|
def v2b64_276 : NVPTXReg<"%v2b64_276">;
|
|
def v2b64_277 : NVPTXReg<"%v2b64_277">;
|
|
def v2b64_278 : NVPTXReg<"%v2b64_278">;
|
|
def v2b64_279 : NVPTXReg<"%v2b64_279">;
|
|
def v2b64_280 : NVPTXReg<"%v2b64_280">;
|
|
def v2b64_281 : NVPTXReg<"%v2b64_281">;
|
|
def v2b64_282 : NVPTXReg<"%v2b64_282">;
|
|
def v2b64_283 : NVPTXReg<"%v2b64_283">;
|
|
def v2b64_284 : NVPTXReg<"%v2b64_284">;
|
|
def v2b64_285 : NVPTXReg<"%v2b64_285">;
|
|
def v2b64_286 : NVPTXReg<"%v2b64_286">;
|
|
def v2b64_287 : NVPTXReg<"%v2b64_287">;
|
|
def v2b64_288 : NVPTXReg<"%v2b64_288">;
|
|
def v2b64_289 : NVPTXReg<"%v2b64_289">;
|
|
def v2b64_290 : NVPTXReg<"%v2b64_290">;
|
|
def v2b64_291 : NVPTXReg<"%v2b64_291">;
|
|
def v2b64_292 : NVPTXReg<"%v2b64_292">;
|
|
def v2b64_293 : NVPTXReg<"%v2b64_293">;
|
|
def v2b64_294 : NVPTXReg<"%v2b64_294">;
|
|
def v2b64_295 : NVPTXReg<"%v2b64_295">;
|
|
def v2b64_296 : NVPTXReg<"%v2b64_296">;
|
|
def v2b64_297 : NVPTXReg<"%v2b64_297">;
|
|
def v2b64_298 : NVPTXReg<"%v2b64_298">;
|
|
def v2b64_299 : NVPTXReg<"%v2b64_299">;
|
|
def v2b64_300 : NVPTXReg<"%v2b64_300">;
|
|
def v2b64_301 : NVPTXReg<"%v2b64_301">;
|
|
def v2b64_302 : NVPTXReg<"%v2b64_302">;
|
|
def v2b64_303 : NVPTXReg<"%v2b64_303">;
|
|
def v2b64_304 : NVPTXReg<"%v2b64_304">;
|
|
def v2b64_305 : NVPTXReg<"%v2b64_305">;
|
|
def v2b64_306 : NVPTXReg<"%v2b64_306">;
|
|
def v2b64_307 : NVPTXReg<"%v2b64_307">;
|
|
def v2b64_308 : NVPTXReg<"%v2b64_308">;
|
|
def v2b64_309 : NVPTXReg<"%v2b64_309">;
|
|
def v2b64_310 : NVPTXReg<"%v2b64_310">;
|
|
def v2b64_311 : NVPTXReg<"%v2b64_311">;
|
|
def v2b64_312 : NVPTXReg<"%v2b64_312">;
|
|
def v2b64_313 : NVPTXReg<"%v2b64_313">;
|
|
def v2b64_314 : NVPTXReg<"%v2b64_314">;
|
|
def v2b64_315 : NVPTXReg<"%v2b64_315">;
|
|
def v2b64_316 : NVPTXReg<"%v2b64_316">;
|
|
def v2b64_317 : NVPTXReg<"%v2b64_317">;
|
|
def v2b64_318 : NVPTXReg<"%v2b64_318">;
|
|
def v2b64_319 : NVPTXReg<"%v2b64_319">;
|
|
def v2b64_320 : NVPTXReg<"%v2b64_320">;
|
|
def v2b64_321 : NVPTXReg<"%v2b64_321">;
|
|
def v2b64_322 : NVPTXReg<"%v2b64_322">;
|
|
def v2b64_323 : NVPTXReg<"%v2b64_323">;
|
|
def v2b64_324 : NVPTXReg<"%v2b64_324">;
|
|
def v2b64_325 : NVPTXReg<"%v2b64_325">;
|
|
def v2b64_326 : NVPTXReg<"%v2b64_326">;
|
|
def v2b64_327 : NVPTXReg<"%v2b64_327">;
|
|
def v2b64_328 : NVPTXReg<"%v2b64_328">;
|
|
def v2b64_329 : NVPTXReg<"%v2b64_329">;
|
|
def v2b64_330 : NVPTXReg<"%v2b64_330">;
|
|
def v2b64_331 : NVPTXReg<"%v2b64_331">;
|
|
def v2b64_332 : NVPTXReg<"%v2b64_332">;
|
|
def v2b64_333 : NVPTXReg<"%v2b64_333">;
|
|
def v2b64_334 : NVPTXReg<"%v2b64_334">;
|
|
def v2b64_335 : NVPTXReg<"%v2b64_335">;
|
|
def v2b64_336 : NVPTXReg<"%v2b64_336">;
|
|
def v2b64_337 : NVPTXReg<"%v2b64_337">;
|
|
def v2b64_338 : NVPTXReg<"%v2b64_338">;
|
|
def v2b64_339 : NVPTXReg<"%v2b64_339">;
|
|
def v2b64_340 : NVPTXReg<"%v2b64_340">;
|
|
def v2b64_341 : NVPTXReg<"%v2b64_341">;
|
|
def v2b64_342 : NVPTXReg<"%v2b64_342">;
|
|
def v2b64_343 : NVPTXReg<"%v2b64_343">;
|
|
def v2b64_344 : NVPTXReg<"%v2b64_344">;
|
|
def v2b64_345 : NVPTXReg<"%v2b64_345">;
|
|
def v2b64_346 : NVPTXReg<"%v2b64_346">;
|
|
def v2b64_347 : NVPTXReg<"%v2b64_347">;
|
|
def v2b64_348 : NVPTXReg<"%v2b64_348">;
|
|
def v2b64_349 : NVPTXReg<"%v2b64_349">;
|
|
def v2b64_350 : NVPTXReg<"%v2b64_350">;
|
|
def v2b64_351 : NVPTXReg<"%v2b64_351">;
|
|
def v2b64_352 : NVPTXReg<"%v2b64_352">;
|
|
def v2b64_353 : NVPTXReg<"%v2b64_353">;
|
|
def v2b64_354 : NVPTXReg<"%v2b64_354">;
|
|
def v2b64_355 : NVPTXReg<"%v2b64_355">;
|
|
def v2b64_356 : NVPTXReg<"%v2b64_356">;
|
|
def v2b64_357 : NVPTXReg<"%v2b64_357">;
|
|
def v2b64_358 : NVPTXReg<"%v2b64_358">;
|
|
def v2b64_359 : NVPTXReg<"%v2b64_359">;
|
|
def v2b64_360 : NVPTXReg<"%v2b64_360">;
|
|
def v2b64_361 : NVPTXReg<"%v2b64_361">;
|
|
def v2b64_362 : NVPTXReg<"%v2b64_362">;
|
|
def v2b64_363 : NVPTXReg<"%v2b64_363">;
|
|
def v2b64_364 : NVPTXReg<"%v2b64_364">;
|
|
def v2b64_365 : NVPTXReg<"%v2b64_365">;
|
|
def v2b64_366 : NVPTXReg<"%v2b64_366">;
|
|
def v2b64_367 : NVPTXReg<"%v2b64_367">;
|
|
def v2b64_368 : NVPTXReg<"%v2b64_368">;
|
|
def v2b64_369 : NVPTXReg<"%v2b64_369">;
|
|
def v2b64_370 : NVPTXReg<"%v2b64_370">;
|
|
def v2b64_371 : NVPTXReg<"%v2b64_371">;
|
|
def v2b64_372 : NVPTXReg<"%v2b64_372">;
|
|
def v2b64_373 : NVPTXReg<"%v2b64_373">;
|
|
def v2b64_374 : NVPTXReg<"%v2b64_374">;
|
|
def v2b64_375 : NVPTXReg<"%v2b64_375">;
|
|
def v2b64_376 : NVPTXReg<"%v2b64_376">;
|
|
def v2b64_377 : NVPTXReg<"%v2b64_377">;
|
|
def v2b64_378 : NVPTXReg<"%v2b64_378">;
|
|
def v2b64_379 : NVPTXReg<"%v2b64_379">;
|
|
def v2b64_380 : NVPTXReg<"%v2b64_380">;
|
|
def v2b64_381 : NVPTXReg<"%v2b64_381">;
|
|
def v2b64_382 : NVPTXReg<"%v2b64_382">;
|
|
def v2b64_383 : NVPTXReg<"%v2b64_383">;
|
|
def v2b64_384 : NVPTXReg<"%v2b64_384">;
|
|
def v2b64_385 : NVPTXReg<"%v2b64_385">;
|
|
def v2b64_386 : NVPTXReg<"%v2b64_386">;
|
|
def v2b64_387 : NVPTXReg<"%v2b64_387">;
|
|
def v2b64_388 : NVPTXReg<"%v2b64_388">;
|
|
def v2b64_389 : NVPTXReg<"%v2b64_389">;
|
|
def v2b64_390 : NVPTXReg<"%v2b64_390">;
|
|
def v2b64_391 : NVPTXReg<"%v2b64_391">;
|
|
def v2b64_392 : NVPTXReg<"%v2b64_392">;
|
|
def v2b64_393 : NVPTXReg<"%v2b64_393">;
|
|
def v2b64_394 : NVPTXReg<"%v2b64_394">;
|
|
def v2b64_395 : NVPTXReg<"%v2b64_395">;
|
|
def v4b8_0 : NVPTXReg<"%v4b8_0">;
|
|
def v4b8_1 : NVPTXReg<"%v4b8_1">;
|
|
def v4b8_2 : NVPTXReg<"%v4b8_2">;
|
|
def v4b8_3 : NVPTXReg<"%v4b8_3">;
|
|
def v4b8_4 : NVPTXReg<"%v4b8_4">;
|
|
def v4b8_5 : NVPTXReg<"%v4b8_5">;
|
|
def v4b8_6 : NVPTXReg<"%v4b8_6">;
|
|
def v4b8_7 : NVPTXReg<"%v4b8_7">;
|
|
def v4b8_8 : NVPTXReg<"%v4b8_8">;
|
|
def v4b8_9 : NVPTXReg<"%v4b8_9">;
|
|
def v4b8_10 : NVPTXReg<"%v4b8_10">;
|
|
def v4b8_11 : NVPTXReg<"%v4b8_11">;
|
|
def v4b8_12 : NVPTXReg<"%v4b8_12">;
|
|
def v4b8_13 : NVPTXReg<"%v4b8_13">;
|
|
def v4b8_14 : NVPTXReg<"%v4b8_14">;
|
|
def v4b8_15 : NVPTXReg<"%v4b8_15">;
|
|
def v4b8_16 : NVPTXReg<"%v4b8_16">;
|
|
def v4b8_17 : NVPTXReg<"%v4b8_17">;
|
|
def v4b8_18 : NVPTXReg<"%v4b8_18">;
|
|
def v4b8_19 : NVPTXReg<"%v4b8_19">;
|
|
def v4b8_20 : NVPTXReg<"%v4b8_20">;
|
|
def v4b8_21 : NVPTXReg<"%v4b8_21">;
|
|
def v4b8_22 : NVPTXReg<"%v4b8_22">;
|
|
def v4b8_23 : NVPTXReg<"%v4b8_23">;
|
|
def v4b8_24 : NVPTXReg<"%v4b8_24">;
|
|
def v4b8_25 : NVPTXReg<"%v4b8_25">;
|
|
def v4b8_26 : NVPTXReg<"%v4b8_26">;
|
|
def v4b8_27 : NVPTXReg<"%v4b8_27">;
|
|
def v4b8_28 : NVPTXReg<"%v4b8_28">;
|
|
def v4b8_29 : NVPTXReg<"%v4b8_29">;
|
|
def v4b8_30 : NVPTXReg<"%v4b8_30">;
|
|
def v4b8_31 : NVPTXReg<"%v4b8_31">;
|
|
def v4b8_32 : NVPTXReg<"%v4b8_32">;
|
|
def v4b8_33 : NVPTXReg<"%v4b8_33">;
|
|
def v4b8_34 : NVPTXReg<"%v4b8_34">;
|
|
def v4b8_35 : NVPTXReg<"%v4b8_35">;
|
|
def v4b8_36 : NVPTXReg<"%v4b8_36">;
|
|
def v4b8_37 : NVPTXReg<"%v4b8_37">;
|
|
def v4b8_38 : NVPTXReg<"%v4b8_38">;
|
|
def v4b8_39 : NVPTXReg<"%v4b8_39">;
|
|
def v4b8_40 : NVPTXReg<"%v4b8_40">;
|
|
def v4b8_41 : NVPTXReg<"%v4b8_41">;
|
|
def v4b8_42 : NVPTXReg<"%v4b8_42">;
|
|
def v4b8_43 : NVPTXReg<"%v4b8_43">;
|
|
def v4b8_44 : NVPTXReg<"%v4b8_44">;
|
|
def v4b8_45 : NVPTXReg<"%v4b8_45">;
|
|
def v4b8_46 : NVPTXReg<"%v4b8_46">;
|
|
def v4b8_47 : NVPTXReg<"%v4b8_47">;
|
|
def v4b8_48 : NVPTXReg<"%v4b8_48">;
|
|
def v4b8_49 : NVPTXReg<"%v4b8_49">;
|
|
def v4b8_50 : NVPTXReg<"%v4b8_50">;
|
|
def v4b8_51 : NVPTXReg<"%v4b8_51">;
|
|
def v4b8_52 : NVPTXReg<"%v4b8_52">;
|
|
def v4b8_53 : NVPTXReg<"%v4b8_53">;
|
|
def v4b8_54 : NVPTXReg<"%v4b8_54">;
|
|
def v4b8_55 : NVPTXReg<"%v4b8_55">;
|
|
def v4b8_56 : NVPTXReg<"%v4b8_56">;
|
|
def v4b8_57 : NVPTXReg<"%v4b8_57">;
|
|
def v4b8_58 : NVPTXReg<"%v4b8_58">;
|
|
def v4b8_59 : NVPTXReg<"%v4b8_59">;
|
|
def v4b8_60 : NVPTXReg<"%v4b8_60">;
|
|
def v4b8_61 : NVPTXReg<"%v4b8_61">;
|
|
def v4b8_62 : NVPTXReg<"%v4b8_62">;
|
|
def v4b8_63 : NVPTXReg<"%v4b8_63">;
|
|
def v4b8_64 : NVPTXReg<"%v4b8_64">;
|
|
def v4b8_65 : NVPTXReg<"%v4b8_65">;
|
|
def v4b8_66 : NVPTXReg<"%v4b8_66">;
|
|
def v4b8_67 : NVPTXReg<"%v4b8_67">;
|
|
def v4b8_68 : NVPTXReg<"%v4b8_68">;
|
|
def v4b8_69 : NVPTXReg<"%v4b8_69">;
|
|
def v4b8_70 : NVPTXReg<"%v4b8_70">;
|
|
def v4b8_71 : NVPTXReg<"%v4b8_71">;
|
|
def v4b8_72 : NVPTXReg<"%v4b8_72">;
|
|
def v4b8_73 : NVPTXReg<"%v4b8_73">;
|
|
def v4b8_74 : NVPTXReg<"%v4b8_74">;
|
|
def v4b8_75 : NVPTXReg<"%v4b8_75">;
|
|
def v4b8_76 : NVPTXReg<"%v4b8_76">;
|
|
def v4b8_77 : NVPTXReg<"%v4b8_77">;
|
|
def v4b8_78 : NVPTXReg<"%v4b8_78">;
|
|
def v4b8_79 : NVPTXReg<"%v4b8_79">;
|
|
def v4b8_80 : NVPTXReg<"%v4b8_80">;
|
|
def v4b8_81 : NVPTXReg<"%v4b8_81">;
|
|
def v4b8_82 : NVPTXReg<"%v4b8_82">;
|
|
def v4b8_83 : NVPTXReg<"%v4b8_83">;
|
|
def v4b8_84 : NVPTXReg<"%v4b8_84">;
|
|
def v4b8_85 : NVPTXReg<"%v4b8_85">;
|
|
def v4b8_86 : NVPTXReg<"%v4b8_86">;
|
|
def v4b8_87 : NVPTXReg<"%v4b8_87">;
|
|
def v4b8_88 : NVPTXReg<"%v4b8_88">;
|
|
def v4b8_89 : NVPTXReg<"%v4b8_89">;
|
|
def v4b8_90 : NVPTXReg<"%v4b8_90">;
|
|
def v4b8_91 : NVPTXReg<"%v4b8_91">;
|
|
def v4b8_92 : NVPTXReg<"%v4b8_92">;
|
|
def v4b8_93 : NVPTXReg<"%v4b8_93">;
|
|
def v4b8_94 : NVPTXReg<"%v4b8_94">;
|
|
def v4b8_95 : NVPTXReg<"%v4b8_95">;
|
|
def v4b8_96 : NVPTXReg<"%v4b8_96">;
|
|
def v4b8_97 : NVPTXReg<"%v4b8_97">;
|
|
def v4b8_98 : NVPTXReg<"%v4b8_98">;
|
|
def v4b8_99 : NVPTXReg<"%v4b8_99">;
|
|
def v4b8_100 : NVPTXReg<"%v4b8_100">;
|
|
def v4b8_101 : NVPTXReg<"%v4b8_101">;
|
|
def v4b8_102 : NVPTXReg<"%v4b8_102">;
|
|
def v4b8_103 : NVPTXReg<"%v4b8_103">;
|
|
def v4b8_104 : NVPTXReg<"%v4b8_104">;
|
|
def v4b8_105 : NVPTXReg<"%v4b8_105">;
|
|
def v4b8_106 : NVPTXReg<"%v4b8_106">;
|
|
def v4b8_107 : NVPTXReg<"%v4b8_107">;
|
|
def v4b8_108 : NVPTXReg<"%v4b8_108">;
|
|
def v4b8_109 : NVPTXReg<"%v4b8_109">;
|
|
def v4b8_110 : NVPTXReg<"%v4b8_110">;
|
|
def v4b8_111 : NVPTXReg<"%v4b8_111">;
|
|
def v4b8_112 : NVPTXReg<"%v4b8_112">;
|
|
def v4b8_113 : NVPTXReg<"%v4b8_113">;
|
|
def v4b8_114 : NVPTXReg<"%v4b8_114">;
|
|
def v4b8_115 : NVPTXReg<"%v4b8_115">;
|
|
def v4b8_116 : NVPTXReg<"%v4b8_116">;
|
|
def v4b8_117 : NVPTXReg<"%v4b8_117">;
|
|
def v4b8_118 : NVPTXReg<"%v4b8_118">;
|
|
def v4b8_119 : NVPTXReg<"%v4b8_119">;
|
|
def v4b8_120 : NVPTXReg<"%v4b8_120">;
|
|
def v4b8_121 : NVPTXReg<"%v4b8_121">;
|
|
def v4b8_122 : NVPTXReg<"%v4b8_122">;
|
|
def v4b8_123 : NVPTXReg<"%v4b8_123">;
|
|
def v4b8_124 : NVPTXReg<"%v4b8_124">;
|
|
def v4b8_125 : NVPTXReg<"%v4b8_125">;
|
|
def v4b8_126 : NVPTXReg<"%v4b8_126">;
|
|
def v4b8_127 : NVPTXReg<"%v4b8_127">;
|
|
def v4b8_128 : NVPTXReg<"%v4b8_128">;
|
|
def v4b8_129 : NVPTXReg<"%v4b8_129">;
|
|
def v4b8_130 : NVPTXReg<"%v4b8_130">;
|
|
def v4b8_131 : NVPTXReg<"%v4b8_131">;
|
|
def v4b8_132 : NVPTXReg<"%v4b8_132">;
|
|
def v4b8_133 : NVPTXReg<"%v4b8_133">;
|
|
def v4b8_134 : NVPTXReg<"%v4b8_134">;
|
|
def v4b8_135 : NVPTXReg<"%v4b8_135">;
|
|
def v4b8_136 : NVPTXReg<"%v4b8_136">;
|
|
def v4b8_137 : NVPTXReg<"%v4b8_137">;
|
|
def v4b8_138 : NVPTXReg<"%v4b8_138">;
|
|
def v4b8_139 : NVPTXReg<"%v4b8_139">;
|
|
def v4b8_140 : NVPTXReg<"%v4b8_140">;
|
|
def v4b8_141 : NVPTXReg<"%v4b8_141">;
|
|
def v4b8_142 : NVPTXReg<"%v4b8_142">;
|
|
def v4b8_143 : NVPTXReg<"%v4b8_143">;
|
|
def v4b8_144 : NVPTXReg<"%v4b8_144">;
|
|
def v4b8_145 : NVPTXReg<"%v4b8_145">;
|
|
def v4b8_146 : NVPTXReg<"%v4b8_146">;
|
|
def v4b8_147 : NVPTXReg<"%v4b8_147">;
|
|
def v4b8_148 : NVPTXReg<"%v4b8_148">;
|
|
def v4b8_149 : NVPTXReg<"%v4b8_149">;
|
|
def v4b8_150 : NVPTXReg<"%v4b8_150">;
|
|
def v4b8_151 : NVPTXReg<"%v4b8_151">;
|
|
def v4b8_152 : NVPTXReg<"%v4b8_152">;
|
|
def v4b8_153 : NVPTXReg<"%v4b8_153">;
|
|
def v4b8_154 : NVPTXReg<"%v4b8_154">;
|
|
def v4b8_155 : NVPTXReg<"%v4b8_155">;
|
|
def v4b8_156 : NVPTXReg<"%v4b8_156">;
|
|
def v4b8_157 : NVPTXReg<"%v4b8_157">;
|
|
def v4b8_158 : NVPTXReg<"%v4b8_158">;
|
|
def v4b8_159 : NVPTXReg<"%v4b8_159">;
|
|
def v4b8_160 : NVPTXReg<"%v4b8_160">;
|
|
def v4b8_161 : NVPTXReg<"%v4b8_161">;
|
|
def v4b8_162 : NVPTXReg<"%v4b8_162">;
|
|
def v4b8_163 : NVPTXReg<"%v4b8_163">;
|
|
def v4b8_164 : NVPTXReg<"%v4b8_164">;
|
|
def v4b8_165 : NVPTXReg<"%v4b8_165">;
|
|
def v4b8_166 : NVPTXReg<"%v4b8_166">;
|
|
def v4b8_167 : NVPTXReg<"%v4b8_167">;
|
|
def v4b8_168 : NVPTXReg<"%v4b8_168">;
|
|
def v4b8_169 : NVPTXReg<"%v4b8_169">;
|
|
def v4b8_170 : NVPTXReg<"%v4b8_170">;
|
|
def v4b8_171 : NVPTXReg<"%v4b8_171">;
|
|
def v4b8_172 : NVPTXReg<"%v4b8_172">;
|
|
def v4b8_173 : NVPTXReg<"%v4b8_173">;
|
|
def v4b8_174 : NVPTXReg<"%v4b8_174">;
|
|
def v4b8_175 : NVPTXReg<"%v4b8_175">;
|
|
def v4b8_176 : NVPTXReg<"%v4b8_176">;
|
|
def v4b8_177 : NVPTXReg<"%v4b8_177">;
|
|
def v4b8_178 : NVPTXReg<"%v4b8_178">;
|
|
def v4b8_179 : NVPTXReg<"%v4b8_179">;
|
|
def v4b8_180 : NVPTXReg<"%v4b8_180">;
|
|
def v4b8_181 : NVPTXReg<"%v4b8_181">;
|
|
def v4b8_182 : NVPTXReg<"%v4b8_182">;
|
|
def v4b8_183 : NVPTXReg<"%v4b8_183">;
|
|
def v4b8_184 : NVPTXReg<"%v4b8_184">;
|
|
def v4b8_185 : NVPTXReg<"%v4b8_185">;
|
|
def v4b8_186 : NVPTXReg<"%v4b8_186">;
|
|
def v4b8_187 : NVPTXReg<"%v4b8_187">;
|
|
def v4b8_188 : NVPTXReg<"%v4b8_188">;
|
|
def v4b8_189 : NVPTXReg<"%v4b8_189">;
|
|
def v4b8_190 : NVPTXReg<"%v4b8_190">;
|
|
def v4b8_191 : NVPTXReg<"%v4b8_191">;
|
|
def v4b8_192 : NVPTXReg<"%v4b8_192">;
|
|
def v4b8_193 : NVPTXReg<"%v4b8_193">;
|
|
def v4b8_194 : NVPTXReg<"%v4b8_194">;
|
|
def v4b8_195 : NVPTXReg<"%v4b8_195">;
|
|
def v4b8_196 : NVPTXReg<"%v4b8_196">;
|
|
def v4b8_197 : NVPTXReg<"%v4b8_197">;
|
|
def v4b8_198 : NVPTXReg<"%v4b8_198">;
|
|
def v4b8_199 : NVPTXReg<"%v4b8_199">;
|
|
def v4b8_200 : NVPTXReg<"%v4b8_200">;
|
|
def v4b8_201 : NVPTXReg<"%v4b8_201">;
|
|
def v4b8_202 : NVPTXReg<"%v4b8_202">;
|
|
def v4b8_203 : NVPTXReg<"%v4b8_203">;
|
|
def v4b8_204 : NVPTXReg<"%v4b8_204">;
|
|
def v4b8_205 : NVPTXReg<"%v4b8_205">;
|
|
def v4b8_206 : NVPTXReg<"%v4b8_206">;
|
|
def v4b8_207 : NVPTXReg<"%v4b8_207">;
|
|
def v4b8_208 : NVPTXReg<"%v4b8_208">;
|
|
def v4b8_209 : NVPTXReg<"%v4b8_209">;
|
|
def v4b8_210 : NVPTXReg<"%v4b8_210">;
|
|
def v4b8_211 : NVPTXReg<"%v4b8_211">;
|
|
def v4b8_212 : NVPTXReg<"%v4b8_212">;
|
|
def v4b8_213 : NVPTXReg<"%v4b8_213">;
|
|
def v4b8_214 : NVPTXReg<"%v4b8_214">;
|
|
def v4b8_215 : NVPTXReg<"%v4b8_215">;
|
|
def v4b8_216 : NVPTXReg<"%v4b8_216">;
|
|
def v4b8_217 : NVPTXReg<"%v4b8_217">;
|
|
def v4b8_218 : NVPTXReg<"%v4b8_218">;
|
|
def v4b8_219 : NVPTXReg<"%v4b8_219">;
|
|
def v4b8_220 : NVPTXReg<"%v4b8_220">;
|
|
def v4b8_221 : NVPTXReg<"%v4b8_221">;
|
|
def v4b8_222 : NVPTXReg<"%v4b8_222">;
|
|
def v4b8_223 : NVPTXReg<"%v4b8_223">;
|
|
def v4b8_224 : NVPTXReg<"%v4b8_224">;
|
|
def v4b8_225 : NVPTXReg<"%v4b8_225">;
|
|
def v4b8_226 : NVPTXReg<"%v4b8_226">;
|
|
def v4b8_227 : NVPTXReg<"%v4b8_227">;
|
|
def v4b8_228 : NVPTXReg<"%v4b8_228">;
|
|
def v4b8_229 : NVPTXReg<"%v4b8_229">;
|
|
def v4b8_230 : NVPTXReg<"%v4b8_230">;
|
|
def v4b8_231 : NVPTXReg<"%v4b8_231">;
|
|
def v4b8_232 : NVPTXReg<"%v4b8_232">;
|
|
def v4b8_233 : NVPTXReg<"%v4b8_233">;
|
|
def v4b8_234 : NVPTXReg<"%v4b8_234">;
|
|
def v4b8_235 : NVPTXReg<"%v4b8_235">;
|
|
def v4b8_236 : NVPTXReg<"%v4b8_236">;
|
|
def v4b8_237 : NVPTXReg<"%v4b8_237">;
|
|
def v4b8_238 : NVPTXReg<"%v4b8_238">;
|
|
def v4b8_239 : NVPTXReg<"%v4b8_239">;
|
|
def v4b8_240 : NVPTXReg<"%v4b8_240">;
|
|
def v4b8_241 : NVPTXReg<"%v4b8_241">;
|
|
def v4b8_242 : NVPTXReg<"%v4b8_242">;
|
|
def v4b8_243 : NVPTXReg<"%v4b8_243">;
|
|
def v4b8_244 : NVPTXReg<"%v4b8_244">;
|
|
def v4b8_245 : NVPTXReg<"%v4b8_245">;
|
|
def v4b8_246 : NVPTXReg<"%v4b8_246">;
|
|
def v4b8_247 : NVPTXReg<"%v4b8_247">;
|
|
def v4b8_248 : NVPTXReg<"%v4b8_248">;
|
|
def v4b8_249 : NVPTXReg<"%v4b8_249">;
|
|
def v4b8_250 : NVPTXReg<"%v4b8_250">;
|
|
def v4b8_251 : NVPTXReg<"%v4b8_251">;
|
|
def v4b8_252 : NVPTXReg<"%v4b8_252">;
|
|
def v4b8_253 : NVPTXReg<"%v4b8_253">;
|
|
def v4b8_254 : NVPTXReg<"%v4b8_254">;
|
|
def v4b8_255 : NVPTXReg<"%v4b8_255">;
|
|
def v4b8_256 : NVPTXReg<"%v4b8_256">;
|
|
def v4b8_257 : NVPTXReg<"%v4b8_257">;
|
|
def v4b8_258 : NVPTXReg<"%v4b8_258">;
|
|
def v4b8_259 : NVPTXReg<"%v4b8_259">;
|
|
def v4b8_260 : NVPTXReg<"%v4b8_260">;
|
|
def v4b8_261 : NVPTXReg<"%v4b8_261">;
|
|
def v4b8_262 : NVPTXReg<"%v4b8_262">;
|
|
def v4b8_263 : NVPTXReg<"%v4b8_263">;
|
|
def v4b8_264 : NVPTXReg<"%v4b8_264">;
|
|
def v4b8_265 : NVPTXReg<"%v4b8_265">;
|
|
def v4b8_266 : NVPTXReg<"%v4b8_266">;
|
|
def v4b8_267 : NVPTXReg<"%v4b8_267">;
|
|
def v4b8_268 : NVPTXReg<"%v4b8_268">;
|
|
def v4b8_269 : NVPTXReg<"%v4b8_269">;
|
|
def v4b8_270 : NVPTXReg<"%v4b8_270">;
|
|
def v4b8_271 : NVPTXReg<"%v4b8_271">;
|
|
def v4b8_272 : NVPTXReg<"%v4b8_272">;
|
|
def v4b8_273 : NVPTXReg<"%v4b8_273">;
|
|
def v4b8_274 : NVPTXReg<"%v4b8_274">;
|
|
def v4b8_275 : NVPTXReg<"%v4b8_275">;
|
|
def v4b8_276 : NVPTXReg<"%v4b8_276">;
|
|
def v4b8_277 : NVPTXReg<"%v4b8_277">;
|
|
def v4b8_278 : NVPTXReg<"%v4b8_278">;
|
|
def v4b8_279 : NVPTXReg<"%v4b8_279">;
|
|
def v4b8_280 : NVPTXReg<"%v4b8_280">;
|
|
def v4b8_281 : NVPTXReg<"%v4b8_281">;
|
|
def v4b8_282 : NVPTXReg<"%v4b8_282">;
|
|
def v4b8_283 : NVPTXReg<"%v4b8_283">;
|
|
def v4b8_284 : NVPTXReg<"%v4b8_284">;
|
|
def v4b8_285 : NVPTXReg<"%v4b8_285">;
|
|
def v4b8_286 : NVPTXReg<"%v4b8_286">;
|
|
def v4b8_287 : NVPTXReg<"%v4b8_287">;
|
|
def v4b8_288 : NVPTXReg<"%v4b8_288">;
|
|
def v4b8_289 : NVPTXReg<"%v4b8_289">;
|
|
def v4b8_290 : NVPTXReg<"%v4b8_290">;
|
|
def v4b8_291 : NVPTXReg<"%v4b8_291">;
|
|
def v4b8_292 : NVPTXReg<"%v4b8_292">;
|
|
def v4b8_293 : NVPTXReg<"%v4b8_293">;
|
|
def v4b8_294 : NVPTXReg<"%v4b8_294">;
|
|
def v4b8_295 : NVPTXReg<"%v4b8_295">;
|
|
def v4b8_296 : NVPTXReg<"%v4b8_296">;
|
|
def v4b8_297 : NVPTXReg<"%v4b8_297">;
|
|
def v4b8_298 : NVPTXReg<"%v4b8_298">;
|
|
def v4b8_299 : NVPTXReg<"%v4b8_299">;
|
|
def v4b8_300 : NVPTXReg<"%v4b8_300">;
|
|
def v4b8_301 : NVPTXReg<"%v4b8_301">;
|
|
def v4b8_302 : NVPTXReg<"%v4b8_302">;
|
|
def v4b8_303 : NVPTXReg<"%v4b8_303">;
|
|
def v4b8_304 : NVPTXReg<"%v4b8_304">;
|
|
def v4b8_305 : NVPTXReg<"%v4b8_305">;
|
|
def v4b8_306 : NVPTXReg<"%v4b8_306">;
|
|
def v4b8_307 : NVPTXReg<"%v4b8_307">;
|
|
def v4b8_308 : NVPTXReg<"%v4b8_308">;
|
|
def v4b8_309 : NVPTXReg<"%v4b8_309">;
|
|
def v4b8_310 : NVPTXReg<"%v4b8_310">;
|
|
def v4b8_311 : NVPTXReg<"%v4b8_311">;
|
|
def v4b8_312 : NVPTXReg<"%v4b8_312">;
|
|
def v4b8_313 : NVPTXReg<"%v4b8_313">;
|
|
def v4b8_314 : NVPTXReg<"%v4b8_314">;
|
|
def v4b8_315 : NVPTXReg<"%v4b8_315">;
|
|
def v4b8_316 : NVPTXReg<"%v4b8_316">;
|
|
def v4b8_317 : NVPTXReg<"%v4b8_317">;
|
|
def v4b8_318 : NVPTXReg<"%v4b8_318">;
|
|
def v4b8_319 : NVPTXReg<"%v4b8_319">;
|
|
def v4b8_320 : NVPTXReg<"%v4b8_320">;
|
|
def v4b8_321 : NVPTXReg<"%v4b8_321">;
|
|
def v4b8_322 : NVPTXReg<"%v4b8_322">;
|
|
def v4b8_323 : NVPTXReg<"%v4b8_323">;
|
|
def v4b8_324 : NVPTXReg<"%v4b8_324">;
|
|
def v4b8_325 : NVPTXReg<"%v4b8_325">;
|
|
def v4b8_326 : NVPTXReg<"%v4b8_326">;
|
|
def v4b8_327 : NVPTXReg<"%v4b8_327">;
|
|
def v4b8_328 : NVPTXReg<"%v4b8_328">;
|
|
def v4b8_329 : NVPTXReg<"%v4b8_329">;
|
|
def v4b8_330 : NVPTXReg<"%v4b8_330">;
|
|
def v4b8_331 : NVPTXReg<"%v4b8_331">;
|
|
def v4b8_332 : NVPTXReg<"%v4b8_332">;
|
|
def v4b8_333 : NVPTXReg<"%v4b8_333">;
|
|
def v4b8_334 : NVPTXReg<"%v4b8_334">;
|
|
def v4b8_335 : NVPTXReg<"%v4b8_335">;
|
|
def v4b8_336 : NVPTXReg<"%v4b8_336">;
|
|
def v4b8_337 : NVPTXReg<"%v4b8_337">;
|
|
def v4b8_338 : NVPTXReg<"%v4b8_338">;
|
|
def v4b8_339 : NVPTXReg<"%v4b8_339">;
|
|
def v4b8_340 : NVPTXReg<"%v4b8_340">;
|
|
def v4b8_341 : NVPTXReg<"%v4b8_341">;
|
|
def v4b8_342 : NVPTXReg<"%v4b8_342">;
|
|
def v4b8_343 : NVPTXReg<"%v4b8_343">;
|
|
def v4b8_344 : NVPTXReg<"%v4b8_344">;
|
|
def v4b8_345 : NVPTXReg<"%v4b8_345">;
|
|
def v4b8_346 : NVPTXReg<"%v4b8_346">;
|
|
def v4b8_347 : NVPTXReg<"%v4b8_347">;
|
|
def v4b8_348 : NVPTXReg<"%v4b8_348">;
|
|
def v4b8_349 : NVPTXReg<"%v4b8_349">;
|
|
def v4b8_350 : NVPTXReg<"%v4b8_350">;
|
|
def v4b8_351 : NVPTXReg<"%v4b8_351">;
|
|
def v4b8_352 : NVPTXReg<"%v4b8_352">;
|
|
def v4b8_353 : NVPTXReg<"%v4b8_353">;
|
|
def v4b8_354 : NVPTXReg<"%v4b8_354">;
|
|
def v4b8_355 : NVPTXReg<"%v4b8_355">;
|
|
def v4b8_356 : NVPTXReg<"%v4b8_356">;
|
|
def v4b8_357 : NVPTXReg<"%v4b8_357">;
|
|
def v4b8_358 : NVPTXReg<"%v4b8_358">;
|
|
def v4b8_359 : NVPTXReg<"%v4b8_359">;
|
|
def v4b8_360 : NVPTXReg<"%v4b8_360">;
|
|
def v4b8_361 : NVPTXReg<"%v4b8_361">;
|
|
def v4b8_362 : NVPTXReg<"%v4b8_362">;
|
|
def v4b8_363 : NVPTXReg<"%v4b8_363">;
|
|
def v4b8_364 : NVPTXReg<"%v4b8_364">;
|
|
def v4b8_365 : NVPTXReg<"%v4b8_365">;
|
|
def v4b8_366 : NVPTXReg<"%v4b8_366">;
|
|
def v4b8_367 : NVPTXReg<"%v4b8_367">;
|
|
def v4b8_368 : NVPTXReg<"%v4b8_368">;
|
|
def v4b8_369 : NVPTXReg<"%v4b8_369">;
|
|
def v4b8_370 : NVPTXReg<"%v4b8_370">;
|
|
def v4b8_371 : NVPTXReg<"%v4b8_371">;
|
|
def v4b8_372 : NVPTXReg<"%v4b8_372">;
|
|
def v4b8_373 : NVPTXReg<"%v4b8_373">;
|
|
def v4b8_374 : NVPTXReg<"%v4b8_374">;
|
|
def v4b8_375 : NVPTXReg<"%v4b8_375">;
|
|
def v4b8_376 : NVPTXReg<"%v4b8_376">;
|
|
def v4b8_377 : NVPTXReg<"%v4b8_377">;
|
|
def v4b8_378 : NVPTXReg<"%v4b8_378">;
|
|
def v4b8_379 : NVPTXReg<"%v4b8_379">;
|
|
def v4b8_380 : NVPTXReg<"%v4b8_380">;
|
|
def v4b8_381 : NVPTXReg<"%v4b8_381">;
|
|
def v4b8_382 : NVPTXReg<"%v4b8_382">;
|
|
def v4b8_383 : NVPTXReg<"%v4b8_383">;
|
|
def v4b8_384 : NVPTXReg<"%v4b8_384">;
|
|
def v4b8_385 : NVPTXReg<"%v4b8_385">;
|
|
def v4b8_386 : NVPTXReg<"%v4b8_386">;
|
|
def v4b8_387 : NVPTXReg<"%v4b8_387">;
|
|
def v4b8_388 : NVPTXReg<"%v4b8_388">;
|
|
def v4b8_389 : NVPTXReg<"%v4b8_389">;
|
|
def v4b8_390 : NVPTXReg<"%v4b8_390">;
|
|
def v4b8_391 : NVPTXReg<"%v4b8_391">;
|
|
def v4b8_392 : NVPTXReg<"%v4b8_392">;
|
|
def v4b8_393 : NVPTXReg<"%v4b8_393">;
|
|
def v4b8_394 : NVPTXReg<"%v4b8_394">;
|
|
def v4b8_395 : NVPTXReg<"%v4b8_395">;
|
|
def v4b16_0 : NVPTXReg<"%v4b16_0">;
|
|
def v4b16_1 : NVPTXReg<"%v4b16_1">;
|
|
def v4b16_2 : NVPTXReg<"%v4b16_2">;
|
|
def v4b16_3 : NVPTXReg<"%v4b16_3">;
|
|
def v4b16_4 : NVPTXReg<"%v4b16_4">;
|
|
def v4b16_5 : NVPTXReg<"%v4b16_5">;
|
|
def v4b16_6 : NVPTXReg<"%v4b16_6">;
|
|
def v4b16_7 : NVPTXReg<"%v4b16_7">;
|
|
def v4b16_8 : NVPTXReg<"%v4b16_8">;
|
|
def v4b16_9 : NVPTXReg<"%v4b16_9">;
|
|
def v4b16_10 : NVPTXReg<"%v4b16_10">;
|
|
def v4b16_11 : NVPTXReg<"%v4b16_11">;
|
|
def v4b16_12 : NVPTXReg<"%v4b16_12">;
|
|
def v4b16_13 : NVPTXReg<"%v4b16_13">;
|
|
def v4b16_14 : NVPTXReg<"%v4b16_14">;
|
|
def v4b16_15 : NVPTXReg<"%v4b16_15">;
|
|
def v4b16_16 : NVPTXReg<"%v4b16_16">;
|
|
def v4b16_17 : NVPTXReg<"%v4b16_17">;
|
|
def v4b16_18 : NVPTXReg<"%v4b16_18">;
|
|
def v4b16_19 : NVPTXReg<"%v4b16_19">;
|
|
def v4b16_20 : NVPTXReg<"%v4b16_20">;
|
|
def v4b16_21 : NVPTXReg<"%v4b16_21">;
|
|
def v4b16_22 : NVPTXReg<"%v4b16_22">;
|
|
def v4b16_23 : NVPTXReg<"%v4b16_23">;
|
|
def v4b16_24 : NVPTXReg<"%v4b16_24">;
|
|
def v4b16_25 : NVPTXReg<"%v4b16_25">;
|
|
def v4b16_26 : NVPTXReg<"%v4b16_26">;
|
|
def v4b16_27 : NVPTXReg<"%v4b16_27">;
|
|
def v4b16_28 : NVPTXReg<"%v4b16_28">;
|
|
def v4b16_29 : NVPTXReg<"%v4b16_29">;
|
|
def v4b16_30 : NVPTXReg<"%v4b16_30">;
|
|
def v4b16_31 : NVPTXReg<"%v4b16_31">;
|
|
def v4b16_32 : NVPTXReg<"%v4b16_32">;
|
|
def v4b16_33 : NVPTXReg<"%v4b16_33">;
|
|
def v4b16_34 : NVPTXReg<"%v4b16_34">;
|
|
def v4b16_35 : NVPTXReg<"%v4b16_35">;
|
|
def v4b16_36 : NVPTXReg<"%v4b16_36">;
|
|
def v4b16_37 : NVPTXReg<"%v4b16_37">;
|
|
def v4b16_38 : NVPTXReg<"%v4b16_38">;
|
|
def v4b16_39 : NVPTXReg<"%v4b16_39">;
|
|
def v4b16_40 : NVPTXReg<"%v4b16_40">;
|
|
def v4b16_41 : NVPTXReg<"%v4b16_41">;
|
|
def v4b16_42 : NVPTXReg<"%v4b16_42">;
|
|
def v4b16_43 : NVPTXReg<"%v4b16_43">;
|
|
def v4b16_44 : NVPTXReg<"%v4b16_44">;
|
|
def v4b16_45 : NVPTXReg<"%v4b16_45">;
|
|
def v4b16_46 : NVPTXReg<"%v4b16_46">;
|
|
def v4b16_47 : NVPTXReg<"%v4b16_47">;
|
|
def v4b16_48 : NVPTXReg<"%v4b16_48">;
|
|
def v4b16_49 : NVPTXReg<"%v4b16_49">;
|
|
def v4b16_50 : NVPTXReg<"%v4b16_50">;
|
|
def v4b16_51 : NVPTXReg<"%v4b16_51">;
|
|
def v4b16_52 : NVPTXReg<"%v4b16_52">;
|
|
def v4b16_53 : NVPTXReg<"%v4b16_53">;
|
|
def v4b16_54 : NVPTXReg<"%v4b16_54">;
|
|
def v4b16_55 : NVPTXReg<"%v4b16_55">;
|
|
def v4b16_56 : NVPTXReg<"%v4b16_56">;
|
|
def v4b16_57 : NVPTXReg<"%v4b16_57">;
|
|
def v4b16_58 : NVPTXReg<"%v4b16_58">;
|
|
def v4b16_59 : NVPTXReg<"%v4b16_59">;
|
|
def v4b16_60 : NVPTXReg<"%v4b16_60">;
|
|
def v4b16_61 : NVPTXReg<"%v4b16_61">;
|
|
def v4b16_62 : NVPTXReg<"%v4b16_62">;
|
|
def v4b16_63 : NVPTXReg<"%v4b16_63">;
|
|
def v4b16_64 : NVPTXReg<"%v4b16_64">;
|
|
def v4b16_65 : NVPTXReg<"%v4b16_65">;
|
|
def v4b16_66 : NVPTXReg<"%v4b16_66">;
|
|
def v4b16_67 : NVPTXReg<"%v4b16_67">;
|
|
def v4b16_68 : NVPTXReg<"%v4b16_68">;
|
|
def v4b16_69 : NVPTXReg<"%v4b16_69">;
|
|
def v4b16_70 : NVPTXReg<"%v4b16_70">;
|
|
def v4b16_71 : NVPTXReg<"%v4b16_71">;
|
|
def v4b16_72 : NVPTXReg<"%v4b16_72">;
|
|
def v4b16_73 : NVPTXReg<"%v4b16_73">;
|
|
def v4b16_74 : NVPTXReg<"%v4b16_74">;
|
|
def v4b16_75 : NVPTXReg<"%v4b16_75">;
|
|
def v4b16_76 : NVPTXReg<"%v4b16_76">;
|
|
def v4b16_77 : NVPTXReg<"%v4b16_77">;
|
|
def v4b16_78 : NVPTXReg<"%v4b16_78">;
|
|
def v4b16_79 : NVPTXReg<"%v4b16_79">;
|
|
def v4b16_80 : NVPTXReg<"%v4b16_80">;
|
|
def v4b16_81 : NVPTXReg<"%v4b16_81">;
|
|
def v4b16_82 : NVPTXReg<"%v4b16_82">;
|
|
def v4b16_83 : NVPTXReg<"%v4b16_83">;
|
|
def v4b16_84 : NVPTXReg<"%v4b16_84">;
|
|
def v4b16_85 : NVPTXReg<"%v4b16_85">;
|
|
def v4b16_86 : NVPTXReg<"%v4b16_86">;
|
|
def v4b16_87 : NVPTXReg<"%v4b16_87">;
|
|
def v4b16_88 : NVPTXReg<"%v4b16_88">;
|
|
def v4b16_89 : NVPTXReg<"%v4b16_89">;
|
|
def v4b16_90 : NVPTXReg<"%v4b16_90">;
|
|
def v4b16_91 : NVPTXReg<"%v4b16_91">;
|
|
def v4b16_92 : NVPTXReg<"%v4b16_92">;
|
|
def v4b16_93 : NVPTXReg<"%v4b16_93">;
|
|
def v4b16_94 : NVPTXReg<"%v4b16_94">;
|
|
def v4b16_95 : NVPTXReg<"%v4b16_95">;
|
|
def v4b16_96 : NVPTXReg<"%v4b16_96">;
|
|
def v4b16_97 : NVPTXReg<"%v4b16_97">;
|
|
def v4b16_98 : NVPTXReg<"%v4b16_98">;
|
|
def v4b16_99 : NVPTXReg<"%v4b16_99">;
|
|
def v4b16_100 : NVPTXReg<"%v4b16_100">;
|
|
def v4b16_101 : NVPTXReg<"%v4b16_101">;
|
|
def v4b16_102 : NVPTXReg<"%v4b16_102">;
|
|
def v4b16_103 : NVPTXReg<"%v4b16_103">;
|
|
def v4b16_104 : NVPTXReg<"%v4b16_104">;
|
|
def v4b16_105 : NVPTXReg<"%v4b16_105">;
|
|
def v4b16_106 : NVPTXReg<"%v4b16_106">;
|
|
def v4b16_107 : NVPTXReg<"%v4b16_107">;
|
|
def v4b16_108 : NVPTXReg<"%v4b16_108">;
|
|
def v4b16_109 : NVPTXReg<"%v4b16_109">;
|
|
def v4b16_110 : NVPTXReg<"%v4b16_110">;
|
|
def v4b16_111 : NVPTXReg<"%v4b16_111">;
|
|
def v4b16_112 : NVPTXReg<"%v4b16_112">;
|
|
def v4b16_113 : NVPTXReg<"%v4b16_113">;
|
|
def v4b16_114 : NVPTXReg<"%v4b16_114">;
|
|
def v4b16_115 : NVPTXReg<"%v4b16_115">;
|
|
def v4b16_116 : NVPTXReg<"%v4b16_116">;
|
|
def v4b16_117 : NVPTXReg<"%v4b16_117">;
|
|
def v4b16_118 : NVPTXReg<"%v4b16_118">;
|
|
def v4b16_119 : NVPTXReg<"%v4b16_119">;
|
|
def v4b16_120 : NVPTXReg<"%v4b16_120">;
|
|
def v4b16_121 : NVPTXReg<"%v4b16_121">;
|
|
def v4b16_122 : NVPTXReg<"%v4b16_122">;
|
|
def v4b16_123 : NVPTXReg<"%v4b16_123">;
|
|
def v4b16_124 : NVPTXReg<"%v4b16_124">;
|
|
def v4b16_125 : NVPTXReg<"%v4b16_125">;
|
|
def v4b16_126 : NVPTXReg<"%v4b16_126">;
|
|
def v4b16_127 : NVPTXReg<"%v4b16_127">;
|
|
def v4b16_128 : NVPTXReg<"%v4b16_128">;
|
|
def v4b16_129 : NVPTXReg<"%v4b16_129">;
|
|
def v4b16_130 : NVPTXReg<"%v4b16_130">;
|
|
def v4b16_131 : NVPTXReg<"%v4b16_131">;
|
|
def v4b16_132 : NVPTXReg<"%v4b16_132">;
|
|
def v4b16_133 : NVPTXReg<"%v4b16_133">;
|
|
def v4b16_134 : NVPTXReg<"%v4b16_134">;
|
|
def v4b16_135 : NVPTXReg<"%v4b16_135">;
|
|
def v4b16_136 : NVPTXReg<"%v4b16_136">;
|
|
def v4b16_137 : NVPTXReg<"%v4b16_137">;
|
|
def v4b16_138 : NVPTXReg<"%v4b16_138">;
|
|
def v4b16_139 : NVPTXReg<"%v4b16_139">;
|
|
def v4b16_140 : NVPTXReg<"%v4b16_140">;
|
|
def v4b16_141 : NVPTXReg<"%v4b16_141">;
|
|
def v4b16_142 : NVPTXReg<"%v4b16_142">;
|
|
def v4b16_143 : NVPTXReg<"%v4b16_143">;
|
|
def v4b16_144 : NVPTXReg<"%v4b16_144">;
|
|
def v4b16_145 : NVPTXReg<"%v4b16_145">;
|
|
def v4b16_146 : NVPTXReg<"%v4b16_146">;
|
|
def v4b16_147 : NVPTXReg<"%v4b16_147">;
|
|
def v4b16_148 : NVPTXReg<"%v4b16_148">;
|
|
def v4b16_149 : NVPTXReg<"%v4b16_149">;
|
|
def v4b16_150 : NVPTXReg<"%v4b16_150">;
|
|
def v4b16_151 : NVPTXReg<"%v4b16_151">;
|
|
def v4b16_152 : NVPTXReg<"%v4b16_152">;
|
|
def v4b16_153 : NVPTXReg<"%v4b16_153">;
|
|
def v4b16_154 : NVPTXReg<"%v4b16_154">;
|
|
def v4b16_155 : NVPTXReg<"%v4b16_155">;
|
|
def v4b16_156 : NVPTXReg<"%v4b16_156">;
|
|
def v4b16_157 : NVPTXReg<"%v4b16_157">;
|
|
def v4b16_158 : NVPTXReg<"%v4b16_158">;
|
|
def v4b16_159 : NVPTXReg<"%v4b16_159">;
|
|
def v4b16_160 : NVPTXReg<"%v4b16_160">;
|
|
def v4b16_161 : NVPTXReg<"%v4b16_161">;
|
|
def v4b16_162 : NVPTXReg<"%v4b16_162">;
|
|
def v4b16_163 : NVPTXReg<"%v4b16_163">;
|
|
def v4b16_164 : NVPTXReg<"%v4b16_164">;
|
|
def v4b16_165 : NVPTXReg<"%v4b16_165">;
|
|
def v4b16_166 : NVPTXReg<"%v4b16_166">;
|
|
def v4b16_167 : NVPTXReg<"%v4b16_167">;
|
|
def v4b16_168 : NVPTXReg<"%v4b16_168">;
|
|
def v4b16_169 : NVPTXReg<"%v4b16_169">;
|
|
def v4b16_170 : NVPTXReg<"%v4b16_170">;
|
|
def v4b16_171 : NVPTXReg<"%v4b16_171">;
|
|
def v4b16_172 : NVPTXReg<"%v4b16_172">;
|
|
def v4b16_173 : NVPTXReg<"%v4b16_173">;
|
|
def v4b16_174 : NVPTXReg<"%v4b16_174">;
|
|
def v4b16_175 : NVPTXReg<"%v4b16_175">;
|
|
def v4b16_176 : NVPTXReg<"%v4b16_176">;
|
|
def v4b16_177 : NVPTXReg<"%v4b16_177">;
|
|
def v4b16_178 : NVPTXReg<"%v4b16_178">;
|
|
def v4b16_179 : NVPTXReg<"%v4b16_179">;
|
|
def v4b16_180 : NVPTXReg<"%v4b16_180">;
|
|
def v4b16_181 : NVPTXReg<"%v4b16_181">;
|
|
def v4b16_182 : NVPTXReg<"%v4b16_182">;
|
|
def v4b16_183 : NVPTXReg<"%v4b16_183">;
|
|
def v4b16_184 : NVPTXReg<"%v4b16_184">;
|
|
def v4b16_185 : NVPTXReg<"%v4b16_185">;
|
|
def v4b16_186 : NVPTXReg<"%v4b16_186">;
|
|
def v4b16_187 : NVPTXReg<"%v4b16_187">;
|
|
def v4b16_188 : NVPTXReg<"%v4b16_188">;
|
|
def v4b16_189 : NVPTXReg<"%v4b16_189">;
|
|
def v4b16_190 : NVPTXReg<"%v4b16_190">;
|
|
def v4b16_191 : NVPTXReg<"%v4b16_191">;
|
|
def v4b16_192 : NVPTXReg<"%v4b16_192">;
|
|
def v4b16_193 : NVPTXReg<"%v4b16_193">;
|
|
def v4b16_194 : NVPTXReg<"%v4b16_194">;
|
|
def v4b16_195 : NVPTXReg<"%v4b16_195">;
|
|
def v4b16_196 : NVPTXReg<"%v4b16_196">;
|
|
def v4b16_197 : NVPTXReg<"%v4b16_197">;
|
|
def v4b16_198 : NVPTXReg<"%v4b16_198">;
|
|
def v4b16_199 : NVPTXReg<"%v4b16_199">;
|
|
def v4b16_200 : NVPTXReg<"%v4b16_200">;
|
|
def v4b16_201 : NVPTXReg<"%v4b16_201">;
|
|
def v4b16_202 : NVPTXReg<"%v4b16_202">;
|
|
def v4b16_203 : NVPTXReg<"%v4b16_203">;
|
|
def v4b16_204 : NVPTXReg<"%v4b16_204">;
|
|
def v4b16_205 : NVPTXReg<"%v4b16_205">;
|
|
def v4b16_206 : NVPTXReg<"%v4b16_206">;
|
|
def v4b16_207 : NVPTXReg<"%v4b16_207">;
|
|
def v4b16_208 : NVPTXReg<"%v4b16_208">;
|
|
def v4b16_209 : NVPTXReg<"%v4b16_209">;
|
|
def v4b16_210 : NVPTXReg<"%v4b16_210">;
|
|
def v4b16_211 : NVPTXReg<"%v4b16_211">;
|
|
def v4b16_212 : NVPTXReg<"%v4b16_212">;
|
|
def v4b16_213 : NVPTXReg<"%v4b16_213">;
|
|
def v4b16_214 : NVPTXReg<"%v4b16_214">;
|
|
def v4b16_215 : NVPTXReg<"%v4b16_215">;
|
|
def v4b16_216 : NVPTXReg<"%v4b16_216">;
|
|
def v4b16_217 : NVPTXReg<"%v4b16_217">;
|
|
def v4b16_218 : NVPTXReg<"%v4b16_218">;
|
|
def v4b16_219 : NVPTXReg<"%v4b16_219">;
|
|
def v4b16_220 : NVPTXReg<"%v4b16_220">;
|
|
def v4b16_221 : NVPTXReg<"%v4b16_221">;
|
|
def v4b16_222 : NVPTXReg<"%v4b16_222">;
|
|
def v4b16_223 : NVPTXReg<"%v4b16_223">;
|
|
def v4b16_224 : NVPTXReg<"%v4b16_224">;
|
|
def v4b16_225 : NVPTXReg<"%v4b16_225">;
|
|
def v4b16_226 : NVPTXReg<"%v4b16_226">;
|
|
def v4b16_227 : NVPTXReg<"%v4b16_227">;
|
|
def v4b16_228 : NVPTXReg<"%v4b16_228">;
|
|
def v4b16_229 : NVPTXReg<"%v4b16_229">;
|
|
def v4b16_230 : NVPTXReg<"%v4b16_230">;
|
|
def v4b16_231 : NVPTXReg<"%v4b16_231">;
|
|
def v4b16_232 : NVPTXReg<"%v4b16_232">;
|
|
def v4b16_233 : NVPTXReg<"%v4b16_233">;
|
|
def v4b16_234 : NVPTXReg<"%v4b16_234">;
|
|
def v4b16_235 : NVPTXReg<"%v4b16_235">;
|
|
def v4b16_236 : NVPTXReg<"%v4b16_236">;
|
|
def v4b16_237 : NVPTXReg<"%v4b16_237">;
|
|
def v4b16_238 : NVPTXReg<"%v4b16_238">;
|
|
def v4b16_239 : NVPTXReg<"%v4b16_239">;
|
|
def v4b16_240 : NVPTXReg<"%v4b16_240">;
|
|
def v4b16_241 : NVPTXReg<"%v4b16_241">;
|
|
def v4b16_242 : NVPTXReg<"%v4b16_242">;
|
|
def v4b16_243 : NVPTXReg<"%v4b16_243">;
|
|
def v4b16_244 : NVPTXReg<"%v4b16_244">;
|
|
def v4b16_245 : NVPTXReg<"%v4b16_245">;
|
|
def v4b16_246 : NVPTXReg<"%v4b16_246">;
|
|
def v4b16_247 : NVPTXReg<"%v4b16_247">;
|
|
def v4b16_248 : NVPTXReg<"%v4b16_248">;
|
|
def v4b16_249 : NVPTXReg<"%v4b16_249">;
|
|
def v4b16_250 : NVPTXReg<"%v4b16_250">;
|
|
def v4b16_251 : NVPTXReg<"%v4b16_251">;
|
|
def v4b16_252 : NVPTXReg<"%v4b16_252">;
|
|
def v4b16_253 : NVPTXReg<"%v4b16_253">;
|
|
def v4b16_254 : NVPTXReg<"%v4b16_254">;
|
|
def v4b16_255 : NVPTXReg<"%v4b16_255">;
|
|
def v4b16_256 : NVPTXReg<"%v4b16_256">;
|
|
def v4b16_257 : NVPTXReg<"%v4b16_257">;
|
|
def v4b16_258 : NVPTXReg<"%v4b16_258">;
|
|
def v4b16_259 : NVPTXReg<"%v4b16_259">;
|
|
def v4b16_260 : NVPTXReg<"%v4b16_260">;
|
|
def v4b16_261 : NVPTXReg<"%v4b16_261">;
|
|
def v4b16_262 : NVPTXReg<"%v4b16_262">;
|
|
def v4b16_263 : NVPTXReg<"%v4b16_263">;
|
|
def v4b16_264 : NVPTXReg<"%v4b16_264">;
|
|
def v4b16_265 : NVPTXReg<"%v4b16_265">;
|
|
def v4b16_266 : NVPTXReg<"%v4b16_266">;
|
|
def v4b16_267 : NVPTXReg<"%v4b16_267">;
|
|
def v4b16_268 : NVPTXReg<"%v4b16_268">;
|
|
def v4b16_269 : NVPTXReg<"%v4b16_269">;
|
|
def v4b16_270 : NVPTXReg<"%v4b16_270">;
|
|
def v4b16_271 : NVPTXReg<"%v4b16_271">;
|
|
def v4b16_272 : NVPTXReg<"%v4b16_272">;
|
|
def v4b16_273 : NVPTXReg<"%v4b16_273">;
|
|
def v4b16_274 : NVPTXReg<"%v4b16_274">;
|
|
def v4b16_275 : NVPTXReg<"%v4b16_275">;
|
|
def v4b16_276 : NVPTXReg<"%v4b16_276">;
|
|
def v4b16_277 : NVPTXReg<"%v4b16_277">;
|
|
def v4b16_278 : NVPTXReg<"%v4b16_278">;
|
|
def v4b16_279 : NVPTXReg<"%v4b16_279">;
|
|
def v4b16_280 : NVPTXReg<"%v4b16_280">;
|
|
def v4b16_281 : NVPTXReg<"%v4b16_281">;
|
|
def v4b16_282 : NVPTXReg<"%v4b16_282">;
|
|
def v4b16_283 : NVPTXReg<"%v4b16_283">;
|
|
def v4b16_284 : NVPTXReg<"%v4b16_284">;
|
|
def v4b16_285 : NVPTXReg<"%v4b16_285">;
|
|
def v4b16_286 : NVPTXReg<"%v4b16_286">;
|
|
def v4b16_287 : NVPTXReg<"%v4b16_287">;
|
|
def v4b16_288 : NVPTXReg<"%v4b16_288">;
|
|
def v4b16_289 : NVPTXReg<"%v4b16_289">;
|
|
def v4b16_290 : NVPTXReg<"%v4b16_290">;
|
|
def v4b16_291 : NVPTXReg<"%v4b16_291">;
|
|
def v4b16_292 : NVPTXReg<"%v4b16_292">;
|
|
def v4b16_293 : NVPTXReg<"%v4b16_293">;
|
|
def v4b16_294 : NVPTXReg<"%v4b16_294">;
|
|
def v4b16_295 : NVPTXReg<"%v4b16_295">;
|
|
def v4b16_296 : NVPTXReg<"%v4b16_296">;
|
|
def v4b16_297 : NVPTXReg<"%v4b16_297">;
|
|
def v4b16_298 : NVPTXReg<"%v4b16_298">;
|
|
def v4b16_299 : NVPTXReg<"%v4b16_299">;
|
|
def v4b16_300 : NVPTXReg<"%v4b16_300">;
|
|
def v4b16_301 : NVPTXReg<"%v4b16_301">;
|
|
def v4b16_302 : NVPTXReg<"%v4b16_302">;
|
|
def v4b16_303 : NVPTXReg<"%v4b16_303">;
|
|
def v4b16_304 : NVPTXReg<"%v4b16_304">;
|
|
def v4b16_305 : NVPTXReg<"%v4b16_305">;
|
|
def v4b16_306 : NVPTXReg<"%v4b16_306">;
|
|
def v4b16_307 : NVPTXReg<"%v4b16_307">;
|
|
def v4b16_308 : NVPTXReg<"%v4b16_308">;
|
|
def v4b16_309 : NVPTXReg<"%v4b16_309">;
|
|
def v4b16_310 : NVPTXReg<"%v4b16_310">;
|
|
def v4b16_311 : NVPTXReg<"%v4b16_311">;
|
|
def v4b16_312 : NVPTXReg<"%v4b16_312">;
|
|
def v4b16_313 : NVPTXReg<"%v4b16_313">;
|
|
def v4b16_314 : NVPTXReg<"%v4b16_314">;
|
|
def v4b16_315 : NVPTXReg<"%v4b16_315">;
|
|
def v4b16_316 : NVPTXReg<"%v4b16_316">;
|
|
def v4b16_317 : NVPTXReg<"%v4b16_317">;
|
|
def v4b16_318 : NVPTXReg<"%v4b16_318">;
|
|
def v4b16_319 : NVPTXReg<"%v4b16_319">;
|
|
def v4b16_320 : NVPTXReg<"%v4b16_320">;
|
|
def v4b16_321 : NVPTXReg<"%v4b16_321">;
|
|
def v4b16_322 : NVPTXReg<"%v4b16_322">;
|
|
def v4b16_323 : NVPTXReg<"%v4b16_323">;
|
|
def v4b16_324 : NVPTXReg<"%v4b16_324">;
|
|
def v4b16_325 : NVPTXReg<"%v4b16_325">;
|
|
def v4b16_326 : NVPTXReg<"%v4b16_326">;
|
|
def v4b16_327 : NVPTXReg<"%v4b16_327">;
|
|
def v4b16_328 : NVPTXReg<"%v4b16_328">;
|
|
def v4b16_329 : NVPTXReg<"%v4b16_329">;
|
|
def v4b16_330 : NVPTXReg<"%v4b16_330">;
|
|
def v4b16_331 : NVPTXReg<"%v4b16_331">;
|
|
def v4b16_332 : NVPTXReg<"%v4b16_332">;
|
|
def v4b16_333 : NVPTXReg<"%v4b16_333">;
|
|
def v4b16_334 : NVPTXReg<"%v4b16_334">;
|
|
def v4b16_335 : NVPTXReg<"%v4b16_335">;
|
|
def v4b16_336 : NVPTXReg<"%v4b16_336">;
|
|
def v4b16_337 : NVPTXReg<"%v4b16_337">;
|
|
def v4b16_338 : NVPTXReg<"%v4b16_338">;
|
|
def v4b16_339 : NVPTXReg<"%v4b16_339">;
|
|
def v4b16_340 : NVPTXReg<"%v4b16_340">;
|
|
def v4b16_341 : NVPTXReg<"%v4b16_341">;
|
|
def v4b16_342 : NVPTXReg<"%v4b16_342">;
|
|
def v4b16_343 : NVPTXReg<"%v4b16_343">;
|
|
def v4b16_344 : NVPTXReg<"%v4b16_344">;
|
|
def v4b16_345 : NVPTXReg<"%v4b16_345">;
|
|
def v4b16_346 : NVPTXReg<"%v4b16_346">;
|
|
def v4b16_347 : NVPTXReg<"%v4b16_347">;
|
|
def v4b16_348 : NVPTXReg<"%v4b16_348">;
|
|
def v4b16_349 : NVPTXReg<"%v4b16_349">;
|
|
def v4b16_350 : NVPTXReg<"%v4b16_350">;
|
|
def v4b16_351 : NVPTXReg<"%v4b16_351">;
|
|
def v4b16_352 : NVPTXReg<"%v4b16_352">;
|
|
def v4b16_353 : NVPTXReg<"%v4b16_353">;
|
|
def v4b16_354 : NVPTXReg<"%v4b16_354">;
|
|
def v4b16_355 : NVPTXReg<"%v4b16_355">;
|
|
def v4b16_356 : NVPTXReg<"%v4b16_356">;
|
|
def v4b16_357 : NVPTXReg<"%v4b16_357">;
|
|
def v4b16_358 : NVPTXReg<"%v4b16_358">;
|
|
def v4b16_359 : NVPTXReg<"%v4b16_359">;
|
|
def v4b16_360 : NVPTXReg<"%v4b16_360">;
|
|
def v4b16_361 : NVPTXReg<"%v4b16_361">;
|
|
def v4b16_362 : NVPTXReg<"%v4b16_362">;
|
|
def v4b16_363 : NVPTXReg<"%v4b16_363">;
|
|
def v4b16_364 : NVPTXReg<"%v4b16_364">;
|
|
def v4b16_365 : NVPTXReg<"%v4b16_365">;
|
|
def v4b16_366 : NVPTXReg<"%v4b16_366">;
|
|
def v4b16_367 : NVPTXReg<"%v4b16_367">;
|
|
def v4b16_368 : NVPTXReg<"%v4b16_368">;
|
|
def v4b16_369 : NVPTXReg<"%v4b16_369">;
|
|
def v4b16_370 : NVPTXReg<"%v4b16_370">;
|
|
def v4b16_371 : NVPTXReg<"%v4b16_371">;
|
|
def v4b16_372 : NVPTXReg<"%v4b16_372">;
|
|
def v4b16_373 : NVPTXReg<"%v4b16_373">;
|
|
def v4b16_374 : NVPTXReg<"%v4b16_374">;
|
|
def v4b16_375 : NVPTXReg<"%v4b16_375">;
|
|
def v4b16_376 : NVPTXReg<"%v4b16_376">;
|
|
def v4b16_377 : NVPTXReg<"%v4b16_377">;
|
|
def v4b16_378 : NVPTXReg<"%v4b16_378">;
|
|
def v4b16_379 : NVPTXReg<"%v4b16_379">;
|
|
def v4b16_380 : NVPTXReg<"%v4b16_380">;
|
|
def v4b16_381 : NVPTXReg<"%v4b16_381">;
|
|
def v4b16_382 : NVPTXReg<"%v4b16_382">;
|
|
def v4b16_383 : NVPTXReg<"%v4b16_383">;
|
|
def v4b16_384 : NVPTXReg<"%v4b16_384">;
|
|
def v4b16_385 : NVPTXReg<"%v4b16_385">;
|
|
def v4b16_386 : NVPTXReg<"%v4b16_386">;
|
|
def v4b16_387 : NVPTXReg<"%v4b16_387">;
|
|
def v4b16_388 : NVPTXReg<"%v4b16_388">;
|
|
def v4b16_389 : NVPTXReg<"%v4b16_389">;
|
|
def v4b16_390 : NVPTXReg<"%v4b16_390">;
|
|
def v4b16_391 : NVPTXReg<"%v4b16_391">;
|
|
def v4b16_392 : NVPTXReg<"%v4b16_392">;
|
|
def v4b16_393 : NVPTXReg<"%v4b16_393">;
|
|
def v4b16_394 : NVPTXReg<"%v4b16_394">;
|
|
def v4b16_395 : NVPTXReg<"%v4b16_395">;
|
|
def v4b32_0 : NVPTXReg<"%v4b32_0">;
|
|
def v4b32_1 : NVPTXReg<"%v4b32_1">;
|
|
def v4b32_2 : NVPTXReg<"%v4b32_2">;
|
|
def v4b32_3 : NVPTXReg<"%v4b32_3">;
|
|
def v4b32_4 : NVPTXReg<"%v4b32_4">;
|
|
def v4b32_5 : NVPTXReg<"%v4b32_5">;
|
|
def v4b32_6 : NVPTXReg<"%v4b32_6">;
|
|
def v4b32_7 : NVPTXReg<"%v4b32_7">;
|
|
def v4b32_8 : NVPTXReg<"%v4b32_8">;
|
|
def v4b32_9 : NVPTXReg<"%v4b32_9">;
|
|
def v4b32_10 : NVPTXReg<"%v4b32_10">;
|
|
def v4b32_11 : NVPTXReg<"%v4b32_11">;
|
|
def v4b32_12 : NVPTXReg<"%v4b32_12">;
|
|
def v4b32_13 : NVPTXReg<"%v4b32_13">;
|
|
def v4b32_14 : NVPTXReg<"%v4b32_14">;
|
|
def v4b32_15 : NVPTXReg<"%v4b32_15">;
|
|
def v4b32_16 : NVPTXReg<"%v4b32_16">;
|
|
def v4b32_17 : NVPTXReg<"%v4b32_17">;
|
|
def v4b32_18 : NVPTXReg<"%v4b32_18">;
|
|
def v4b32_19 : NVPTXReg<"%v4b32_19">;
|
|
def v4b32_20 : NVPTXReg<"%v4b32_20">;
|
|
def v4b32_21 : NVPTXReg<"%v4b32_21">;
|
|
def v4b32_22 : NVPTXReg<"%v4b32_22">;
|
|
def v4b32_23 : NVPTXReg<"%v4b32_23">;
|
|
def v4b32_24 : NVPTXReg<"%v4b32_24">;
|
|
def v4b32_25 : NVPTXReg<"%v4b32_25">;
|
|
def v4b32_26 : NVPTXReg<"%v4b32_26">;
|
|
def v4b32_27 : NVPTXReg<"%v4b32_27">;
|
|
def v4b32_28 : NVPTXReg<"%v4b32_28">;
|
|
def v4b32_29 : NVPTXReg<"%v4b32_29">;
|
|
def v4b32_30 : NVPTXReg<"%v4b32_30">;
|
|
def v4b32_31 : NVPTXReg<"%v4b32_31">;
|
|
def v4b32_32 : NVPTXReg<"%v4b32_32">;
|
|
def v4b32_33 : NVPTXReg<"%v4b32_33">;
|
|
def v4b32_34 : NVPTXReg<"%v4b32_34">;
|
|
def v4b32_35 : NVPTXReg<"%v4b32_35">;
|
|
def v4b32_36 : NVPTXReg<"%v4b32_36">;
|
|
def v4b32_37 : NVPTXReg<"%v4b32_37">;
|
|
def v4b32_38 : NVPTXReg<"%v4b32_38">;
|
|
def v4b32_39 : NVPTXReg<"%v4b32_39">;
|
|
def v4b32_40 : NVPTXReg<"%v4b32_40">;
|
|
def v4b32_41 : NVPTXReg<"%v4b32_41">;
|
|
def v4b32_42 : NVPTXReg<"%v4b32_42">;
|
|
def v4b32_43 : NVPTXReg<"%v4b32_43">;
|
|
def v4b32_44 : NVPTXReg<"%v4b32_44">;
|
|
def v4b32_45 : NVPTXReg<"%v4b32_45">;
|
|
def v4b32_46 : NVPTXReg<"%v4b32_46">;
|
|
def v4b32_47 : NVPTXReg<"%v4b32_47">;
|
|
def v4b32_48 : NVPTXReg<"%v4b32_48">;
|
|
def v4b32_49 : NVPTXReg<"%v4b32_49">;
|
|
def v4b32_50 : NVPTXReg<"%v4b32_50">;
|
|
def v4b32_51 : NVPTXReg<"%v4b32_51">;
|
|
def v4b32_52 : NVPTXReg<"%v4b32_52">;
|
|
def v4b32_53 : NVPTXReg<"%v4b32_53">;
|
|
def v4b32_54 : NVPTXReg<"%v4b32_54">;
|
|
def v4b32_55 : NVPTXReg<"%v4b32_55">;
|
|
def v4b32_56 : NVPTXReg<"%v4b32_56">;
|
|
def v4b32_57 : NVPTXReg<"%v4b32_57">;
|
|
def v4b32_58 : NVPTXReg<"%v4b32_58">;
|
|
def v4b32_59 : NVPTXReg<"%v4b32_59">;
|
|
def v4b32_60 : NVPTXReg<"%v4b32_60">;
|
|
def v4b32_61 : NVPTXReg<"%v4b32_61">;
|
|
def v4b32_62 : NVPTXReg<"%v4b32_62">;
|
|
def v4b32_63 : NVPTXReg<"%v4b32_63">;
|
|
def v4b32_64 : NVPTXReg<"%v4b32_64">;
|
|
def v4b32_65 : NVPTXReg<"%v4b32_65">;
|
|
def v4b32_66 : NVPTXReg<"%v4b32_66">;
|
|
def v4b32_67 : NVPTXReg<"%v4b32_67">;
|
|
def v4b32_68 : NVPTXReg<"%v4b32_68">;
|
|
def v4b32_69 : NVPTXReg<"%v4b32_69">;
|
|
def v4b32_70 : NVPTXReg<"%v4b32_70">;
|
|
def v4b32_71 : NVPTXReg<"%v4b32_71">;
|
|
def v4b32_72 : NVPTXReg<"%v4b32_72">;
|
|
def v4b32_73 : NVPTXReg<"%v4b32_73">;
|
|
def v4b32_74 : NVPTXReg<"%v4b32_74">;
|
|
def v4b32_75 : NVPTXReg<"%v4b32_75">;
|
|
def v4b32_76 : NVPTXReg<"%v4b32_76">;
|
|
def v4b32_77 : NVPTXReg<"%v4b32_77">;
|
|
def v4b32_78 : NVPTXReg<"%v4b32_78">;
|
|
def v4b32_79 : NVPTXReg<"%v4b32_79">;
|
|
def v4b32_80 : NVPTXReg<"%v4b32_80">;
|
|
def v4b32_81 : NVPTXReg<"%v4b32_81">;
|
|
def v4b32_82 : NVPTXReg<"%v4b32_82">;
|
|
def v4b32_83 : NVPTXReg<"%v4b32_83">;
|
|
def v4b32_84 : NVPTXReg<"%v4b32_84">;
|
|
def v4b32_85 : NVPTXReg<"%v4b32_85">;
|
|
def v4b32_86 : NVPTXReg<"%v4b32_86">;
|
|
def v4b32_87 : NVPTXReg<"%v4b32_87">;
|
|
def v4b32_88 : NVPTXReg<"%v4b32_88">;
|
|
def v4b32_89 : NVPTXReg<"%v4b32_89">;
|
|
def v4b32_90 : NVPTXReg<"%v4b32_90">;
|
|
def v4b32_91 : NVPTXReg<"%v4b32_91">;
|
|
def v4b32_92 : NVPTXReg<"%v4b32_92">;
|
|
def v4b32_93 : NVPTXReg<"%v4b32_93">;
|
|
def v4b32_94 : NVPTXReg<"%v4b32_94">;
|
|
def v4b32_95 : NVPTXReg<"%v4b32_95">;
|
|
def v4b32_96 : NVPTXReg<"%v4b32_96">;
|
|
def v4b32_97 : NVPTXReg<"%v4b32_97">;
|
|
def v4b32_98 : NVPTXReg<"%v4b32_98">;
|
|
def v4b32_99 : NVPTXReg<"%v4b32_99">;
|
|
def v4b32_100 : NVPTXReg<"%v4b32_100">;
|
|
def v4b32_101 : NVPTXReg<"%v4b32_101">;
|
|
def v4b32_102 : NVPTXReg<"%v4b32_102">;
|
|
def v4b32_103 : NVPTXReg<"%v4b32_103">;
|
|
def v4b32_104 : NVPTXReg<"%v4b32_104">;
|
|
def v4b32_105 : NVPTXReg<"%v4b32_105">;
|
|
def v4b32_106 : NVPTXReg<"%v4b32_106">;
|
|
def v4b32_107 : NVPTXReg<"%v4b32_107">;
|
|
def v4b32_108 : NVPTXReg<"%v4b32_108">;
|
|
def v4b32_109 : NVPTXReg<"%v4b32_109">;
|
|
def v4b32_110 : NVPTXReg<"%v4b32_110">;
|
|
def v4b32_111 : NVPTXReg<"%v4b32_111">;
|
|
def v4b32_112 : NVPTXReg<"%v4b32_112">;
|
|
def v4b32_113 : NVPTXReg<"%v4b32_113">;
|
|
def v4b32_114 : NVPTXReg<"%v4b32_114">;
|
|
def v4b32_115 : NVPTXReg<"%v4b32_115">;
|
|
def v4b32_116 : NVPTXReg<"%v4b32_116">;
|
|
def v4b32_117 : NVPTXReg<"%v4b32_117">;
|
|
def v4b32_118 : NVPTXReg<"%v4b32_118">;
|
|
def v4b32_119 : NVPTXReg<"%v4b32_119">;
|
|
def v4b32_120 : NVPTXReg<"%v4b32_120">;
|
|
def v4b32_121 : NVPTXReg<"%v4b32_121">;
|
|
def v4b32_122 : NVPTXReg<"%v4b32_122">;
|
|
def v4b32_123 : NVPTXReg<"%v4b32_123">;
|
|
def v4b32_124 : NVPTXReg<"%v4b32_124">;
|
|
def v4b32_125 : NVPTXReg<"%v4b32_125">;
|
|
def v4b32_126 : NVPTXReg<"%v4b32_126">;
|
|
def v4b32_127 : NVPTXReg<"%v4b32_127">;
|
|
def v4b32_128 : NVPTXReg<"%v4b32_128">;
|
|
def v4b32_129 : NVPTXReg<"%v4b32_129">;
|
|
def v4b32_130 : NVPTXReg<"%v4b32_130">;
|
|
def v4b32_131 : NVPTXReg<"%v4b32_131">;
|
|
def v4b32_132 : NVPTXReg<"%v4b32_132">;
|
|
def v4b32_133 : NVPTXReg<"%v4b32_133">;
|
|
def v4b32_134 : NVPTXReg<"%v4b32_134">;
|
|
def v4b32_135 : NVPTXReg<"%v4b32_135">;
|
|
def v4b32_136 : NVPTXReg<"%v4b32_136">;
|
|
def v4b32_137 : NVPTXReg<"%v4b32_137">;
|
|
def v4b32_138 : NVPTXReg<"%v4b32_138">;
|
|
def v4b32_139 : NVPTXReg<"%v4b32_139">;
|
|
def v4b32_140 : NVPTXReg<"%v4b32_140">;
|
|
def v4b32_141 : NVPTXReg<"%v4b32_141">;
|
|
def v4b32_142 : NVPTXReg<"%v4b32_142">;
|
|
def v4b32_143 : NVPTXReg<"%v4b32_143">;
|
|
def v4b32_144 : NVPTXReg<"%v4b32_144">;
|
|
def v4b32_145 : NVPTXReg<"%v4b32_145">;
|
|
def v4b32_146 : NVPTXReg<"%v4b32_146">;
|
|
def v4b32_147 : NVPTXReg<"%v4b32_147">;
|
|
def v4b32_148 : NVPTXReg<"%v4b32_148">;
|
|
def v4b32_149 : NVPTXReg<"%v4b32_149">;
|
|
def v4b32_150 : NVPTXReg<"%v4b32_150">;
|
|
def v4b32_151 : NVPTXReg<"%v4b32_151">;
|
|
def v4b32_152 : NVPTXReg<"%v4b32_152">;
|
|
def v4b32_153 : NVPTXReg<"%v4b32_153">;
|
|
def v4b32_154 : NVPTXReg<"%v4b32_154">;
|
|
def v4b32_155 : NVPTXReg<"%v4b32_155">;
|
|
def v4b32_156 : NVPTXReg<"%v4b32_156">;
|
|
def v4b32_157 : NVPTXReg<"%v4b32_157">;
|
|
def v4b32_158 : NVPTXReg<"%v4b32_158">;
|
|
def v4b32_159 : NVPTXReg<"%v4b32_159">;
|
|
def v4b32_160 : NVPTXReg<"%v4b32_160">;
|
|
def v4b32_161 : NVPTXReg<"%v4b32_161">;
|
|
def v4b32_162 : NVPTXReg<"%v4b32_162">;
|
|
def v4b32_163 : NVPTXReg<"%v4b32_163">;
|
|
def v4b32_164 : NVPTXReg<"%v4b32_164">;
|
|
def v4b32_165 : NVPTXReg<"%v4b32_165">;
|
|
def v4b32_166 : NVPTXReg<"%v4b32_166">;
|
|
def v4b32_167 : NVPTXReg<"%v4b32_167">;
|
|
def v4b32_168 : NVPTXReg<"%v4b32_168">;
|
|
def v4b32_169 : NVPTXReg<"%v4b32_169">;
|
|
def v4b32_170 : NVPTXReg<"%v4b32_170">;
|
|
def v4b32_171 : NVPTXReg<"%v4b32_171">;
|
|
def v4b32_172 : NVPTXReg<"%v4b32_172">;
|
|
def v4b32_173 : NVPTXReg<"%v4b32_173">;
|
|
def v4b32_174 : NVPTXReg<"%v4b32_174">;
|
|
def v4b32_175 : NVPTXReg<"%v4b32_175">;
|
|
def v4b32_176 : NVPTXReg<"%v4b32_176">;
|
|
def v4b32_177 : NVPTXReg<"%v4b32_177">;
|
|
def v4b32_178 : NVPTXReg<"%v4b32_178">;
|
|
def v4b32_179 : NVPTXReg<"%v4b32_179">;
|
|
def v4b32_180 : NVPTXReg<"%v4b32_180">;
|
|
def v4b32_181 : NVPTXReg<"%v4b32_181">;
|
|
def v4b32_182 : NVPTXReg<"%v4b32_182">;
|
|
def v4b32_183 : NVPTXReg<"%v4b32_183">;
|
|
def v4b32_184 : NVPTXReg<"%v4b32_184">;
|
|
def v4b32_185 : NVPTXReg<"%v4b32_185">;
|
|
def v4b32_186 : NVPTXReg<"%v4b32_186">;
|
|
def v4b32_187 : NVPTXReg<"%v4b32_187">;
|
|
def v4b32_188 : NVPTXReg<"%v4b32_188">;
|
|
def v4b32_189 : NVPTXReg<"%v4b32_189">;
|
|
def v4b32_190 : NVPTXReg<"%v4b32_190">;
|
|
def v4b32_191 : NVPTXReg<"%v4b32_191">;
|
|
def v4b32_192 : NVPTXReg<"%v4b32_192">;
|
|
def v4b32_193 : NVPTXReg<"%v4b32_193">;
|
|
def v4b32_194 : NVPTXReg<"%v4b32_194">;
|
|
def v4b32_195 : NVPTXReg<"%v4b32_195">;
|
|
def v4b32_196 : NVPTXReg<"%v4b32_196">;
|
|
def v4b32_197 : NVPTXReg<"%v4b32_197">;
|
|
def v4b32_198 : NVPTXReg<"%v4b32_198">;
|
|
def v4b32_199 : NVPTXReg<"%v4b32_199">;
|
|
def v4b32_200 : NVPTXReg<"%v4b32_200">;
|
|
def v4b32_201 : NVPTXReg<"%v4b32_201">;
|
|
def v4b32_202 : NVPTXReg<"%v4b32_202">;
|
|
def v4b32_203 : NVPTXReg<"%v4b32_203">;
|
|
def v4b32_204 : NVPTXReg<"%v4b32_204">;
|
|
def v4b32_205 : NVPTXReg<"%v4b32_205">;
|
|
def v4b32_206 : NVPTXReg<"%v4b32_206">;
|
|
def v4b32_207 : NVPTXReg<"%v4b32_207">;
|
|
def v4b32_208 : NVPTXReg<"%v4b32_208">;
|
|
def v4b32_209 : NVPTXReg<"%v4b32_209">;
|
|
def v4b32_210 : NVPTXReg<"%v4b32_210">;
|
|
def v4b32_211 : NVPTXReg<"%v4b32_211">;
|
|
def v4b32_212 : NVPTXReg<"%v4b32_212">;
|
|
def v4b32_213 : NVPTXReg<"%v4b32_213">;
|
|
def v4b32_214 : NVPTXReg<"%v4b32_214">;
|
|
def v4b32_215 : NVPTXReg<"%v4b32_215">;
|
|
def v4b32_216 : NVPTXReg<"%v4b32_216">;
|
|
def v4b32_217 : NVPTXReg<"%v4b32_217">;
|
|
def v4b32_218 : NVPTXReg<"%v4b32_218">;
|
|
def v4b32_219 : NVPTXReg<"%v4b32_219">;
|
|
def v4b32_220 : NVPTXReg<"%v4b32_220">;
|
|
def v4b32_221 : NVPTXReg<"%v4b32_221">;
|
|
def v4b32_222 : NVPTXReg<"%v4b32_222">;
|
|
def v4b32_223 : NVPTXReg<"%v4b32_223">;
|
|
def v4b32_224 : NVPTXReg<"%v4b32_224">;
|
|
def v4b32_225 : NVPTXReg<"%v4b32_225">;
|
|
def v4b32_226 : NVPTXReg<"%v4b32_226">;
|
|
def v4b32_227 : NVPTXReg<"%v4b32_227">;
|
|
def v4b32_228 : NVPTXReg<"%v4b32_228">;
|
|
def v4b32_229 : NVPTXReg<"%v4b32_229">;
|
|
def v4b32_230 : NVPTXReg<"%v4b32_230">;
|
|
def v4b32_231 : NVPTXReg<"%v4b32_231">;
|
|
def v4b32_232 : NVPTXReg<"%v4b32_232">;
|
|
def v4b32_233 : NVPTXReg<"%v4b32_233">;
|
|
def v4b32_234 : NVPTXReg<"%v4b32_234">;
|
|
def v4b32_235 : NVPTXReg<"%v4b32_235">;
|
|
def v4b32_236 : NVPTXReg<"%v4b32_236">;
|
|
def v4b32_237 : NVPTXReg<"%v4b32_237">;
|
|
def v4b32_238 : NVPTXReg<"%v4b32_238">;
|
|
def v4b32_239 : NVPTXReg<"%v4b32_239">;
|
|
def v4b32_240 : NVPTXReg<"%v4b32_240">;
|
|
def v4b32_241 : NVPTXReg<"%v4b32_241">;
|
|
def v4b32_242 : NVPTXReg<"%v4b32_242">;
|
|
def v4b32_243 : NVPTXReg<"%v4b32_243">;
|
|
def v4b32_244 : NVPTXReg<"%v4b32_244">;
|
|
def v4b32_245 : NVPTXReg<"%v4b32_245">;
|
|
def v4b32_246 : NVPTXReg<"%v4b32_246">;
|
|
def v4b32_247 : NVPTXReg<"%v4b32_247">;
|
|
def v4b32_248 : NVPTXReg<"%v4b32_248">;
|
|
def v4b32_249 : NVPTXReg<"%v4b32_249">;
|
|
def v4b32_250 : NVPTXReg<"%v4b32_250">;
|
|
def v4b32_251 : NVPTXReg<"%v4b32_251">;
|
|
def v4b32_252 : NVPTXReg<"%v4b32_252">;
|
|
def v4b32_253 : NVPTXReg<"%v4b32_253">;
|
|
def v4b32_254 : NVPTXReg<"%v4b32_254">;
|
|
def v4b32_255 : NVPTXReg<"%v4b32_255">;
|
|
def v4b32_256 : NVPTXReg<"%v4b32_256">;
|
|
def v4b32_257 : NVPTXReg<"%v4b32_257">;
|
|
def v4b32_258 : NVPTXReg<"%v4b32_258">;
|
|
def v4b32_259 : NVPTXReg<"%v4b32_259">;
|
|
def v4b32_260 : NVPTXReg<"%v4b32_260">;
|
|
def v4b32_261 : NVPTXReg<"%v4b32_261">;
|
|
def v4b32_262 : NVPTXReg<"%v4b32_262">;
|
|
def v4b32_263 : NVPTXReg<"%v4b32_263">;
|
|
def v4b32_264 : NVPTXReg<"%v4b32_264">;
|
|
def v4b32_265 : NVPTXReg<"%v4b32_265">;
|
|
def v4b32_266 : NVPTXReg<"%v4b32_266">;
|
|
def v4b32_267 : NVPTXReg<"%v4b32_267">;
|
|
def v4b32_268 : NVPTXReg<"%v4b32_268">;
|
|
def v4b32_269 : NVPTXReg<"%v4b32_269">;
|
|
def v4b32_270 : NVPTXReg<"%v4b32_270">;
|
|
def v4b32_271 : NVPTXReg<"%v4b32_271">;
|
|
def v4b32_272 : NVPTXReg<"%v4b32_272">;
|
|
def v4b32_273 : NVPTXReg<"%v4b32_273">;
|
|
def v4b32_274 : NVPTXReg<"%v4b32_274">;
|
|
def v4b32_275 : NVPTXReg<"%v4b32_275">;
|
|
def v4b32_276 : NVPTXReg<"%v4b32_276">;
|
|
def v4b32_277 : NVPTXReg<"%v4b32_277">;
|
|
def v4b32_278 : NVPTXReg<"%v4b32_278">;
|
|
def v4b32_279 : NVPTXReg<"%v4b32_279">;
|
|
def v4b32_280 : NVPTXReg<"%v4b32_280">;
|
|
def v4b32_281 : NVPTXReg<"%v4b32_281">;
|
|
def v4b32_282 : NVPTXReg<"%v4b32_282">;
|
|
def v4b32_283 : NVPTXReg<"%v4b32_283">;
|
|
def v4b32_284 : NVPTXReg<"%v4b32_284">;
|
|
def v4b32_285 : NVPTXReg<"%v4b32_285">;
|
|
def v4b32_286 : NVPTXReg<"%v4b32_286">;
|
|
def v4b32_287 : NVPTXReg<"%v4b32_287">;
|
|
def v4b32_288 : NVPTXReg<"%v4b32_288">;
|
|
def v4b32_289 : NVPTXReg<"%v4b32_289">;
|
|
def v4b32_290 : NVPTXReg<"%v4b32_290">;
|
|
def v4b32_291 : NVPTXReg<"%v4b32_291">;
|
|
def v4b32_292 : NVPTXReg<"%v4b32_292">;
|
|
def v4b32_293 : NVPTXReg<"%v4b32_293">;
|
|
def v4b32_294 : NVPTXReg<"%v4b32_294">;
|
|
def v4b32_295 : NVPTXReg<"%v4b32_295">;
|
|
def v4b32_296 : NVPTXReg<"%v4b32_296">;
|
|
def v4b32_297 : NVPTXReg<"%v4b32_297">;
|
|
def v4b32_298 : NVPTXReg<"%v4b32_298">;
|
|
def v4b32_299 : NVPTXReg<"%v4b32_299">;
|
|
def v4b32_300 : NVPTXReg<"%v4b32_300">;
|
|
def v4b32_301 : NVPTXReg<"%v4b32_301">;
|
|
def v4b32_302 : NVPTXReg<"%v4b32_302">;
|
|
def v4b32_303 : NVPTXReg<"%v4b32_303">;
|
|
def v4b32_304 : NVPTXReg<"%v4b32_304">;
|
|
def v4b32_305 : NVPTXReg<"%v4b32_305">;
|
|
def v4b32_306 : NVPTXReg<"%v4b32_306">;
|
|
def v4b32_307 : NVPTXReg<"%v4b32_307">;
|
|
def v4b32_308 : NVPTXReg<"%v4b32_308">;
|
|
def v4b32_309 : NVPTXReg<"%v4b32_309">;
|
|
def v4b32_310 : NVPTXReg<"%v4b32_310">;
|
|
def v4b32_311 : NVPTXReg<"%v4b32_311">;
|
|
def v4b32_312 : NVPTXReg<"%v4b32_312">;
|
|
def v4b32_313 : NVPTXReg<"%v4b32_313">;
|
|
def v4b32_314 : NVPTXReg<"%v4b32_314">;
|
|
def v4b32_315 : NVPTXReg<"%v4b32_315">;
|
|
def v4b32_316 : NVPTXReg<"%v4b32_316">;
|
|
def v4b32_317 : NVPTXReg<"%v4b32_317">;
|
|
def v4b32_318 : NVPTXReg<"%v4b32_318">;
|
|
def v4b32_319 : NVPTXReg<"%v4b32_319">;
|
|
def v4b32_320 : NVPTXReg<"%v4b32_320">;
|
|
def v4b32_321 : NVPTXReg<"%v4b32_321">;
|
|
def v4b32_322 : NVPTXReg<"%v4b32_322">;
|
|
def v4b32_323 : NVPTXReg<"%v4b32_323">;
|
|
def v4b32_324 : NVPTXReg<"%v4b32_324">;
|
|
def v4b32_325 : NVPTXReg<"%v4b32_325">;
|
|
def v4b32_326 : NVPTXReg<"%v4b32_326">;
|
|
def v4b32_327 : NVPTXReg<"%v4b32_327">;
|
|
def v4b32_328 : NVPTXReg<"%v4b32_328">;
|
|
def v4b32_329 : NVPTXReg<"%v4b32_329">;
|
|
def v4b32_330 : NVPTXReg<"%v4b32_330">;
|
|
def v4b32_331 : NVPTXReg<"%v4b32_331">;
|
|
def v4b32_332 : NVPTXReg<"%v4b32_332">;
|
|
def v4b32_333 : NVPTXReg<"%v4b32_333">;
|
|
def v4b32_334 : NVPTXReg<"%v4b32_334">;
|
|
def v4b32_335 : NVPTXReg<"%v4b32_335">;
|
|
def v4b32_336 : NVPTXReg<"%v4b32_336">;
|
|
def v4b32_337 : NVPTXReg<"%v4b32_337">;
|
|
def v4b32_338 : NVPTXReg<"%v4b32_338">;
|
|
def v4b32_339 : NVPTXReg<"%v4b32_339">;
|
|
def v4b32_340 : NVPTXReg<"%v4b32_340">;
|
|
def v4b32_341 : NVPTXReg<"%v4b32_341">;
|
|
def v4b32_342 : NVPTXReg<"%v4b32_342">;
|
|
def v4b32_343 : NVPTXReg<"%v4b32_343">;
|
|
def v4b32_344 : NVPTXReg<"%v4b32_344">;
|
|
def v4b32_345 : NVPTXReg<"%v4b32_345">;
|
|
def v4b32_346 : NVPTXReg<"%v4b32_346">;
|
|
def v4b32_347 : NVPTXReg<"%v4b32_347">;
|
|
def v4b32_348 : NVPTXReg<"%v4b32_348">;
|
|
def v4b32_349 : NVPTXReg<"%v4b32_349">;
|
|
def v4b32_350 : NVPTXReg<"%v4b32_350">;
|
|
def v4b32_351 : NVPTXReg<"%v4b32_351">;
|
|
def v4b32_352 : NVPTXReg<"%v4b32_352">;
|
|
def v4b32_353 : NVPTXReg<"%v4b32_353">;
|
|
def v4b32_354 : NVPTXReg<"%v4b32_354">;
|
|
def v4b32_355 : NVPTXReg<"%v4b32_355">;
|
|
def v4b32_356 : NVPTXReg<"%v4b32_356">;
|
|
def v4b32_357 : NVPTXReg<"%v4b32_357">;
|
|
def v4b32_358 : NVPTXReg<"%v4b32_358">;
|
|
def v4b32_359 : NVPTXReg<"%v4b32_359">;
|
|
def v4b32_360 : NVPTXReg<"%v4b32_360">;
|
|
def v4b32_361 : NVPTXReg<"%v4b32_361">;
|
|
def v4b32_362 : NVPTXReg<"%v4b32_362">;
|
|
def v4b32_363 : NVPTXReg<"%v4b32_363">;
|
|
def v4b32_364 : NVPTXReg<"%v4b32_364">;
|
|
def v4b32_365 : NVPTXReg<"%v4b32_365">;
|
|
def v4b32_366 : NVPTXReg<"%v4b32_366">;
|
|
def v4b32_367 : NVPTXReg<"%v4b32_367">;
|
|
def v4b32_368 : NVPTXReg<"%v4b32_368">;
|
|
def v4b32_369 : NVPTXReg<"%v4b32_369">;
|
|
def v4b32_370 : NVPTXReg<"%v4b32_370">;
|
|
def v4b32_371 : NVPTXReg<"%v4b32_371">;
|
|
def v4b32_372 : NVPTXReg<"%v4b32_372">;
|
|
def v4b32_373 : NVPTXReg<"%v4b32_373">;
|
|
def v4b32_374 : NVPTXReg<"%v4b32_374">;
|
|
def v4b32_375 : NVPTXReg<"%v4b32_375">;
|
|
def v4b32_376 : NVPTXReg<"%v4b32_376">;
|
|
def v4b32_377 : NVPTXReg<"%v4b32_377">;
|
|
def v4b32_378 : NVPTXReg<"%v4b32_378">;
|
|
def v4b32_379 : NVPTXReg<"%v4b32_379">;
|
|
def v4b32_380 : NVPTXReg<"%v4b32_380">;
|
|
def v4b32_381 : NVPTXReg<"%v4b32_381">;
|
|
def v4b32_382 : NVPTXReg<"%v4b32_382">;
|
|
def v4b32_383 : NVPTXReg<"%v4b32_383">;
|
|
def v4b32_384 : NVPTXReg<"%v4b32_384">;
|
|
def v4b32_385 : NVPTXReg<"%v4b32_385">;
|
|
def v4b32_386 : NVPTXReg<"%v4b32_386">;
|
|
def v4b32_387 : NVPTXReg<"%v4b32_387">;
|
|
def v4b32_388 : NVPTXReg<"%v4b32_388">;
|
|
def v4b32_389 : NVPTXReg<"%v4b32_389">;
|
|
def v4b32_390 : NVPTXReg<"%v4b32_390">;
|
|
def v4b32_391 : NVPTXReg<"%v4b32_391">;
|
|
def v4b32_392 : NVPTXReg<"%v4b32_392">;
|
|
def v4b32_393 : NVPTXReg<"%v4b32_393">;
|
|
def v4b32_394 : NVPTXReg<"%v4b32_394">;
|
|
def v4b32_395 : NVPTXReg<"%v4b32_395">;
|
|
|
|
//===--- Arguments --------------------------------------------------------===//
|
|
def ia0 : NVPTXReg<"%ia0">;
|
|
def ia1 : NVPTXReg<"%ia1">;
|
|
def ia2 : NVPTXReg<"%ia2">;
|
|
def ia3 : NVPTXReg<"%ia3">;
|
|
def ia4 : NVPTXReg<"%ia4">;
|
|
def ia5 : NVPTXReg<"%ia5">;
|
|
def ia6 : NVPTXReg<"%ia6">;
|
|
def ia7 : NVPTXReg<"%ia7">;
|
|
def ia8 : NVPTXReg<"%ia8">;
|
|
def ia9 : NVPTXReg<"%ia9">;
|
|
def ia10 : NVPTXReg<"%ia10">;
|
|
def ia11 : NVPTXReg<"%ia11">;
|
|
def ia12 : NVPTXReg<"%ia12">;
|
|
def ia13 : NVPTXReg<"%ia13">;
|
|
def ia14 : NVPTXReg<"%ia14">;
|
|
def ia15 : NVPTXReg<"%ia15">;
|
|
def ia16 : NVPTXReg<"%ia16">;
|
|
def ia17 : NVPTXReg<"%ia17">;
|
|
def ia18 : NVPTXReg<"%ia18">;
|
|
def ia19 : NVPTXReg<"%ia19">;
|
|
def ia20 : NVPTXReg<"%ia20">;
|
|
def ia21 : NVPTXReg<"%ia21">;
|
|
def ia22 : NVPTXReg<"%ia22">;
|
|
def ia23 : NVPTXReg<"%ia23">;
|
|
def ia24 : NVPTXReg<"%ia24">;
|
|
def ia25 : NVPTXReg<"%ia25">;
|
|
def ia26 : NVPTXReg<"%ia26">;
|
|
def ia27 : NVPTXReg<"%ia27">;
|
|
def ia28 : NVPTXReg<"%ia28">;
|
|
def ia29 : NVPTXReg<"%ia29">;
|
|
def ia30 : NVPTXReg<"%ia30">;
|
|
def ia31 : NVPTXReg<"%ia31">;
|
|
def ia32 : NVPTXReg<"%ia32">;
|
|
def ia33 : NVPTXReg<"%ia33">;
|
|
def ia34 : NVPTXReg<"%ia34">;
|
|
def ia35 : NVPTXReg<"%ia35">;
|
|
def ia36 : NVPTXReg<"%ia36">;
|
|
def ia37 : NVPTXReg<"%ia37">;
|
|
def ia38 : NVPTXReg<"%ia38">;
|
|
def ia39 : NVPTXReg<"%ia39">;
|
|
def ia40 : NVPTXReg<"%ia40">;
|
|
def ia41 : NVPTXReg<"%ia41">;
|
|
def ia42 : NVPTXReg<"%ia42">;
|
|
def ia43 : NVPTXReg<"%ia43">;
|
|
def ia44 : NVPTXReg<"%ia44">;
|
|
def ia45 : NVPTXReg<"%ia45">;
|
|
def ia46 : NVPTXReg<"%ia46">;
|
|
def ia47 : NVPTXReg<"%ia47">;
|
|
def ia48 : NVPTXReg<"%ia48">;
|
|
def ia49 : NVPTXReg<"%ia49">;
|
|
def ia50 : NVPTXReg<"%ia50">;
|
|
def ia51 : NVPTXReg<"%ia51">;
|
|
def ia52 : NVPTXReg<"%ia52">;
|
|
def ia53 : NVPTXReg<"%ia53">;
|
|
def ia54 : NVPTXReg<"%ia54">;
|
|
def ia55 : NVPTXReg<"%ia55">;
|
|
def ia56 : NVPTXReg<"%ia56">;
|
|
def ia57 : NVPTXReg<"%ia57">;
|
|
def ia58 : NVPTXReg<"%ia58">;
|
|
def ia59 : NVPTXReg<"%ia59">;
|
|
def ia60 : NVPTXReg<"%ia60">;
|
|
def ia61 : NVPTXReg<"%ia61">;
|
|
def ia62 : NVPTXReg<"%ia62">;
|
|
def ia63 : NVPTXReg<"%ia63">;
|
|
def ia64 : NVPTXReg<"%ia64">;
|
|
def ia65 : NVPTXReg<"%ia65">;
|
|
def ia66 : NVPTXReg<"%ia66">;
|
|
def ia67 : NVPTXReg<"%ia67">;
|
|
def ia68 : NVPTXReg<"%ia68">;
|
|
def ia69 : NVPTXReg<"%ia69">;
|
|
def ia70 : NVPTXReg<"%ia70">;
|
|
def ia71 : NVPTXReg<"%ia71">;
|
|
def ia72 : NVPTXReg<"%ia72">;
|
|
def ia73 : NVPTXReg<"%ia73">;
|
|
def ia74 : NVPTXReg<"%ia74">;
|
|
def ia75 : NVPTXReg<"%ia75">;
|
|
def ia76 : NVPTXReg<"%ia76">;
|
|
def ia77 : NVPTXReg<"%ia77">;
|
|
def ia78 : NVPTXReg<"%ia78">;
|
|
def ia79 : NVPTXReg<"%ia79">;
|
|
def ia80 : NVPTXReg<"%ia80">;
|
|
def ia81 : NVPTXReg<"%ia81">;
|
|
def ia82 : NVPTXReg<"%ia82">;
|
|
def ia83 : NVPTXReg<"%ia83">;
|
|
def ia84 : NVPTXReg<"%ia84">;
|
|
def ia85 : NVPTXReg<"%ia85">;
|
|
def ia86 : NVPTXReg<"%ia86">;
|
|
def ia87 : NVPTXReg<"%ia87">;
|
|
def ia88 : NVPTXReg<"%ia88">;
|
|
def ia89 : NVPTXReg<"%ia89">;
|
|
def ia90 : NVPTXReg<"%ia90">;
|
|
def ia91 : NVPTXReg<"%ia91">;
|
|
def ia92 : NVPTXReg<"%ia92">;
|
|
def ia93 : NVPTXReg<"%ia93">;
|
|
def ia94 : NVPTXReg<"%ia94">;
|
|
def ia95 : NVPTXReg<"%ia95">;
|
|
def ia96 : NVPTXReg<"%ia96">;
|
|
def ia97 : NVPTXReg<"%ia97">;
|
|
def ia98 : NVPTXReg<"%ia98">;
|
|
def ia99 : NVPTXReg<"%ia99">;
|
|
def ia100 : NVPTXReg<"%ia100">;
|
|
def ia101 : NVPTXReg<"%ia101">;
|
|
def ia102 : NVPTXReg<"%ia102">;
|
|
def ia103 : NVPTXReg<"%ia103">;
|
|
def ia104 : NVPTXReg<"%ia104">;
|
|
def ia105 : NVPTXReg<"%ia105">;
|
|
def ia106 : NVPTXReg<"%ia106">;
|
|
def ia107 : NVPTXReg<"%ia107">;
|
|
def ia108 : NVPTXReg<"%ia108">;
|
|
def ia109 : NVPTXReg<"%ia109">;
|
|
def ia110 : NVPTXReg<"%ia110">;
|
|
def ia111 : NVPTXReg<"%ia111">;
|
|
def ia112 : NVPTXReg<"%ia112">;
|
|
def ia113 : NVPTXReg<"%ia113">;
|
|
def ia114 : NVPTXReg<"%ia114">;
|
|
def ia115 : NVPTXReg<"%ia115">;
|
|
def ia116 : NVPTXReg<"%ia116">;
|
|
def ia117 : NVPTXReg<"%ia117">;
|
|
def ia118 : NVPTXReg<"%ia118">;
|
|
def ia119 : NVPTXReg<"%ia119">;
|
|
def ia120 : NVPTXReg<"%ia120">;
|
|
def ia121 : NVPTXReg<"%ia121">;
|
|
def ia122 : NVPTXReg<"%ia122">;
|
|
def ia123 : NVPTXReg<"%ia123">;
|
|
def ia124 : NVPTXReg<"%ia124">;
|
|
def ia125 : NVPTXReg<"%ia125">;
|
|
def ia126 : NVPTXReg<"%ia126">;
|
|
def ia127 : NVPTXReg<"%ia127">;
|
|
def ia128 : NVPTXReg<"%ia128">;
|
|
def ia129 : NVPTXReg<"%ia129">;
|
|
def ia130 : NVPTXReg<"%ia130">;
|
|
def ia131 : NVPTXReg<"%ia131">;
|
|
def ia132 : NVPTXReg<"%ia132">;
|
|
def ia133 : NVPTXReg<"%ia133">;
|
|
def ia134 : NVPTXReg<"%ia134">;
|
|
def ia135 : NVPTXReg<"%ia135">;
|
|
def ia136 : NVPTXReg<"%ia136">;
|
|
def ia137 : NVPTXReg<"%ia137">;
|
|
def ia138 : NVPTXReg<"%ia138">;
|
|
def ia139 : NVPTXReg<"%ia139">;
|
|
def ia140 : NVPTXReg<"%ia140">;
|
|
def ia141 : NVPTXReg<"%ia141">;
|
|
def ia142 : NVPTXReg<"%ia142">;
|
|
def ia143 : NVPTXReg<"%ia143">;
|
|
def ia144 : NVPTXReg<"%ia144">;
|
|
def ia145 : NVPTXReg<"%ia145">;
|
|
def ia146 : NVPTXReg<"%ia146">;
|
|
def ia147 : NVPTXReg<"%ia147">;
|
|
def ia148 : NVPTXReg<"%ia148">;
|
|
def ia149 : NVPTXReg<"%ia149">;
|
|
def ia150 : NVPTXReg<"%ia150">;
|
|
def ia151 : NVPTXReg<"%ia151">;
|
|
def ia152 : NVPTXReg<"%ia152">;
|
|
def ia153 : NVPTXReg<"%ia153">;
|
|
def ia154 : NVPTXReg<"%ia154">;
|
|
def ia155 : NVPTXReg<"%ia155">;
|
|
def ia156 : NVPTXReg<"%ia156">;
|
|
def ia157 : NVPTXReg<"%ia157">;
|
|
def ia158 : NVPTXReg<"%ia158">;
|
|
def ia159 : NVPTXReg<"%ia159">;
|
|
def ia160 : NVPTXReg<"%ia160">;
|
|
def ia161 : NVPTXReg<"%ia161">;
|
|
def ia162 : NVPTXReg<"%ia162">;
|
|
def ia163 : NVPTXReg<"%ia163">;
|
|
def ia164 : NVPTXReg<"%ia164">;
|
|
def ia165 : NVPTXReg<"%ia165">;
|
|
def ia166 : NVPTXReg<"%ia166">;
|
|
def ia167 : NVPTXReg<"%ia167">;
|
|
def ia168 : NVPTXReg<"%ia168">;
|
|
def ia169 : NVPTXReg<"%ia169">;
|
|
def ia170 : NVPTXReg<"%ia170">;
|
|
def ia171 : NVPTXReg<"%ia171">;
|
|
def ia172 : NVPTXReg<"%ia172">;
|
|
def ia173 : NVPTXReg<"%ia173">;
|
|
def ia174 : NVPTXReg<"%ia174">;
|
|
def ia175 : NVPTXReg<"%ia175">;
|
|
def ia176 : NVPTXReg<"%ia176">;
|
|
def ia177 : NVPTXReg<"%ia177">;
|
|
def ia178 : NVPTXReg<"%ia178">;
|
|
def ia179 : NVPTXReg<"%ia179">;
|
|
def ia180 : NVPTXReg<"%ia180">;
|
|
def ia181 : NVPTXReg<"%ia181">;
|
|
def ia182 : NVPTXReg<"%ia182">;
|
|
def ia183 : NVPTXReg<"%ia183">;
|
|
def ia184 : NVPTXReg<"%ia184">;
|
|
def ia185 : NVPTXReg<"%ia185">;
|
|
def ia186 : NVPTXReg<"%ia186">;
|
|
def ia187 : NVPTXReg<"%ia187">;
|
|
def ia188 : NVPTXReg<"%ia188">;
|
|
def ia189 : NVPTXReg<"%ia189">;
|
|
def ia190 : NVPTXReg<"%ia190">;
|
|
def ia191 : NVPTXReg<"%ia191">;
|
|
def ia192 : NVPTXReg<"%ia192">;
|
|
def ia193 : NVPTXReg<"%ia193">;
|
|
def ia194 : NVPTXReg<"%ia194">;
|
|
def ia195 : NVPTXReg<"%ia195">;
|
|
def ia196 : NVPTXReg<"%ia196">;
|
|
def ia197 : NVPTXReg<"%ia197">;
|
|
def ia198 : NVPTXReg<"%ia198">;
|
|
def ia199 : NVPTXReg<"%ia199">;
|
|
def ia200 : NVPTXReg<"%ia200">;
|
|
def ia201 : NVPTXReg<"%ia201">;
|
|
def ia202 : NVPTXReg<"%ia202">;
|
|
def ia203 : NVPTXReg<"%ia203">;
|
|
def ia204 : NVPTXReg<"%ia204">;
|
|
def ia205 : NVPTXReg<"%ia205">;
|
|
def ia206 : NVPTXReg<"%ia206">;
|
|
def ia207 : NVPTXReg<"%ia207">;
|
|
def ia208 : NVPTXReg<"%ia208">;
|
|
def ia209 : NVPTXReg<"%ia209">;
|
|
def ia210 : NVPTXReg<"%ia210">;
|
|
def ia211 : NVPTXReg<"%ia211">;
|
|
def ia212 : NVPTXReg<"%ia212">;
|
|
def ia213 : NVPTXReg<"%ia213">;
|
|
def ia214 : NVPTXReg<"%ia214">;
|
|
def ia215 : NVPTXReg<"%ia215">;
|
|
def ia216 : NVPTXReg<"%ia216">;
|
|
def ia217 : NVPTXReg<"%ia217">;
|
|
def ia218 : NVPTXReg<"%ia218">;
|
|
def ia219 : NVPTXReg<"%ia219">;
|
|
def ia220 : NVPTXReg<"%ia220">;
|
|
def ia221 : NVPTXReg<"%ia221">;
|
|
def ia222 : NVPTXReg<"%ia222">;
|
|
def ia223 : NVPTXReg<"%ia223">;
|
|
def ia224 : NVPTXReg<"%ia224">;
|
|
def ia225 : NVPTXReg<"%ia225">;
|
|
def ia226 : NVPTXReg<"%ia226">;
|
|
def ia227 : NVPTXReg<"%ia227">;
|
|
def ia228 : NVPTXReg<"%ia228">;
|
|
def ia229 : NVPTXReg<"%ia229">;
|
|
def ia230 : NVPTXReg<"%ia230">;
|
|
def ia231 : NVPTXReg<"%ia231">;
|
|
def ia232 : NVPTXReg<"%ia232">;
|
|
def ia233 : NVPTXReg<"%ia233">;
|
|
def ia234 : NVPTXReg<"%ia234">;
|
|
def ia235 : NVPTXReg<"%ia235">;
|
|
def ia236 : NVPTXReg<"%ia236">;
|
|
def ia237 : NVPTXReg<"%ia237">;
|
|
def ia238 : NVPTXReg<"%ia238">;
|
|
def ia239 : NVPTXReg<"%ia239">;
|
|
def ia240 : NVPTXReg<"%ia240">;
|
|
def ia241 : NVPTXReg<"%ia241">;
|
|
def ia242 : NVPTXReg<"%ia242">;
|
|
def ia243 : NVPTXReg<"%ia243">;
|
|
def ia244 : NVPTXReg<"%ia244">;
|
|
def ia245 : NVPTXReg<"%ia245">;
|
|
def ia246 : NVPTXReg<"%ia246">;
|
|
def ia247 : NVPTXReg<"%ia247">;
|
|
def ia248 : NVPTXReg<"%ia248">;
|
|
def ia249 : NVPTXReg<"%ia249">;
|
|
def ia250 : NVPTXReg<"%ia250">;
|
|
def ia251 : NVPTXReg<"%ia251">;
|
|
def ia252 : NVPTXReg<"%ia252">;
|
|
def ia253 : NVPTXReg<"%ia253">;
|
|
def ia254 : NVPTXReg<"%ia254">;
|
|
def ia255 : NVPTXReg<"%ia255">;
|
|
def ia256 : NVPTXReg<"%ia256">;
|
|
def ia257 : NVPTXReg<"%ia257">;
|
|
def ia258 : NVPTXReg<"%ia258">;
|
|
def ia259 : NVPTXReg<"%ia259">;
|
|
def ia260 : NVPTXReg<"%ia260">;
|
|
def ia261 : NVPTXReg<"%ia261">;
|
|
def ia262 : NVPTXReg<"%ia262">;
|
|
def ia263 : NVPTXReg<"%ia263">;
|
|
def ia264 : NVPTXReg<"%ia264">;
|
|
def ia265 : NVPTXReg<"%ia265">;
|
|
def ia266 : NVPTXReg<"%ia266">;
|
|
def ia267 : NVPTXReg<"%ia267">;
|
|
def ia268 : NVPTXReg<"%ia268">;
|
|
def ia269 : NVPTXReg<"%ia269">;
|
|
def ia270 : NVPTXReg<"%ia270">;
|
|
def ia271 : NVPTXReg<"%ia271">;
|
|
def ia272 : NVPTXReg<"%ia272">;
|
|
def ia273 : NVPTXReg<"%ia273">;
|
|
def ia274 : NVPTXReg<"%ia274">;
|
|
def ia275 : NVPTXReg<"%ia275">;
|
|
def ia276 : NVPTXReg<"%ia276">;
|
|
def ia277 : NVPTXReg<"%ia277">;
|
|
def ia278 : NVPTXReg<"%ia278">;
|
|
def ia279 : NVPTXReg<"%ia279">;
|
|
def ia280 : NVPTXReg<"%ia280">;
|
|
def ia281 : NVPTXReg<"%ia281">;
|
|
def ia282 : NVPTXReg<"%ia282">;
|
|
def ia283 : NVPTXReg<"%ia283">;
|
|
def ia284 : NVPTXReg<"%ia284">;
|
|
def ia285 : NVPTXReg<"%ia285">;
|
|
def ia286 : NVPTXReg<"%ia286">;
|
|
def ia287 : NVPTXReg<"%ia287">;
|
|
def ia288 : NVPTXReg<"%ia288">;
|
|
def ia289 : NVPTXReg<"%ia289">;
|
|
def ia290 : NVPTXReg<"%ia290">;
|
|
def ia291 : NVPTXReg<"%ia291">;
|
|
def ia292 : NVPTXReg<"%ia292">;
|
|
def ia293 : NVPTXReg<"%ia293">;
|
|
def ia294 : NVPTXReg<"%ia294">;
|
|
def ia295 : NVPTXReg<"%ia295">;
|
|
def ia296 : NVPTXReg<"%ia296">;
|
|
def ia297 : NVPTXReg<"%ia297">;
|
|
def ia298 : NVPTXReg<"%ia298">;
|
|
def ia299 : NVPTXReg<"%ia299">;
|
|
def ia300 : NVPTXReg<"%ia300">;
|
|
def ia301 : NVPTXReg<"%ia301">;
|
|
def ia302 : NVPTXReg<"%ia302">;
|
|
def ia303 : NVPTXReg<"%ia303">;
|
|
def ia304 : NVPTXReg<"%ia304">;
|
|
def ia305 : NVPTXReg<"%ia305">;
|
|
def ia306 : NVPTXReg<"%ia306">;
|
|
def ia307 : NVPTXReg<"%ia307">;
|
|
def ia308 : NVPTXReg<"%ia308">;
|
|
def ia309 : NVPTXReg<"%ia309">;
|
|
def ia310 : NVPTXReg<"%ia310">;
|
|
def ia311 : NVPTXReg<"%ia311">;
|
|
def ia312 : NVPTXReg<"%ia312">;
|
|
def ia313 : NVPTXReg<"%ia313">;
|
|
def ia314 : NVPTXReg<"%ia314">;
|
|
def ia315 : NVPTXReg<"%ia315">;
|
|
def ia316 : NVPTXReg<"%ia316">;
|
|
def ia317 : NVPTXReg<"%ia317">;
|
|
def ia318 : NVPTXReg<"%ia318">;
|
|
def ia319 : NVPTXReg<"%ia319">;
|
|
def ia320 : NVPTXReg<"%ia320">;
|
|
def ia321 : NVPTXReg<"%ia321">;
|
|
def ia322 : NVPTXReg<"%ia322">;
|
|
def ia323 : NVPTXReg<"%ia323">;
|
|
def ia324 : NVPTXReg<"%ia324">;
|
|
def ia325 : NVPTXReg<"%ia325">;
|
|
def ia326 : NVPTXReg<"%ia326">;
|
|
def ia327 : NVPTXReg<"%ia327">;
|
|
def ia328 : NVPTXReg<"%ia328">;
|
|
def ia329 : NVPTXReg<"%ia329">;
|
|
def ia330 : NVPTXReg<"%ia330">;
|
|
def ia331 : NVPTXReg<"%ia331">;
|
|
def ia332 : NVPTXReg<"%ia332">;
|
|
def ia333 : NVPTXReg<"%ia333">;
|
|
def ia334 : NVPTXReg<"%ia334">;
|
|
def ia335 : NVPTXReg<"%ia335">;
|
|
def ia336 : NVPTXReg<"%ia336">;
|
|
def ia337 : NVPTXReg<"%ia337">;
|
|
def ia338 : NVPTXReg<"%ia338">;
|
|
def ia339 : NVPTXReg<"%ia339">;
|
|
def ia340 : NVPTXReg<"%ia340">;
|
|
def ia341 : NVPTXReg<"%ia341">;
|
|
def ia342 : NVPTXReg<"%ia342">;
|
|
def ia343 : NVPTXReg<"%ia343">;
|
|
def ia344 : NVPTXReg<"%ia344">;
|
|
def ia345 : NVPTXReg<"%ia345">;
|
|
def ia346 : NVPTXReg<"%ia346">;
|
|
def ia347 : NVPTXReg<"%ia347">;
|
|
def ia348 : NVPTXReg<"%ia348">;
|
|
def ia349 : NVPTXReg<"%ia349">;
|
|
def ia350 : NVPTXReg<"%ia350">;
|
|
def ia351 : NVPTXReg<"%ia351">;
|
|
def ia352 : NVPTXReg<"%ia352">;
|
|
def ia353 : NVPTXReg<"%ia353">;
|
|
def ia354 : NVPTXReg<"%ia354">;
|
|
def ia355 : NVPTXReg<"%ia355">;
|
|
def ia356 : NVPTXReg<"%ia356">;
|
|
def ia357 : NVPTXReg<"%ia357">;
|
|
def ia358 : NVPTXReg<"%ia358">;
|
|
def ia359 : NVPTXReg<"%ia359">;
|
|
def ia360 : NVPTXReg<"%ia360">;
|
|
def ia361 : NVPTXReg<"%ia361">;
|
|
def ia362 : NVPTXReg<"%ia362">;
|
|
def ia363 : NVPTXReg<"%ia363">;
|
|
def ia364 : NVPTXReg<"%ia364">;
|
|
def ia365 : NVPTXReg<"%ia365">;
|
|
def ia366 : NVPTXReg<"%ia366">;
|
|
def ia367 : NVPTXReg<"%ia367">;
|
|
def ia368 : NVPTXReg<"%ia368">;
|
|
def ia369 : NVPTXReg<"%ia369">;
|
|
def ia370 : NVPTXReg<"%ia370">;
|
|
def ia371 : NVPTXReg<"%ia371">;
|
|
def ia372 : NVPTXReg<"%ia372">;
|
|
def ia373 : NVPTXReg<"%ia373">;
|
|
def ia374 : NVPTXReg<"%ia374">;
|
|
def ia375 : NVPTXReg<"%ia375">;
|
|
def ia376 : NVPTXReg<"%ia376">;
|
|
def ia377 : NVPTXReg<"%ia377">;
|
|
def ia378 : NVPTXReg<"%ia378">;
|
|
def ia379 : NVPTXReg<"%ia379">;
|
|
def ia380 : NVPTXReg<"%ia380">;
|
|
def ia381 : NVPTXReg<"%ia381">;
|
|
def ia382 : NVPTXReg<"%ia382">;
|
|
def ia383 : NVPTXReg<"%ia383">;
|
|
def ia384 : NVPTXReg<"%ia384">;
|
|
def ia385 : NVPTXReg<"%ia385">;
|
|
def ia386 : NVPTXReg<"%ia386">;
|
|
def ia387 : NVPTXReg<"%ia387">;
|
|
def ia388 : NVPTXReg<"%ia388">;
|
|
def ia389 : NVPTXReg<"%ia389">;
|
|
def ia390 : NVPTXReg<"%ia390">;
|
|
def ia391 : NVPTXReg<"%ia391">;
|
|
def ia392 : NVPTXReg<"%ia392">;
|
|
def ia393 : NVPTXReg<"%ia393">;
|
|
def ia394 : NVPTXReg<"%ia394">;
|
|
def ia395 : NVPTXReg<"%ia395">;
|
|
def la0 : NVPTXReg<"%la0">;
|
|
def la1 : NVPTXReg<"%la1">;
|
|
def la2 : NVPTXReg<"%la2">;
|
|
def la3 : NVPTXReg<"%la3">;
|
|
def la4 : NVPTXReg<"%la4">;
|
|
def la5 : NVPTXReg<"%la5">;
|
|
def la6 : NVPTXReg<"%la6">;
|
|
def la7 : NVPTXReg<"%la7">;
|
|
def la8 : NVPTXReg<"%la8">;
|
|
def la9 : NVPTXReg<"%la9">;
|
|
def la10 : NVPTXReg<"%la10">;
|
|
def la11 : NVPTXReg<"%la11">;
|
|
def la12 : NVPTXReg<"%la12">;
|
|
def la13 : NVPTXReg<"%la13">;
|
|
def la14 : NVPTXReg<"%la14">;
|
|
def la15 : NVPTXReg<"%la15">;
|
|
def la16 : NVPTXReg<"%la16">;
|
|
def la17 : NVPTXReg<"%la17">;
|
|
def la18 : NVPTXReg<"%la18">;
|
|
def la19 : NVPTXReg<"%la19">;
|
|
def la20 : NVPTXReg<"%la20">;
|
|
def la21 : NVPTXReg<"%la21">;
|
|
def la22 : NVPTXReg<"%la22">;
|
|
def la23 : NVPTXReg<"%la23">;
|
|
def la24 : NVPTXReg<"%la24">;
|
|
def la25 : NVPTXReg<"%la25">;
|
|
def la26 : NVPTXReg<"%la26">;
|
|
def la27 : NVPTXReg<"%la27">;
|
|
def la28 : NVPTXReg<"%la28">;
|
|
def la29 : NVPTXReg<"%la29">;
|
|
def la30 : NVPTXReg<"%la30">;
|
|
def la31 : NVPTXReg<"%la31">;
|
|
def la32 : NVPTXReg<"%la32">;
|
|
def la33 : NVPTXReg<"%la33">;
|
|
def la34 : NVPTXReg<"%la34">;
|
|
def la35 : NVPTXReg<"%la35">;
|
|
def la36 : NVPTXReg<"%la36">;
|
|
def la37 : NVPTXReg<"%la37">;
|
|
def la38 : NVPTXReg<"%la38">;
|
|
def la39 : NVPTXReg<"%la39">;
|
|
def la40 : NVPTXReg<"%la40">;
|
|
def la41 : NVPTXReg<"%la41">;
|
|
def la42 : NVPTXReg<"%la42">;
|
|
def la43 : NVPTXReg<"%la43">;
|
|
def la44 : NVPTXReg<"%la44">;
|
|
def la45 : NVPTXReg<"%la45">;
|
|
def la46 : NVPTXReg<"%la46">;
|
|
def la47 : NVPTXReg<"%la47">;
|
|
def la48 : NVPTXReg<"%la48">;
|
|
def la49 : NVPTXReg<"%la49">;
|
|
def la50 : NVPTXReg<"%la50">;
|
|
def la51 : NVPTXReg<"%la51">;
|
|
def la52 : NVPTXReg<"%la52">;
|
|
def la53 : NVPTXReg<"%la53">;
|
|
def la54 : NVPTXReg<"%la54">;
|
|
def la55 : NVPTXReg<"%la55">;
|
|
def la56 : NVPTXReg<"%la56">;
|
|
def la57 : NVPTXReg<"%la57">;
|
|
def la58 : NVPTXReg<"%la58">;
|
|
def la59 : NVPTXReg<"%la59">;
|
|
def la60 : NVPTXReg<"%la60">;
|
|
def la61 : NVPTXReg<"%la61">;
|
|
def la62 : NVPTXReg<"%la62">;
|
|
def la63 : NVPTXReg<"%la63">;
|
|
def la64 : NVPTXReg<"%la64">;
|
|
def la65 : NVPTXReg<"%la65">;
|
|
def la66 : NVPTXReg<"%la66">;
|
|
def la67 : NVPTXReg<"%la67">;
|
|
def la68 : NVPTXReg<"%la68">;
|
|
def la69 : NVPTXReg<"%la69">;
|
|
def la70 : NVPTXReg<"%la70">;
|
|
def la71 : NVPTXReg<"%la71">;
|
|
def la72 : NVPTXReg<"%la72">;
|
|
def la73 : NVPTXReg<"%la73">;
|
|
def la74 : NVPTXReg<"%la74">;
|
|
def la75 : NVPTXReg<"%la75">;
|
|
def la76 : NVPTXReg<"%la76">;
|
|
def la77 : NVPTXReg<"%la77">;
|
|
def la78 : NVPTXReg<"%la78">;
|
|
def la79 : NVPTXReg<"%la79">;
|
|
def la80 : NVPTXReg<"%la80">;
|
|
def la81 : NVPTXReg<"%la81">;
|
|
def la82 : NVPTXReg<"%la82">;
|
|
def la83 : NVPTXReg<"%la83">;
|
|
def la84 : NVPTXReg<"%la84">;
|
|
def la85 : NVPTXReg<"%la85">;
|
|
def la86 : NVPTXReg<"%la86">;
|
|
def la87 : NVPTXReg<"%la87">;
|
|
def la88 : NVPTXReg<"%la88">;
|
|
def la89 : NVPTXReg<"%la89">;
|
|
def la90 : NVPTXReg<"%la90">;
|
|
def la91 : NVPTXReg<"%la91">;
|
|
def la92 : NVPTXReg<"%la92">;
|
|
def la93 : NVPTXReg<"%la93">;
|
|
def la94 : NVPTXReg<"%la94">;
|
|
def la95 : NVPTXReg<"%la95">;
|
|
def la96 : NVPTXReg<"%la96">;
|
|
def la97 : NVPTXReg<"%la97">;
|
|
def la98 : NVPTXReg<"%la98">;
|
|
def la99 : NVPTXReg<"%la99">;
|
|
def la100 : NVPTXReg<"%la100">;
|
|
def la101 : NVPTXReg<"%la101">;
|
|
def la102 : NVPTXReg<"%la102">;
|
|
def la103 : NVPTXReg<"%la103">;
|
|
def la104 : NVPTXReg<"%la104">;
|
|
def la105 : NVPTXReg<"%la105">;
|
|
def la106 : NVPTXReg<"%la106">;
|
|
def la107 : NVPTXReg<"%la107">;
|
|
def la108 : NVPTXReg<"%la108">;
|
|
def la109 : NVPTXReg<"%la109">;
|
|
def la110 : NVPTXReg<"%la110">;
|
|
def la111 : NVPTXReg<"%la111">;
|
|
def la112 : NVPTXReg<"%la112">;
|
|
def la113 : NVPTXReg<"%la113">;
|
|
def la114 : NVPTXReg<"%la114">;
|
|
def la115 : NVPTXReg<"%la115">;
|
|
def la116 : NVPTXReg<"%la116">;
|
|
def la117 : NVPTXReg<"%la117">;
|
|
def la118 : NVPTXReg<"%la118">;
|
|
def la119 : NVPTXReg<"%la119">;
|
|
def la120 : NVPTXReg<"%la120">;
|
|
def la121 : NVPTXReg<"%la121">;
|
|
def la122 : NVPTXReg<"%la122">;
|
|
def la123 : NVPTXReg<"%la123">;
|
|
def la124 : NVPTXReg<"%la124">;
|
|
def la125 : NVPTXReg<"%la125">;
|
|
def la126 : NVPTXReg<"%la126">;
|
|
def la127 : NVPTXReg<"%la127">;
|
|
def la128 : NVPTXReg<"%la128">;
|
|
def la129 : NVPTXReg<"%la129">;
|
|
def la130 : NVPTXReg<"%la130">;
|
|
def la131 : NVPTXReg<"%la131">;
|
|
def la132 : NVPTXReg<"%la132">;
|
|
def la133 : NVPTXReg<"%la133">;
|
|
def la134 : NVPTXReg<"%la134">;
|
|
def la135 : NVPTXReg<"%la135">;
|
|
def la136 : NVPTXReg<"%la136">;
|
|
def la137 : NVPTXReg<"%la137">;
|
|
def la138 : NVPTXReg<"%la138">;
|
|
def la139 : NVPTXReg<"%la139">;
|
|
def la140 : NVPTXReg<"%la140">;
|
|
def la141 : NVPTXReg<"%la141">;
|
|
def la142 : NVPTXReg<"%la142">;
|
|
def la143 : NVPTXReg<"%la143">;
|
|
def la144 : NVPTXReg<"%la144">;
|
|
def la145 : NVPTXReg<"%la145">;
|
|
def la146 : NVPTXReg<"%la146">;
|
|
def la147 : NVPTXReg<"%la147">;
|
|
def la148 : NVPTXReg<"%la148">;
|
|
def la149 : NVPTXReg<"%la149">;
|
|
def la150 : NVPTXReg<"%la150">;
|
|
def la151 : NVPTXReg<"%la151">;
|
|
def la152 : NVPTXReg<"%la152">;
|
|
def la153 : NVPTXReg<"%la153">;
|
|
def la154 : NVPTXReg<"%la154">;
|
|
def la155 : NVPTXReg<"%la155">;
|
|
def la156 : NVPTXReg<"%la156">;
|
|
def la157 : NVPTXReg<"%la157">;
|
|
def la158 : NVPTXReg<"%la158">;
|
|
def la159 : NVPTXReg<"%la159">;
|
|
def la160 : NVPTXReg<"%la160">;
|
|
def la161 : NVPTXReg<"%la161">;
|
|
def la162 : NVPTXReg<"%la162">;
|
|
def la163 : NVPTXReg<"%la163">;
|
|
def la164 : NVPTXReg<"%la164">;
|
|
def la165 : NVPTXReg<"%la165">;
|
|
def la166 : NVPTXReg<"%la166">;
|
|
def la167 : NVPTXReg<"%la167">;
|
|
def la168 : NVPTXReg<"%la168">;
|
|
def la169 : NVPTXReg<"%la169">;
|
|
def la170 : NVPTXReg<"%la170">;
|
|
def la171 : NVPTXReg<"%la171">;
|
|
def la172 : NVPTXReg<"%la172">;
|
|
def la173 : NVPTXReg<"%la173">;
|
|
def la174 : NVPTXReg<"%la174">;
|
|
def la175 : NVPTXReg<"%la175">;
|
|
def la176 : NVPTXReg<"%la176">;
|
|
def la177 : NVPTXReg<"%la177">;
|
|
def la178 : NVPTXReg<"%la178">;
|
|
def la179 : NVPTXReg<"%la179">;
|
|
def la180 : NVPTXReg<"%la180">;
|
|
def la181 : NVPTXReg<"%la181">;
|
|
def la182 : NVPTXReg<"%la182">;
|
|
def la183 : NVPTXReg<"%la183">;
|
|
def la184 : NVPTXReg<"%la184">;
|
|
def la185 : NVPTXReg<"%la185">;
|
|
def la186 : NVPTXReg<"%la186">;
|
|
def la187 : NVPTXReg<"%la187">;
|
|
def la188 : NVPTXReg<"%la188">;
|
|
def la189 : NVPTXReg<"%la189">;
|
|
def la190 : NVPTXReg<"%la190">;
|
|
def la191 : NVPTXReg<"%la191">;
|
|
def la192 : NVPTXReg<"%la192">;
|
|
def la193 : NVPTXReg<"%la193">;
|
|
def la194 : NVPTXReg<"%la194">;
|
|
def la195 : NVPTXReg<"%la195">;
|
|
def la196 : NVPTXReg<"%la196">;
|
|
def la197 : NVPTXReg<"%la197">;
|
|
def la198 : NVPTXReg<"%la198">;
|
|
def la199 : NVPTXReg<"%la199">;
|
|
def la200 : NVPTXReg<"%la200">;
|
|
def la201 : NVPTXReg<"%la201">;
|
|
def la202 : NVPTXReg<"%la202">;
|
|
def la203 : NVPTXReg<"%la203">;
|
|
def la204 : NVPTXReg<"%la204">;
|
|
def la205 : NVPTXReg<"%la205">;
|
|
def la206 : NVPTXReg<"%la206">;
|
|
def la207 : NVPTXReg<"%la207">;
|
|
def la208 : NVPTXReg<"%la208">;
|
|
def la209 : NVPTXReg<"%la209">;
|
|
def la210 : NVPTXReg<"%la210">;
|
|
def la211 : NVPTXReg<"%la211">;
|
|
def la212 : NVPTXReg<"%la212">;
|
|
def la213 : NVPTXReg<"%la213">;
|
|
def la214 : NVPTXReg<"%la214">;
|
|
def la215 : NVPTXReg<"%la215">;
|
|
def la216 : NVPTXReg<"%la216">;
|
|
def la217 : NVPTXReg<"%la217">;
|
|
def la218 : NVPTXReg<"%la218">;
|
|
def la219 : NVPTXReg<"%la219">;
|
|
def la220 : NVPTXReg<"%la220">;
|
|
def la221 : NVPTXReg<"%la221">;
|
|
def la222 : NVPTXReg<"%la222">;
|
|
def la223 : NVPTXReg<"%la223">;
|
|
def la224 : NVPTXReg<"%la224">;
|
|
def la225 : NVPTXReg<"%la225">;
|
|
def la226 : NVPTXReg<"%la226">;
|
|
def la227 : NVPTXReg<"%la227">;
|
|
def la228 : NVPTXReg<"%la228">;
|
|
def la229 : NVPTXReg<"%la229">;
|
|
def la230 : NVPTXReg<"%la230">;
|
|
def la231 : NVPTXReg<"%la231">;
|
|
def la232 : NVPTXReg<"%la232">;
|
|
def la233 : NVPTXReg<"%la233">;
|
|
def la234 : NVPTXReg<"%la234">;
|
|
def la235 : NVPTXReg<"%la235">;
|
|
def la236 : NVPTXReg<"%la236">;
|
|
def la237 : NVPTXReg<"%la237">;
|
|
def la238 : NVPTXReg<"%la238">;
|
|
def la239 : NVPTXReg<"%la239">;
|
|
def la240 : NVPTXReg<"%la240">;
|
|
def la241 : NVPTXReg<"%la241">;
|
|
def la242 : NVPTXReg<"%la242">;
|
|
def la243 : NVPTXReg<"%la243">;
|
|
def la244 : NVPTXReg<"%la244">;
|
|
def la245 : NVPTXReg<"%la245">;
|
|
def la246 : NVPTXReg<"%la246">;
|
|
def la247 : NVPTXReg<"%la247">;
|
|
def la248 : NVPTXReg<"%la248">;
|
|
def la249 : NVPTXReg<"%la249">;
|
|
def la250 : NVPTXReg<"%la250">;
|
|
def la251 : NVPTXReg<"%la251">;
|
|
def la252 : NVPTXReg<"%la252">;
|
|
def la253 : NVPTXReg<"%la253">;
|
|
def la254 : NVPTXReg<"%la254">;
|
|
def la255 : NVPTXReg<"%la255">;
|
|
def la256 : NVPTXReg<"%la256">;
|
|
def la257 : NVPTXReg<"%la257">;
|
|
def la258 : NVPTXReg<"%la258">;
|
|
def la259 : NVPTXReg<"%la259">;
|
|
def la260 : NVPTXReg<"%la260">;
|
|
def la261 : NVPTXReg<"%la261">;
|
|
def la262 : NVPTXReg<"%la262">;
|
|
def la263 : NVPTXReg<"%la263">;
|
|
def la264 : NVPTXReg<"%la264">;
|
|
def la265 : NVPTXReg<"%la265">;
|
|
def la266 : NVPTXReg<"%la266">;
|
|
def la267 : NVPTXReg<"%la267">;
|
|
def la268 : NVPTXReg<"%la268">;
|
|
def la269 : NVPTXReg<"%la269">;
|
|
def la270 : NVPTXReg<"%la270">;
|
|
def la271 : NVPTXReg<"%la271">;
|
|
def la272 : NVPTXReg<"%la272">;
|
|
def la273 : NVPTXReg<"%la273">;
|
|
def la274 : NVPTXReg<"%la274">;
|
|
def la275 : NVPTXReg<"%la275">;
|
|
def la276 : NVPTXReg<"%la276">;
|
|
def la277 : NVPTXReg<"%la277">;
|
|
def la278 : NVPTXReg<"%la278">;
|
|
def la279 : NVPTXReg<"%la279">;
|
|
def la280 : NVPTXReg<"%la280">;
|
|
def la281 : NVPTXReg<"%la281">;
|
|
def la282 : NVPTXReg<"%la282">;
|
|
def la283 : NVPTXReg<"%la283">;
|
|
def la284 : NVPTXReg<"%la284">;
|
|
def la285 : NVPTXReg<"%la285">;
|
|
def la286 : NVPTXReg<"%la286">;
|
|
def la287 : NVPTXReg<"%la287">;
|
|
def la288 : NVPTXReg<"%la288">;
|
|
def la289 : NVPTXReg<"%la289">;
|
|
def la290 : NVPTXReg<"%la290">;
|
|
def la291 : NVPTXReg<"%la291">;
|
|
def la292 : NVPTXReg<"%la292">;
|
|
def la293 : NVPTXReg<"%la293">;
|
|
def la294 : NVPTXReg<"%la294">;
|
|
def la295 : NVPTXReg<"%la295">;
|
|
def la296 : NVPTXReg<"%la296">;
|
|
def la297 : NVPTXReg<"%la297">;
|
|
def la298 : NVPTXReg<"%la298">;
|
|
def la299 : NVPTXReg<"%la299">;
|
|
def la300 : NVPTXReg<"%la300">;
|
|
def la301 : NVPTXReg<"%la301">;
|
|
def la302 : NVPTXReg<"%la302">;
|
|
def la303 : NVPTXReg<"%la303">;
|
|
def la304 : NVPTXReg<"%la304">;
|
|
def la305 : NVPTXReg<"%la305">;
|
|
def la306 : NVPTXReg<"%la306">;
|
|
def la307 : NVPTXReg<"%la307">;
|
|
def la308 : NVPTXReg<"%la308">;
|
|
def la309 : NVPTXReg<"%la309">;
|
|
def la310 : NVPTXReg<"%la310">;
|
|
def la311 : NVPTXReg<"%la311">;
|
|
def la312 : NVPTXReg<"%la312">;
|
|
def la313 : NVPTXReg<"%la313">;
|
|
def la314 : NVPTXReg<"%la314">;
|
|
def la315 : NVPTXReg<"%la315">;
|
|
def la316 : NVPTXReg<"%la316">;
|
|
def la317 : NVPTXReg<"%la317">;
|
|
def la318 : NVPTXReg<"%la318">;
|
|
def la319 : NVPTXReg<"%la319">;
|
|
def la320 : NVPTXReg<"%la320">;
|
|
def la321 : NVPTXReg<"%la321">;
|
|
def la322 : NVPTXReg<"%la322">;
|
|
def la323 : NVPTXReg<"%la323">;
|
|
def la324 : NVPTXReg<"%la324">;
|
|
def la325 : NVPTXReg<"%la325">;
|
|
def la326 : NVPTXReg<"%la326">;
|
|
def la327 : NVPTXReg<"%la327">;
|
|
def la328 : NVPTXReg<"%la328">;
|
|
def la329 : NVPTXReg<"%la329">;
|
|
def la330 : NVPTXReg<"%la330">;
|
|
def la331 : NVPTXReg<"%la331">;
|
|
def la332 : NVPTXReg<"%la332">;
|
|
def la333 : NVPTXReg<"%la333">;
|
|
def la334 : NVPTXReg<"%la334">;
|
|
def la335 : NVPTXReg<"%la335">;
|
|
def la336 : NVPTXReg<"%la336">;
|
|
def la337 : NVPTXReg<"%la337">;
|
|
def la338 : NVPTXReg<"%la338">;
|
|
def la339 : NVPTXReg<"%la339">;
|
|
def la340 : NVPTXReg<"%la340">;
|
|
def la341 : NVPTXReg<"%la341">;
|
|
def la342 : NVPTXReg<"%la342">;
|
|
def la343 : NVPTXReg<"%la343">;
|
|
def la344 : NVPTXReg<"%la344">;
|
|
def la345 : NVPTXReg<"%la345">;
|
|
def la346 : NVPTXReg<"%la346">;
|
|
def la347 : NVPTXReg<"%la347">;
|
|
def la348 : NVPTXReg<"%la348">;
|
|
def la349 : NVPTXReg<"%la349">;
|
|
def la350 : NVPTXReg<"%la350">;
|
|
def la351 : NVPTXReg<"%la351">;
|
|
def la352 : NVPTXReg<"%la352">;
|
|
def la353 : NVPTXReg<"%la353">;
|
|
def la354 : NVPTXReg<"%la354">;
|
|
def la355 : NVPTXReg<"%la355">;
|
|
def la356 : NVPTXReg<"%la356">;
|
|
def la357 : NVPTXReg<"%la357">;
|
|
def la358 : NVPTXReg<"%la358">;
|
|
def la359 : NVPTXReg<"%la359">;
|
|
def la360 : NVPTXReg<"%la360">;
|
|
def la361 : NVPTXReg<"%la361">;
|
|
def la362 : NVPTXReg<"%la362">;
|
|
def la363 : NVPTXReg<"%la363">;
|
|
def la364 : NVPTXReg<"%la364">;
|
|
def la365 : NVPTXReg<"%la365">;
|
|
def la366 : NVPTXReg<"%la366">;
|
|
def la367 : NVPTXReg<"%la367">;
|
|
def la368 : NVPTXReg<"%la368">;
|
|
def la369 : NVPTXReg<"%la369">;
|
|
def la370 : NVPTXReg<"%la370">;
|
|
def la371 : NVPTXReg<"%la371">;
|
|
def la372 : NVPTXReg<"%la372">;
|
|
def la373 : NVPTXReg<"%la373">;
|
|
def la374 : NVPTXReg<"%la374">;
|
|
def la375 : NVPTXReg<"%la375">;
|
|
def la376 : NVPTXReg<"%la376">;
|
|
def la377 : NVPTXReg<"%la377">;
|
|
def la378 : NVPTXReg<"%la378">;
|
|
def la379 : NVPTXReg<"%la379">;
|
|
def la380 : NVPTXReg<"%la380">;
|
|
def la381 : NVPTXReg<"%la381">;
|
|
def la382 : NVPTXReg<"%la382">;
|
|
def la383 : NVPTXReg<"%la383">;
|
|
def la384 : NVPTXReg<"%la384">;
|
|
def la385 : NVPTXReg<"%la385">;
|
|
def la386 : NVPTXReg<"%la386">;
|
|
def la387 : NVPTXReg<"%la387">;
|
|
def la388 : NVPTXReg<"%la388">;
|
|
def la389 : NVPTXReg<"%la389">;
|
|
def la390 : NVPTXReg<"%la390">;
|
|
def la391 : NVPTXReg<"%la391">;
|
|
def la392 : NVPTXReg<"%la392">;
|
|
def la393 : NVPTXReg<"%la393">;
|
|
def la394 : NVPTXReg<"%la394">;
|
|
def la395 : NVPTXReg<"%la395">;
|
|
def fa0 : NVPTXReg<"%fa0">;
|
|
def fa1 : NVPTXReg<"%fa1">;
|
|
def fa2 : NVPTXReg<"%fa2">;
|
|
def fa3 : NVPTXReg<"%fa3">;
|
|
def fa4 : NVPTXReg<"%fa4">;
|
|
def fa5 : NVPTXReg<"%fa5">;
|
|
def fa6 : NVPTXReg<"%fa6">;
|
|
def fa7 : NVPTXReg<"%fa7">;
|
|
def fa8 : NVPTXReg<"%fa8">;
|
|
def fa9 : NVPTXReg<"%fa9">;
|
|
def fa10 : NVPTXReg<"%fa10">;
|
|
def fa11 : NVPTXReg<"%fa11">;
|
|
def fa12 : NVPTXReg<"%fa12">;
|
|
def fa13 : NVPTXReg<"%fa13">;
|
|
def fa14 : NVPTXReg<"%fa14">;
|
|
def fa15 : NVPTXReg<"%fa15">;
|
|
def fa16 : NVPTXReg<"%fa16">;
|
|
def fa17 : NVPTXReg<"%fa17">;
|
|
def fa18 : NVPTXReg<"%fa18">;
|
|
def fa19 : NVPTXReg<"%fa19">;
|
|
def fa20 : NVPTXReg<"%fa20">;
|
|
def fa21 : NVPTXReg<"%fa21">;
|
|
def fa22 : NVPTXReg<"%fa22">;
|
|
def fa23 : NVPTXReg<"%fa23">;
|
|
def fa24 : NVPTXReg<"%fa24">;
|
|
def fa25 : NVPTXReg<"%fa25">;
|
|
def fa26 : NVPTXReg<"%fa26">;
|
|
def fa27 : NVPTXReg<"%fa27">;
|
|
def fa28 : NVPTXReg<"%fa28">;
|
|
def fa29 : NVPTXReg<"%fa29">;
|
|
def fa30 : NVPTXReg<"%fa30">;
|
|
def fa31 : NVPTXReg<"%fa31">;
|
|
def fa32 : NVPTXReg<"%fa32">;
|
|
def fa33 : NVPTXReg<"%fa33">;
|
|
def fa34 : NVPTXReg<"%fa34">;
|
|
def fa35 : NVPTXReg<"%fa35">;
|
|
def fa36 : NVPTXReg<"%fa36">;
|
|
def fa37 : NVPTXReg<"%fa37">;
|
|
def fa38 : NVPTXReg<"%fa38">;
|
|
def fa39 : NVPTXReg<"%fa39">;
|
|
def fa40 : NVPTXReg<"%fa40">;
|
|
def fa41 : NVPTXReg<"%fa41">;
|
|
def fa42 : NVPTXReg<"%fa42">;
|
|
def fa43 : NVPTXReg<"%fa43">;
|
|
def fa44 : NVPTXReg<"%fa44">;
|
|
def fa45 : NVPTXReg<"%fa45">;
|
|
def fa46 : NVPTXReg<"%fa46">;
|
|
def fa47 : NVPTXReg<"%fa47">;
|
|
def fa48 : NVPTXReg<"%fa48">;
|
|
def fa49 : NVPTXReg<"%fa49">;
|
|
def fa50 : NVPTXReg<"%fa50">;
|
|
def fa51 : NVPTXReg<"%fa51">;
|
|
def fa52 : NVPTXReg<"%fa52">;
|
|
def fa53 : NVPTXReg<"%fa53">;
|
|
def fa54 : NVPTXReg<"%fa54">;
|
|
def fa55 : NVPTXReg<"%fa55">;
|
|
def fa56 : NVPTXReg<"%fa56">;
|
|
def fa57 : NVPTXReg<"%fa57">;
|
|
def fa58 : NVPTXReg<"%fa58">;
|
|
def fa59 : NVPTXReg<"%fa59">;
|
|
def fa60 : NVPTXReg<"%fa60">;
|
|
def fa61 : NVPTXReg<"%fa61">;
|
|
def fa62 : NVPTXReg<"%fa62">;
|
|
def fa63 : NVPTXReg<"%fa63">;
|
|
def fa64 : NVPTXReg<"%fa64">;
|
|
def fa65 : NVPTXReg<"%fa65">;
|
|
def fa66 : NVPTXReg<"%fa66">;
|
|
def fa67 : NVPTXReg<"%fa67">;
|
|
def fa68 : NVPTXReg<"%fa68">;
|
|
def fa69 : NVPTXReg<"%fa69">;
|
|
def fa70 : NVPTXReg<"%fa70">;
|
|
def fa71 : NVPTXReg<"%fa71">;
|
|
def fa72 : NVPTXReg<"%fa72">;
|
|
def fa73 : NVPTXReg<"%fa73">;
|
|
def fa74 : NVPTXReg<"%fa74">;
|
|
def fa75 : NVPTXReg<"%fa75">;
|
|
def fa76 : NVPTXReg<"%fa76">;
|
|
def fa77 : NVPTXReg<"%fa77">;
|
|
def fa78 : NVPTXReg<"%fa78">;
|
|
def fa79 : NVPTXReg<"%fa79">;
|
|
def fa80 : NVPTXReg<"%fa80">;
|
|
def fa81 : NVPTXReg<"%fa81">;
|
|
def fa82 : NVPTXReg<"%fa82">;
|
|
def fa83 : NVPTXReg<"%fa83">;
|
|
def fa84 : NVPTXReg<"%fa84">;
|
|
def fa85 : NVPTXReg<"%fa85">;
|
|
def fa86 : NVPTXReg<"%fa86">;
|
|
def fa87 : NVPTXReg<"%fa87">;
|
|
def fa88 : NVPTXReg<"%fa88">;
|
|
def fa89 : NVPTXReg<"%fa89">;
|
|
def fa90 : NVPTXReg<"%fa90">;
|
|
def fa91 : NVPTXReg<"%fa91">;
|
|
def fa92 : NVPTXReg<"%fa92">;
|
|
def fa93 : NVPTXReg<"%fa93">;
|
|
def fa94 : NVPTXReg<"%fa94">;
|
|
def fa95 : NVPTXReg<"%fa95">;
|
|
def fa96 : NVPTXReg<"%fa96">;
|
|
def fa97 : NVPTXReg<"%fa97">;
|
|
def fa98 : NVPTXReg<"%fa98">;
|
|
def fa99 : NVPTXReg<"%fa99">;
|
|
def fa100 : NVPTXReg<"%fa100">;
|
|
def fa101 : NVPTXReg<"%fa101">;
|
|
def fa102 : NVPTXReg<"%fa102">;
|
|
def fa103 : NVPTXReg<"%fa103">;
|
|
def fa104 : NVPTXReg<"%fa104">;
|
|
def fa105 : NVPTXReg<"%fa105">;
|
|
def fa106 : NVPTXReg<"%fa106">;
|
|
def fa107 : NVPTXReg<"%fa107">;
|
|
def fa108 : NVPTXReg<"%fa108">;
|
|
def fa109 : NVPTXReg<"%fa109">;
|
|
def fa110 : NVPTXReg<"%fa110">;
|
|
def fa111 : NVPTXReg<"%fa111">;
|
|
def fa112 : NVPTXReg<"%fa112">;
|
|
def fa113 : NVPTXReg<"%fa113">;
|
|
def fa114 : NVPTXReg<"%fa114">;
|
|
def fa115 : NVPTXReg<"%fa115">;
|
|
def fa116 : NVPTXReg<"%fa116">;
|
|
def fa117 : NVPTXReg<"%fa117">;
|
|
def fa118 : NVPTXReg<"%fa118">;
|
|
def fa119 : NVPTXReg<"%fa119">;
|
|
def fa120 : NVPTXReg<"%fa120">;
|
|
def fa121 : NVPTXReg<"%fa121">;
|
|
def fa122 : NVPTXReg<"%fa122">;
|
|
def fa123 : NVPTXReg<"%fa123">;
|
|
def fa124 : NVPTXReg<"%fa124">;
|
|
def fa125 : NVPTXReg<"%fa125">;
|
|
def fa126 : NVPTXReg<"%fa126">;
|
|
def fa127 : NVPTXReg<"%fa127">;
|
|
def fa128 : NVPTXReg<"%fa128">;
|
|
def fa129 : NVPTXReg<"%fa129">;
|
|
def fa130 : NVPTXReg<"%fa130">;
|
|
def fa131 : NVPTXReg<"%fa131">;
|
|
def fa132 : NVPTXReg<"%fa132">;
|
|
def fa133 : NVPTXReg<"%fa133">;
|
|
def fa134 : NVPTXReg<"%fa134">;
|
|
def fa135 : NVPTXReg<"%fa135">;
|
|
def fa136 : NVPTXReg<"%fa136">;
|
|
def fa137 : NVPTXReg<"%fa137">;
|
|
def fa138 : NVPTXReg<"%fa138">;
|
|
def fa139 : NVPTXReg<"%fa139">;
|
|
def fa140 : NVPTXReg<"%fa140">;
|
|
def fa141 : NVPTXReg<"%fa141">;
|
|
def fa142 : NVPTXReg<"%fa142">;
|
|
def fa143 : NVPTXReg<"%fa143">;
|
|
def fa144 : NVPTXReg<"%fa144">;
|
|
def fa145 : NVPTXReg<"%fa145">;
|
|
def fa146 : NVPTXReg<"%fa146">;
|
|
def fa147 : NVPTXReg<"%fa147">;
|
|
def fa148 : NVPTXReg<"%fa148">;
|
|
def fa149 : NVPTXReg<"%fa149">;
|
|
def fa150 : NVPTXReg<"%fa150">;
|
|
def fa151 : NVPTXReg<"%fa151">;
|
|
def fa152 : NVPTXReg<"%fa152">;
|
|
def fa153 : NVPTXReg<"%fa153">;
|
|
def fa154 : NVPTXReg<"%fa154">;
|
|
def fa155 : NVPTXReg<"%fa155">;
|
|
def fa156 : NVPTXReg<"%fa156">;
|
|
def fa157 : NVPTXReg<"%fa157">;
|
|
def fa158 : NVPTXReg<"%fa158">;
|
|
def fa159 : NVPTXReg<"%fa159">;
|
|
def fa160 : NVPTXReg<"%fa160">;
|
|
def fa161 : NVPTXReg<"%fa161">;
|
|
def fa162 : NVPTXReg<"%fa162">;
|
|
def fa163 : NVPTXReg<"%fa163">;
|
|
def fa164 : NVPTXReg<"%fa164">;
|
|
def fa165 : NVPTXReg<"%fa165">;
|
|
def fa166 : NVPTXReg<"%fa166">;
|
|
def fa167 : NVPTXReg<"%fa167">;
|
|
def fa168 : NVPTXReg<"%fa168">;
|
|
def fa169 : NVPTXReg<"%fa169">;
|
|
def fa170 : NVPTXReg<"%fa170">;
|
|
def fa171 : NVPTXReg<"%fa171">;
|
|
def fa172 : NVPTXReg<"%fa172">;
|
|
def fa173 : NVPTXReg<"%fa173">;
|
|
def fa174 : NVPTXReg<"%fa174">;
|
|
def fa175 : NVPTXReg<"%fa175">;
|
|
def fa176 : NVPTXReg<"%fa176">;
|
|
def fa177 : NVPTXReg<"%fa177">;
|
|
def fa178 : NVPTXReg<"%fa178">;
|
|
def fa179 : NVPTXReg<"%fa179">;
|
|
def fa180 : NVPTXReg<"%fa180">;
|
|
def fa181 : NVPTXReg<"%fa181">;
|
|
def fa182 : NVPTXReg<"%fa182">;
|
|
def fa183 : NVPTXReg<"%fa183">;
|
|
def fa184 : NVPTXReg<"%fa184">;
|
|
def fa185 : NVPTXReg<"%fa185">;
|
|
def fa186 : NVPTXReg<"%fa186">;
|
|
def fa187 : NVPTXReg<"%fa187">;
|
|
def fa188 : NVPTXReg<"%fa188">;
|
|
def fa189 : NVPTXReg<"%fa189">;
|
|
def fa190 : NVPTXReg<"%fa190">;
|
|
def fa191 : NVPTXReg<"%fa191">;
|
|
def fa192 : NVPTXReg<"%fa192">;
|
|
def fa193 : NVPTXReg<"%fa193">;
|
|
def fa194 : NVPTXReg<"%fa194">;
|
|
def fa195 : NVPTXReg<"%fa195">;
|
|
def fa196 : NVPTXReg<"%fa196">;
|
|
def fa197 : NVPTXReg<"%fa197">;
|
|
def fa198 : NVPTXReg<"%fa198">;
|
|
def fa199 : NVPTXReg<"%fa199">;
|
|
def fa200 : NVPTXReg<"%fa200">;
|
|
def fa201 : NVPTXReg<"%fa201">;
|
|
def fa202 : NVPTXReg<"%fa202">;
|
|
def fa203 : NVPTXReg<"%fa203">;
|
|
def fa204 : NVPTXReg<"%fa204">;
|
|
def fa205 : NVPTXReg<"%fa205">;
|
|
def fa206 : NVPTXReg<"%fa206">;
|
|
def fa207 : NVPTXReg<"%fa207">;
|
|
def fa208 : NVPTXReg<"%fa208">;
|
|
def fa209 : NVPTXReg<"%fa209">;
|
|
def fa210 : NVPTXReg<"%fa210">;
|
|
def fa211 : NVPTXReg<"%fa211">;
|
|
def fa212 : NVPTXReg<"%fa212">;
|
|
def fa213 : NVPTXReg<"%fa213">;
|
|
def fa214 : NVPTXReg<"%fa214">;
|
|
def fa215 : NVPTXReg<"%fa215">;
|
|
def fa216 : NVPTXReg<"%fa216">;
|
|
def fa217 : NVPTXReg<"%fa217">;
|
|
def fa218 : NVPTXReg<"%fa218">;
|
|
def fa219 : NVPTXReg<"%fa219">;
|
|
def fa220 : NVPTXReg<"%fa220">;
|
|
def fa221 : NVPTXReg<"%fa221">;
|
|
def fa222 : NVPTXReg<"%fa222">;
|
|
def fa223 : NVPTXReg<"%fa223">;
|
|
def fa224 : NVPTXReg<"%fa224">;
|
|
def fa225 : NVPTXReg<"%fa225">;
|
|
def fa226 : NVPTXReg<"%fa226">;
|
|
def fa227 : NVPTXReg<"%fa227">;
|
|
def fa228 : NVPTXReg<"%fa228">;
|
|
def fa229 : NVPTXReg<"%fa229">;
|
|
def fa230 : NVPTXReg<"%fa230">;
|
|
def fa231 : NVPTXReg<"%fa231">;
|
|
def fa232 : NVPTXReg<"%fa232">;
|
|
def fa233 : NVPTXReg<"%fa233">;
|
|
def fa234 : NVPTXReg<"%fa234">;
|
|
def fa235 : NVPTXReg<"%fa235">;
|
|
def fa236 : NVPTXReg<"%fa236">;
|
|
def fa237 : NVPTXReg<"%fa237">;
|
|
def fa238 : NVPTXReg<"%fa238">;
|
|
def fa239 : NVPTXReg<"%fa239">;
|
|
def fa240 : NVPTXReg<"%fa240">;
|
|
def fa241 : NVPTXReg<"%fa241">;
|
|
def fa242 : NVPTXReg<"%fa242">;
|
|
def fa243 : NVPTXReg<"%fa243">;
|
|
def fa244 : NVPTXReg<"%fa244">;
|
|
def fa245 : NVPTXReg<"%fa245">;
|
|
def fa246 : NVPTXReg<"%fa246">;
|
|
def fa247 : NVPTXReg<"%fa247">;
|
|
def fa248 : NVPTXReg<"%fa248">;
|
|
def fa249 : NVPTXReg<"%fa249">;
|
|
def fa250 : NVPTXReg<"%fa250">;
|
|
def fa251 : NVPTXReg<"%fa251">;
|
|
def fa252 : NVPTXReg<"%fa252">;
|
|
def fa253 : NVPTXReg<"%fa253">;
|
|
def fa254 : NVPTXReg<"%fa254">;
|
|
def fa255 : NVPTXReg<"%fa255">;
|
|
def fa256 : NVPTXReg<"%fa256">;
|
|
def fa257 : NVPTXReg<"%fa257">;
|
|
def fa258 : NVPTXReg<"%fa258">;
|
|
def fa259 : NVPTXReg<"%fa259">;
|
|
def fa260 : NVPTXReg<"%fa260">;
|
|
def fa261 : NVPTXReg<"%fa261">;
|
|
def fa262 : NVPTXReg<"%fa262">;
|
|
def fa263 : NVPTXReg<"%fa263">;
|
|
def fa264 : NVPTXReg<"%fa264">;
|
|
def fa265 : NVPTXReg<"%fa265">;
|
|
def fa266 : NVPTXReg<"%fa266">;
|
|
def fa267 : NVPTXReg<"%fa267">;
|
|
def fa268 : NVPTXReg<"%fa268">;
|
|
def fa269 : NVPTXReg<"%fa269">;
|
|
def fa270 : NVPTXReg<"%fa270">;
|
|
def fa271 : NVPTXReg<"%fa271">;
|
|
def fa272 : NVPTXReg<"%fa272">;
|
|
def fa273 : NVPTXReg<"%fa273">;
|
|
def fa274 : NVPTXReg<"%fa274">;
|
|
def fa275 : NVPTXReg<"%fa275">;
|
|
def fa276 : NVPTXReg<"%fa276">;
|
|
def fa277 : NVPTXReg<"%fa277">;
|
|
def fa278 : NVPTXReg<"%fa278">;
|
|
def fa279 : NVPTXReg<"%fa279">;
|
|
def fa280 : NVPTXReg<"%fa280">;
|
|
def fa281 : NVPTXReg<"%fa281">;
|
|
def fa282 : NVPTXReg<"%fa282">;
|
|
def fa283 : NVPTXReg<"%fa283">;
|
|
def fa284 : NVPTXReg<"%fa284">;
|
|
def fa285 : NVPTXReg<"%fa285">;
|
|
def fa286 : NVPTXReg<"%fa286">;
|
|
def fa287 : NVPTXReg<"%fa287">;
|
|
def fa288 : NVPTXReg<"%fa288">;
|
|
def fa289 : NVPTXReg<"%fa289">;
|
|
def fa290 : NVPTXReg<"%fa290">;
|
|
def fa291 : NVPTXReg<"%fa291">;
|
|
def fa292 : NVPTXReg<"%fa292">;
|
|
def fa293 : NVPTXReg<"%fa293">;
|
|
def fa294 : NVPTXReg<"%fa294">;
|
|
def fa295 : NVPTXReg<"%fa295">;
|
|
def fa296 : NVPTXReg<"%fa296">;
|
|
def fa297 : NVPTXReg<"%fa297">;
|
|
def fa298 : NVPTXReg<"%fa298">;
|
|
def fa299 : NVPTXReg<"%fa299">;
|
|
def fa300 : NVPTXReg<"%fa300">;
|
|
def fa301 : NVPTXReg<"%fa301">;
|
|
def fa302 : NVPTXReg<"%fa302">;
|
|
def fa303 : NVPTXReg<"%fa303">;
|
|
def fa304 : NVPTXReg<"%fa304">;
|
|
def fa305 : NVPTXReg<"%fa305">;
|
|
def fa306 : NVPTXReg<"%fa306">;
|
|
def fa307 : NVPTXReg<"%fa307">;
|
|
def fa308 : NVPTXReg<"%fa308">;
|
|
def fa309 : NVPTXReg<"%fa309">;
|
|
def fa310 : NVPTXReg<"%fa310">;
|
|
def fa311 : NVPTXReg<"%fa311">;
|
|
def fa312 : NVPTXReg<"%fa312">;
|
|
def fa313 : NVPTXReg<"%fa313">;
|
|
def fa314 : NVPTXReg<"%fa314">;
|
|
def fa315 : NVPTXReg<"%fa315">;
|
|
def fa316 : NVPTXReg<"%fa316">;
|
|
def fa317 : NVPTXReg<"%fa317">;
|
|
def fa318 : NVPTXReg<"%fa318">;
|
|
def fa319 : NVPTXReg<"%fa319">;
|
|
def fa320 : NVPTXReg<"%fa320">;
|
|
def fa321 : NVPTXReg<"%fa321">;
|
|
def fa322 : NVPTXReg<"%fa322">;
|
|
def fa323 : NVPTXReg<"%fa323">;
|
|
def fa324 : NVPTXReg<"%fa324">;
|
|
def fa325 : NVPTXReg<"%fa325">;
|
|
def fa326 : NVPTXReg<"%fa326">;
|
|
def fa327 : NVPTXReg<"%fa327">;
|
|
def fa328 : NVPTXReg<"%fa328">;
|
|
def fa329 : NVPTXReg<"%fa329">;
|
|
def fa330 : NVPTXReg<"%fa330">;
|
|
def fa331 : NVPTXReg<"%fa331">;
|
|
def fa332 : NVPTXReg<"%fa332">;
|
|
def fa333 : NVPTXReg<"%fa333">;
|
|
def fa334 : NVPTXReg<"%fa334">;
|
|
def fa335 : NVPTXReg<"%fa335">;
|
|
def fa336 : NVPTXReg<"%fa336">;
|
|
def fa337 : NVPTXReg<"%fa337">;
|
|
def fa338 : NVPTXReg<"%fa338">;
|
|
def fa339 : NVPTXReg<"%fa339">;
|
|
def fa340 : NVPTXReg<"%fa340">;
|
|
def fa341 : NVPTXReg<"%fa341">;
|
|
def fa342 : NVPTXReg<"%fa342">;
|
|
def fa343 : NVPTXReg<"%fa343">;
|
|
def fa344 : NVPTXReg<"%fa344">;
|
|
def fa345 : NVPTXReg<"%fa345">;
|
|
def fa346 : NVPTXReg<"%fa346">;
|
|
def fa347 : NVPTXReg<"%fa347">;
|
|
def fa348 : NVPTXReg<"%fa348">;
|
|
def fa349 : NVPTXReg<"%fa349">;
|
|
def fa350 : NVPTXReg<"%fa350">;
|
|
def fa351 : NVPTXReg<"%fa351">;
|
|
def fa352 : NVPTXReg<"%fa352">;
|
|
def fa353 : NVPTXReg<"%fa353">;
|
|
def fa354 : NVPTXReg<"%fa354">;
|
|
def fa355 : NVPTXReg<"%fa355">;
|
|
def fa356 : NVPTXReg<"%fa356">;
|
|
def fa357 : NVPTXReg<"%fa357">;
|
|
def fa358 : NVPTXReg<"%fa358">;
|
|
def fa359 : NVPTXReg<"%fa359">;
|
|
def fa360 : NVPTXReg<"%fa360">;
|
|
def fa361 : NVPTXReg<"%fa361">;
|
|
def fa362 : NVPTXReg<"%fa362">;
|
|
def fa363 : NVPTXReg<"%fa363">;
|
|
def fa364 : NVPTXReg<"%fa364">;
|
|
def fa365 : NVPTXReg<"%fa365">;
|
|
def fa366 : NVPTXReg<"%fa366">;
|
|
def fa367 : NVPTXReg<"%fa367">;
|
|
def fa368 : NVPTXReg<"%fa368">;
|
|
def fa369 : NVPTXReg<"%fa369">;
|
|
def fa370 : NVPTXReg<"%fa370">;
|
|
def fa371 : NVPTXReg<"%fa371">;
|
|
def fa372 : NVPTXReg<"%fa372">;
|
|
def fa373 : NVPTXReg<"%fa373">;
|
|
def fa374 : NVPTXReg<"%fa374">;
|
|
def fa375 : NVPTXReg<"%fa375">;
|
|
def fa376 : NVPTXReg<"%fa376">;
|
|
def fa377 : NVPTXReg<"%fa377">;
|
|
def fa378 : NVPTXReg<"%fa378">;
|
|
def fa379 : NVPTXReg<"%fa379">;
|
|
def fa380 : NVPTXReg<"%fa380">;
|
|
def fa381 : NVPTXReg<"%fa381">;
|
|
def fa382 : NVPTXReg<"%fa382">;
|
|
def fa383 : NVPTXReg<"%fa383">;
|
|
def fa384 : NVPTXReg<"%fa384">;
|
|
def fa385 : NVPTXReg<"%fa385">;
|
|
def fa386 : NVPTXReg<"%fa386">;
|
|
def fa387 : NVPTXReg<"%fa387">;
|
|
def fa388 : NVPTXReg<"%fa388">;
|
|
def fa389 : NVPTXReg<"%fa389">;
|
|
def fa390 : NVPTXReg<"%fa390">;
|
|
def fa391 : NVPTXReg<"%fa391">;
|
|
def fa392 : NVPTXReg<"%fa392">;
|
|
def fa393 : NVPTXReg<"%fa393">;
|
|
def fa394 : NVPTXReg<"%fa394">;
|
|
def fa395 : NVPTXReg<"%fa395">;
|
|
def da0 : NVPTXReg<"%da0">;
|
|
def da1 : NVPTXReg<"%da1">;
|
|
def da2 : NVPTXReg<"%da2">;
|
|
def da3 : NVPTXReg<"%da3">;
|
|
def da4 : NVPTXReg<"%da4">;
|
|
def da5 : NVPTXReg<"%da5">;
|
|
def da6 : NVPTXReg<"%da6">;
|
|
def da7 : NVPTXReg<"%da7">;
|
|
def da8 : NVPTXReg<"%da8">;
|
|
def da9 : NVPTXReg<"%da9">;
|
|
def da10 : NVPTXReg<"%da10">;
|
|
def da11 : NVPTXReg<"%da11">;
|
|
def da12 : NVPTXReg<"%da12">;
|
|
def da13 : NVPTXReg<"%da13">;
|
|
def da14 : NVPTXReg<"%da14">;
|
|
def da15 : NVPTXReg<"%da15">;
|
|
def da16 : NVPTXReg<"%da16">;
|
|
def da17 : NVPTXReg<"%da17">;
|
|
def da18 : NVPTXReg<"%da18">;
|
|
def da19 : NVPTXReg<"%da19">;
|
|
def da20 : NVPTXReg<"%da20">;
|
|
def da21 : NVPTXReg<"%da21">;
|
|
def da22 : NVPTXReg<"%da22">;
|
|
def da23 : NVPTXReg<"%da23">;
|
|
def da24 : NVPTXReg<"%da24">;
|
|
def da25 : NVPTXReg<"%da25">;
|
|
def da26 : NVPTXReg<"%da26">;
|
|
def da27 : NVPTXReg<"%da27">;
|
|
def da28 : NVPTXReg<"%da28">;
|
|
def da29 : NVPTXReg<"%da29">;
|
|
def da30 : NVPTXReg<"%da30">;
|
|
def da31 : NVPTXReg<"%da31">;
|
|
def da32 : NVPTXReg<"%da32">;
|
|
def da33 : NVPTXReg<"%da33">;
|
|
def da34 : NVPTXReg<"%da34">;
|
|
def da35 : NVPTXReg<"%da35">;
|
|
def da36 : NVPTXReg<"%da36">;
|
|
def da37 : NVPTXReg<"%da37">;
|
|
def da38 : NVPTXReg<"%da38">;
|
|
def da39 : NVPTXReg<"%da39">;
|
|
def da40 : NVPTXReg<"%da40">;
|
|
def da41 : NVPTXReg<"%da41">;
|
|
def da42 : NVPTXReg<"%da42">;
|
|
def da43 : NVPTXReg<"%da43">;
|
|
def da44 : NVPTXReg<"%da44">;
|
|
def da45 : NVPTXReg<"%da45">;
|
|
def da46 : NVPTXReg<"%da46">;
|
|
def da47 : NVPTXReg<"%da47">;
|
|
def da48 : NVPTXReg<"%da48">;
|
|
def da49 : NVPTXReg<"%da49">;
|
|
def da50 : NVPTXReg<"%da50">;
|
|
def da51 : NVPTXReg<"%da51">;
|
|
def da52 : NVPTXReg<"%da52">;
|
|
def da53 : NVPTXReg<"%da53">;
|
|
def da54 : NVPTXReg<"%da54">;
|
|
def da55 : NVPTXReg<"%da55">;
|
|
def da56 : NVPTXReg<"%da56">;
|
|
def da57 : NVPTXReg<"%da57">;
|
|
def da58 : NVPTXReg<"%da58">;
|
|
def da59 : NVPTXReg<"%da59">;
|
|
def da60 : NVPTXReg<"%da60">;
|
|
def da61 : NVPTXReg<"%da61">;
|
|
def da62 : NVPTXReg<"%da62">;
|
|
def da63 : NVPTXReg<"%da63">;
|
|
def da64 : NVPTXReg<"%da64">;
|
|
def da65 : NVPTXReg<"%da65">;
|
|
def da66 : NVPTXReg<"%da66">;
|
|
def da67 : NVPTXReg<"%da67">;
|
|
def da68 : NVPTXReg<"%da68">;
|
|
def da69 : NVPTXReg<"%da69">;
|
|
def da70 : NVPTXReg<"%da70">;
|
|
def da71 : NVPTXReg<"%da71">;
|
|
def da72 : NVPTXReg<"%da72">;
|
|
def da73 : NVPTXReg<"%da73">;
|
|
def da74 : NVPTXReg<"%da74">;
|
|
def da75 : NVPTXReg<"%da75">;
|
|
def da76 : NVPTXReg<"%da76">;
|
|
def da77 : NVPTXReg<"%da77">;
|
|
def da78 : NVPTXReg<"%da78">;
|
|
def da79 : NVPTXReg<"%da79">;
|
|
def da80 : NVPTXReg<"%da80">;
|
|
def da81 : NVPTXReg<"%da81">;
|
|
def da82 : NVPTXReg<"%da82">;
|
|
def da83 : NVPTXReg<"%da83">;
|
|
def da84 : NVPTXReg<"%da84">;
|
|
def da85 : NVPTXReg<"%da85">;
|
|
def da86 : NVPTXReg<"%da86">;
|
|
def da87 : NVPTXReg<"%da87">;
|
|
def da88 : NVPTXReg<"%da88">;
|
|
def da89 : NVPTXReg<"%da89">;
|
|
def da90 : NVPTXReg<"%da90">;
|
|
def da91 : NVPTXReg<"%da91">;
|
|
def da92 : NVPTXReg<"%da92">;
|
|
def da93 : NVPTXReg<"%da93">;
|
|
def da94 : NVPTXReg<"%da94">;
|
|
def da95 : NVPTXReg<"%da95">;
|
|
def da96 : NVPTXReg<"%da96">;
|
|
def da97 : NVPTXReg<"%da97">;
|
|
def da98 : NVPTXReg<"%da98">;
|
|
def da99 : NVPTXReg<"%da99">;
|
|
def da100 : NVPTXReg<"%da100">;
|
|
def da101 : NVPTXReg<"%da101">;
|
|
def da102 : NVPTXReg<"%da102">;
|
|
def da103 : NVPTXReg<"%da103">;
|
|
def da104 : NVPTXReg<"%da104">;
|
|
def da105 : NVPTXReg<"%da105">;
|
|
def da106 : NVPTXReg<"%da106">;
|
|
def da107 : NVPTXReg<"%da107">;
|
|
def da108 : NVPTXReg<"%da108">;
|
|
def da109 : NVPTXReg<"%da109">;
|
|
def da110 : NVPTXReg<"%da110">;
|
|
def da111 : NVPTXReg<"%da111">;
|
|
def da112 : NVPTXReg<"%da112">;
|
|
def da113 : NVPTXReg<"%da113">;
|
|
def da114 : NVPTXReg<"%da114">;
|
|
def da115 : NVPTXReg<"%da115">;
|
|
def da116 : NVPTXReg<"%da116">;
|
|
def da117 : NVPTXReg<"%da117">;
|
|
def da118 : NVPTXReg<"%da118">;
|
|
def da119 : NVPTXReg<"%da119">;
|
|
def da120 : NVPTXReg<"%da120">;
|
|
def da121 : NVPTXReg<"%da121">;
|
|
def da122 : NVPTXReg<"%da122">;
|
|
def da123 : NVPTXReg<"%da123">;
|
|
def da124 : NVPTXReg<"%da124">;
|
|
def da125 : NVPTXReg<"%da125">;
|
|
def da126 : NVPTXReg<"%da126">;
|
|
def da127 : NVPTXReg<"%da127">;
|
|
def da128 : NVPTXReg<"%da128">;
|
|
def da129 : NVPTXReg<"%da129">;
|
|
def da130 : NVPTXReg<"%da130">;
|
|
def da131 : NVPTXReg<"%da131">;
|
|
def da132 : NVPTXReg<"%da132">;
|
|
def da133 : NVPTXReg<"%da133">;
|
|
def da134 : NVPTXReg<"%da134">;
|
|
def da135 : NVPTXReg<"%da135">;
|
|
def da136 : NVPTXReg<"%da136">;
|
|
def da137 : NVPTXReg<"%da137">;
|
|
def da138 : NVPTXReg<"%da138">;
|
|
def da139 : NVPTXReg<"%da139">;
|
|
def da140 : NVPTXReg<"%da140">;
|
|
def da141 : NVPTXReg<"%da141">;
|
|
def da142 : NVPTXReg<"%da142">;
|
|
def da143 : NVPTXReg<"%da143">;
|
|
def da144 : NVPTXReg<"%da144">;
|
|
def da145 : NVPTXReg<"%da145">;
|
|
def da146 : NVPTXReg<"%da146">;
|
|
def da147 : NVPTXReg<"%da147">;
|
|
def da148 : NVPTXReg<"%da148">;
|
|
def da149 : NVPTXReg<"%da149">;
|
|
def da150 : NVPTXReg<"%da150">;
|
|
def da151 : NVPTXReg<"%da151">;
|
|
def da152 : NVPTXReg<"%da152">;
|
|
def da153 : NVPTXReg<"%da153">;
|
|
def da154 : NVPTXReg<"%da154">;
|
|
def da155 : NVPTXReg<"%da155">;
|
|
def da156 : NVPTXReg<"%da156">;
|
|
def da157 : NVPTXReg<"%da157">;
|
|
def da158 : NVPTXReg<"%da158">;
|
|
def da159 : NVPTXReg<"%da159">;
|
|
def da160 : NVPTXReg<"%da160">;
|
|
def da161 : NVPTXReg<"%da161">;
|
|
def da162 : NVPTXReg<"%da162">;
|
|
def da163 : NVPTXReg<"%da163">;
|
|
def da164 : NVPTXReg<"%da164">;
|
|
def da165 : NVPTXReg<"%da165">;
|
|
def da166 : NVPTXReg<"%da166">;
|
|
def da167 : NVPTXReg<"%da167">;
|
|
def da168 : NVPTXReg<"%da168">;
|
|
def da169 : NVPTXReg<"%da169">;
|
|
def da170 : NVPTXReg<"%da170">;
|
|
def da171 : NVPTXReg<"%da171">;
|
|
def da172 : NVPTXReg<"%da172">;
|
|
def da173 : NVPTXReg<"%da173">;
|
|
def da174 : NVPTXReg<"%da174">;
|
|
def da175 : NVPTXReg<"%da175">;
|
|
def da176 : NVPTXReg<"%da176">;
|
|
def da177 : NVPTXReg<"%da177">;
|
|
def da178 : NVPTXReg<"%da178">;
|
|
def da179 : NVPTXReg<"%da179">;
|
|
def da180 : NVPTXReg<"%da180">;
|
|
def da181 : NVPTXReg<"%da181">;
|
|
def da182 : NVPTXReg<"%da182">;
|
|
def da183 : NVPTXReg<"%da183">;
|
|
def da184 : NVPTXReg<"%da184">;
|
|
def da185 : NVPTXReg<"%da185">;
|
|
def da186 : NVPTXReg<"%da186">;
|
|
def da187 : NVPTXReg<"%da187">;
|
|
def da188 : NVPTXReg<"%da188">;
|
|
def da189 : NVPTXReg<"%da189">;
|
|
def da190 : NVPTXReg<"%da190">;
|
|
def da191 : NVPTXReg<"%da191">;
|
|
def da192 : NVPTXReg<"%da192">;
|
|
def da193 : NVPTXReg<"%da193">;
|
|
def da194 : NVPTXReg<"%da194">;
|
|
def da195 : NVPTXReg<"%da195">;
|
|
def da196 : NVPTXReg<"%da196">;
|
|
def da197 : NVPTXReg<"%da197">;
|
|
def da198 : NVPTXReg<"%da198">;
|
|
def da199 : NVPTXReg<"%da199">;
|
|
def da200 : NVPTXReg<"%da200">;
|
|
def da201 : NVPTXReg<"%da201">;
|
|
def da202 : NVPTXReg<"%da202">;
|
|
def da203 : NVPTXReg<"%da203">;
|
|
def da204 : NVPTXReg<"%da204">;
|
|
def da205 : NVPTXReg<"%da205">;
|
|
def da206 : NVPTXReg<"%da206">;
|
|
def da207 : NVPTXReg<"%da207">;
|
|
def da208 : NVPTXReg<"%da208">;
|
|
def da209 : NVPTXReg<"%da209">;
|
|
def da210 : NVPTXReg<"%da210">;
|
|
def da211 : NVPTXReg<"%da211">;
|
|
def da212 : NVPTXReg<"%da212">;
|
|
def da213 : NVPTXReg<"%da213">;
|
|
def da214 : NVPTXReg<"%da214">;
|
|
def da215 : NVPTXReg<"%da215">;
|
|
def da216 : NVPTXReg<"%da216">;
|
|
def da217 : NVPTXReg<"%da217">;
|
|
def da218 : NVPTXReg<"%da218">;
|
|
def da219 : NVPTXReg<"%da219">;
|
|
def da220 : NVPTXReg<"%da220">;
|
|
def da221 : NVPTXReg<"%da221">;
|
|
def da222 : NVPTXReg<"%da222">;
|
|
def da223 : NVPTXReg<"%da223">;
|
|
def da224 : NVPTXReg<"%da224">;
|
|
def da225 : NVPTXReg<"%da225">;
|
|
def da226 : NVPTXReg<"%da226">;
|
|
def da227 : NVPTXReg<"%da227">;
|
|
def da228 : NVPTXReg<"%da228">;
|
|
def da229 : NVPTXReg<"%da229">;
|
|
def da230 : NVPTXReg<"%da230">;
|
|
def da231 : NVPTXReg<"%da231">;
|
|
def da232 : NVPTXReg<"%da232">;
|
|
def da233 : NVPTXReg<"%da233">;
|
|
def da234 : NVPTXReg<"%da234">;
|
|
def da235 : NVPTXReg<"%da235">;
|
|
def da236 : NVPTXReg<"%da236">;
|
|
def da237 : NVPTXReg<"%da237">;
|
|
def da238 : NVPTXReg<"%da238">;
|
|
def da239 : NVPTXReg<"%da239">;
|
|
def da240 : NVPTXReg<"%da240">;
|
|
def da241 : NVPTXReg<"%da241">;
|
|
def da242 : NVPTXReg<"%da242">;
|
|
def da243 : NVPTXReg<"%da243">;
|
|
def da244 : NVPTXReg<"%da244">;
|
|
def da245 : NVPTXReg<"%da245">;
|
|
def da246 : NVPTXReg<"%da246">;
|
|
def da247 : NVPTXReg<"%da247">;
|
|
def da248 : NVPTXReg<"%da248">;
|
|
def da249 : NVPTXReg<"%da249">;
|
|
def da250 : NVPTXReg<"%da250">;
|
|
def da251 : NVPTXReg<"%da251">;
|
|
def da252 : NVPTXReg<"%da252">;
|
|
def da253 : NVPTXReg<"%da253">;
|
|
def da254 : NVPTXReg<"%da254">;
|
|
def da255 : NVPTXReg<"%da255">;
|
|
def da256 : NVPTXReg<"%da256">;
|
|
def da257 : NVPTXReg<"%da257">;
|
|
def da258 : NVPTXReg<"%da258">;
|
|
def da259 : NVPTXReg<"%da259">;
|
|
def da260 : NVPTXReg<"%da260">;
|
|
def da261 : NVPTXReg<"%da261">;
|
|
def da262 : NVPTXReg<"%da262">;
|
|
def da263 : NVPTXReg<"%da263">;
|
|
def da264 : NVPTXReg<"%da264">;
|
|
def da265 : NVPTXReg<"%da265">;
|
|
def da266 : NVPTXReg<"%da266">;
|
|
def da267 : NVPTXReg<"%da267">;
|
|
def da268 : NVPTXReg<"%da268">;
|
|
def da269 : NVPTXReg<"%da269">;
|
|
def da270 : NVPTXReg<"%da270">;
|
|
def da271 : NVPTXReg<"%da271">;
|
|
def da272 : NVPTXReg<"%da272">;
|
|
def da273 : NVPTXReg<"%da273">;
|
|
def da274 : NVPTXReg<"%da274">;
|
|
def da275 : NVPTXReg<"%da275">;
|
|
def da276 : NVPTXReg<"%da276">;
|
|
def da277 : NVPTXReg<"%da277">;
|
|
def da278 : NVPTXReg<"%da278">;
|
|
def da279 : NVPTXReg<"%da279">;
|
|
def da280 : NVPTXReg<"%da280">;
|
|
def da281 : NVPTXReg<"%da281">;
|
|
def da282 : NVPTXReg<"%da282">;
|
|
def da283 : NVPTXReg<"%da283">;
|
|
def da284 : NVPTXReg<"%da284">;
|
|
def da285 : NVPTXReg<"%da285">;
|
|
def da286 : NVPTXReg<"%da286">;
|
|
def da287 : NVPTXReg<"%da287">;
|
|
def da288 : NVPTXReg<"%da288">;
|
|
def da289 : NVPTXReg<"%da289">;
|
|
def da290 : NVPTXReg<"%da290">;
|
|
def da291 : NVPTXReg<"%da291">;
|
|
def da292 : NVPTXReg<"%da292">;
|
|
def da293 : NVPTXReg<"%da293">;
|
|
def da294 : NVPTXReg<"%da294">;
|
|
def da295 : NVPTXReg<"%da295">;
|
|
def da296 : NVPTXReg<"%da296">;
|
|
def da297 : NVPTXReg<"%da297">;
|
|
def da298 : NVPTXReg<"%da298">;
|
|
def da299 : NVPTXReg<"%da299">;
|
|
def da300 : NVPTXReg<"%da300">;
|
|
def da301 : NVPTXReg<"%da301">;
|
|
def da302 : NVPTXReg<"%da302">;
|
|
def da303 : NVPTXReg<"%da303">;
|
|
def da304 : NVPTXReg<"%da304">;
|
|
def da305 : NVPTXReg<"%da305">;
|
|
def da306 : NVPTXReg<"%da306">;
|
|
def da307 : NVPTXReg<"%da307">;
|
|
def da308 : NVPTXReg<"%da308">;
|
|
def da309 : NVPTXReg<"%da309">;
|
|
def da310 : NVPTXReg<"%da310">;
|
|
def da311 : NVPTXReg<"%da311">;
|
|
def da312 : NVPTXReg<"%da312">;
|
|
def da313 : NVPTXReg<"%da313">;
|
|
def da314 : NVPTXReg<"%da314">;
|
|
def da315 : NVPTXReg<"%da315">;
|
|
def da316 : NVPTXReg<"%da316">;
|
|
def da317 : NVPTXReg<"%da317">;
|
|
def da318 : NVPTXReg<"%da318">;
|
|
def da319 : NVPTXReg<"%da319">;
|
|
def da320 : NVPTXReg<"%da320">;
|
|
def da321 : NVPTXReg<"%da321">;
|
|
def da322 : NVPTXReg<"%da322">;
|
|
def da323 : NVPTXReg<"%da323">;
|
|
def da324 : NVPTXReg<"%da324">;
|
|
def da325 : NVPTXReg<"%da325">;
|
|
def da326 : NVPTXReg<"%da326">;
|
|
def da327 : NVPTXReg<"%da327">;
|
|
def da328 : NVPTXReg<"%da328">;
|
|
def da329 : NVPTXReg<"%da329">;
|
|
def da330 : NVPTXReg<"%da330">;
|
|
def da331 : NVPTXReg<"%da331">;
|
|
def da332 : NVPTXReg<"%da332">;
|
|
def da333 : NVPTXReg<"%da333">;
|
|
def da334 : NVPTXReg<"%da334">;
|
|
def da335 : NVPTXReg<"%da335">;
|
|
def da336 : NVPTXReg<"%da336">;
|
|
def da337 : NVPTXReg<"%da337">;
|
|
def da338 : NVPTXReg<"%da338">;
|
|
def da339 : NVPTXReg<"%da339">;
|
|
def da340 : NVPTXReg<"%da340">;
|
|
def da341 : NVPTXReg<"%da341">;
|
|
def da342 : NVPTXReg<"%da342">;
|
|
def da343 : NVPTXReg<"%da343">;
|
|
def da344 : NVPTXReg<"%da344">;
|
|
def da345 : NVPTXReg<"%da345">;
|
|
def da346 : NVPTXReg<"%da346">;
|
|
def da347 : NVPTXReg<"%da347">;
|
|
def da348 : NVPTXReg<"%da348">;
|
|
def da349 : NVPTXReg<"%da349">;
|
|
def da350 : NVPTXReg<"%da350">;
|
|
def da351 : NVPTXReg<"%da351">;
|
|
def da352 : NVPTXReg<"%da352">;
|
|
def da353 : NVPTXReg<"%da353">;
|
|
def da354 : NVPTXReg<"%da354">;
|
|
def da355 : NVPTXReg<"%da355">;
|
|
def da356 : NVPTXReg<"%da356">;
|
|
def da357 : NVPTXReg<"%da357">;
|
|
def da358 : NVPTXReg<"%da358">;
|
|
def da359 : NVPTXReg<"%da359">;
|
|
def da360 : NVPTXReg<"%da360">;
|
|
def da361 : NVPTXReg<"%da361">;
|
|
def da362 : NVPTXReg<"%da362">;
|
|
def da363 : NVPTXReg<"%da363">;
|
|
def da364 : NVPTXReg<"%da364">;
|
|
def da365 : NVPTXReg<"%da365">;
|
|
def da366 : NVPTXReg<"%da366">;
|
|
def da367 : NVPTXReg<"%da367">;
|
|
def da368 : NVPTXReg<"%da368">;
|
|
def da369 : NVPTXReg<"%da369">;
|
|
def da370 : NVPTXReg<"%da370">;
|
|
def da371 : NVPTXReg<"%da371">;
|
|
def da372 : NVPTXReg<"%da372">;
|
|
def da373 : NVPTXReg<"%da373">;
|
|
def da374 : NVPTXReg<"%da374">;
|
|
def da375 : NVPTXReg<"%da375">;
|
|
def da376 : NVPTXReg<"%da376">;
|
|
def da377 : NVPTXReg<"%da377">;
|
|
def da378 : NVPTXReg<"%da378">;
|
|
def da379 : NVPTXReg<"%da379">;
|
|
def da380 : NVPTXReg<"%da380">;
|
|
def da381 : NVPTXReg<"%da381">;
|
|
def da382 : NVPTXReg<"%da382">;
|
|
def da383 : NVPTXReg<"%da383">;
|
|
def da384 : NVPTXReg<"%da384">;
|
|
def da385 : NVPTXReg<"%da385">;
|
|
def da386 : NVPTXReg<"%da386">;
|
|
def da387 : NVPTXReg<"%da387">;
|
|
def da388 : NVPTXReg<"%da388">;
|
|
def da389 : NVPTXReg<"%da389">;
|
|
def da390 : NVPTXReg<"%da390">;
|
|
def da391 : NVPTXReg<"%da391">;
|
|
def da392 : NVPTXReg<"%da392">;
|
|
def da393 : NVPTXReg<"%da393">;
|
|
def da394 : NVPTXReg<"%da394">;
|
|
def da395 : NVPTXReg<"%da395">;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Register classes
|
|
//===----------------------------------------------------------------------===//
|
|
def Int1Regs : NVPTXRegClass<[i1], 8, (add (sequence "P%u", 0, 395))>;
|
|
def Int8Regs : NVPTXRegClass<[i8], 8, (add (sequence "RC%u", 0, 395))>;
|
|
def Int16Regs : NVPTXRegClass<[i16], 16, (add (sequence "RS%u", 0, 395))>;
|
|
def Int32Regs : NVPTXRegClass<[i32], 32, (add (sequence "R%u", 0, 395))>;
|
|
def Int64Regs : NVPTXRegClass<[i64], 64, (add (sequence "RL%u", 0, 395))>;
|
|
def Float32Regs : NVPTXRegClass<[f32], 32, (add (sequence "F%u", 0, 395))>;
|
|
def Float64Regs : NVPTXRegClass<[f64], 64, (add (sequence "FL%u", 0, 395))>;
|
|
def Int32ArgRegs : NVPTXRegClass<[i32], 32, (add (sequence "ia%u", 0, 395))>;
|
|
def Int64ArgRegs : NVPTXRegClass<[i64], 64, (add (sequence "la%u", 0, 395))>;
|
|
def Float32ArgRegs : NVPTXRegClass<[f32], 32, (add (sequence "fa%u", 0, 395))>;
|
|
def Float64ArgRegs : NVPTXRegClass<[f64], 64, (add (sequence "da%u", 0, 395))>;
|
|
|
|
// Read NVPTXRegisterInfo.cpp to see how VRFrame and VRDepot are used.
|
|
def SpecialRegs : NVPTXRegClass<[i32], 32, (add VRFrame, VRDepot)>;
|
|
|
|
class NVPTXVecRegClass<list<ValueType> regTypes, int alignment, dag regList,
|
|
NVPTXRegClass sClass,
|
|
int e,
|
|
string n>
|
|
: NVPTXRegClass<regTypes, alignment, regList>
|
|
{
|
|
NVPTXRegClass scalarClass=sClass;
|
|
int elems=e;
|
|
string name=n;
|
|
}
|
|
def V2F32Regs
|
|
: NVPTXVecRegClass<[v2f32], 64, (add (sequence "v2b32_%u", 0, 395)),
|
|
Float32Regs, 2, ".v2.f32">;
|
|
def V4F32Regs
|
|
: NVPTXVecRegClass<[v4f32], 128, (add (sequence "v4b32_%u", 0, 395)),
|
|
Float32Regs, 4, ".v4.f32">;
|
|
def V2I32Regs
|
|
: NVPTXVecRegClass<[v2i32], 64, (add (sequence "v2b32_%u", 0, 395)),
|
|
Int32Regs, 2, ".v2.u32">;
|
|
def V4I32Regs
|
|
: NVPTXVecRegClass<[v4i32], 128, (add (sequence "v4b32_%u", 0, 395)),
|
|
Int32Regs, 4, ".v4.u32">;
|
|
def V2F64Regs
|
|
: NVPTXVecRegClass<[v2f64], 128, (add (sequence "v2b64_%u", 0, 395)),
|
|
Float64Regs, 2, ".v2.f64">;
|
|
def V2I64Regs
|
|
: NVPTXVecRegClass<[v2i64], 128, (add (sequence "v2b64_%u", 0, 395)),
|
|
Int64Regs, 2, ".v2.u64">;
|
|
def V2I16Regs
|
|
: NVPTXVecRegClass<[v2i16], 32, (add (sequence "v2b16_%u", 0, 395)),
|
|
Int16Regs, 2, ".v2.u16">;
|
|
def V4I16Regs
|
|
: NVPTXVecRegClass<[v4i16], 64, (add (sequence "v4b16_%u", 0, 395)),
|
|
Int16Regs, 4, ".v4.u16">;
|
|
def V2I8Regs
|
|
: NVPTXVecRegClass<[v2i8], 16, (add (sequence "v2b8_%u", 0, 395)),
|
|
Int8Regs, 2, ".v2.u8">;
|
|
def V4I8Regs
|
|
: NVPTXVecRegClass<[v4i8], 32, (add (sequence "v4b8_%u", 0, 395)),
|
|
Int8Regs, 4, ".v4.u8">;
|