llvm-6502/test/CodeGen
Daniel Sanders 6ff1ef9931 [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. not intrinsics)
This required correcting the definition of the bins[lr]i intrinsics because
the result is also the first operand.

It also required removing the (arbitrary) check for 32-bit immediates in
MipsSEDAGToDAGISel::selectVSplat().

Currently using binsli.d with 2 bits set in the mask doesn't select binsli.d
because the constant is legalized into a ConstantPool. Similar things can
happen with binsri.d with more than 10 bits set in the mask. The resulting
code when this happens is correct but not optimal.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193687 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 14:45:14 +00:00
..
AArch64 add test cases for frameaddr and returnaddr for aarch64 2013-10-29 17:01:29 +00:00
ARM Convert another llc -filetype=obj test. 2013-10-28 21:12:15 +00:00
CPP [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Generic Change objectsize intrinsic to accept different address spaces. 2013-10-07 18:06:48 +00:00
Hexagon TBAA: remove !tbaa from testing cases when they are not needed. 2013-09-30 18:17:35 +00:00
Inputs Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
Mips [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. not intrinsics) 2013-10-30 14:45:14 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX [NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc 2013-10-11 12:39:39 +00:00
PowerPC Convert another llc -filetype=obj test. 2013-10-28 22:17:19 +00:00
R600 R600/SI: Add compute support for CI v2 2013-10-29 16:37:28 +00:00
SPARC [Sparc] Disable tail call optimization for sparc64. 2013-10-09 12:50:39 +00:00
SystemZ [SystemZ] Set usaAA to true 2013-10-28 13:53:37 +00:00
Thumb 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets 2013-10-17 19:52:05 +00:00
Thumb2 MachineSink: Fix and tweak critical-edge breaking heuristic. 2013-10-14 16:57:17 +00:00
X86 Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too." 2013-10-30 06:36:19 +00:00
XCore XCore target fix bug in emitArrayBound() causing segmentation fault 2013-10-11 10:27:13 +00:00