Tim Northover 6ff3ac67e0 AArch64: add BFC alias for the BFI/BFM instructions. ... Unlike 32-bit ARM, AArch64 can use wzr/xzr to implement this without the need for a separate instruction. rdar://18679590 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236245 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-30 18:28:58 +00:00
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AArch64	AArch64: add BFC alias for the BFI/BFM instructions.	2015-04-30 18:28:58 +00:00
ARM	[ARM] Add v8.1a "Privileged Access Never" extension	2015-04-16 11:34:25 +00:00
Hexagon	[Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests.	2015-02-03 19:15:11 +00:00
Mips	[mips] Sorted instructions in mips64r6 disassembly tests. NFC.	2015-04-30 10:52:42 +00:00
PowerPC	[PowerPC] Use sync inst alias when printing	2015-04-23 23:05:08 +00:00
Sparc	Sparc: Prefer reg+reg address encoding when only one register used.	2015-04-29 14:54:44 +00:00
SystemZ	[SystemZ] Support transactional execution on zEC12	2015-04-01 12:51:43 +00:00
X86	Fix the operand encoding in the test instruction.	2015-03-31 12:31:55 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00