llvm-6502/test/CodeGen
James Molloy 7023b85187 [AArch64] Fix a silent codegen fault in BUILD_VECTOR lowering.
We should be talking about the number of source elements, not the number of destination elements, given we know at this point that the source and dest element numbers are not the same.

While we're at it, avoid writing to std::vector::end()...

Bug found with random testing and a lot of coffee.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220051 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-17 17:06:31 +00:00
..
AArch64 [AArch64] Fix a silent codegen fault in BUILD_VECTOR lowering. 2014-10-17 17:06:31 +00:00
ARM
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC [PowerPC] Enable use of lxvw4x/stxvw4x in VSX code generation 2014-10-17 15:13:38 +00:00
R600 R600: Add EG to FMA test 2014-10-17 14:45:27 +00:00
SPARC
SystemZ
Thumb
Thumb2 ARM: Fix a bug which was causing convergence failure in constant-island pass. 2014-10-17 01:31:47 +00:00
X86 Delete -std-compile-opts. 2014-10-16 20:00:02 +00:00
XCore