mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-04 22:29:22 +00:00
707fd44038
* rounding modes for fp add, mul, sub now use .rn * float -> int rounding correctly uses .rzi not .rni * 32bit fdiv for sm13 uses div.rn (instead of div.approx) * 32bit fdiv for sm10 now uses div (instead of div.approx) Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit. All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend. Patch by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133253 91177308-0d34-0410-b5e6-96231b3b80d8
72 lines
1.4 KiB
LLVM
72 lines
1.4 KiB
LLVM
; RUN: llc < %s -march=ptx32 | FileCheck %s
|
|
|
|
define ptx_device i16 @t1_u16(i16 %x, i16 %y) {
|
|
; CHECK: sub.u16 rh0, rh1, rh2;
|
|
; CHECK-NEXT: ret;
|
|
%z = sub i16 %x, %y
|
|
ret i16 %z
|
|
}
|
|
|
|
define ptx_device i32 @t1_u32(i32 %x, i32 %y) {
|
|
; CHECK: sub.u32 r0, r1, r2;
|
|
; CHECK-NEXT: ret;
|
|
%z = sub i32 %x, %y
|
|
ret i32 %z
|
|
}
|
|
|
|
define ptx_device i64 @t1_u64(i64 %x, i64 %y) {
|
|
; CHECK: sub.u64 rd0, rd1, rd2;
|
|
; CHECK-NEXT: ret;
|
|
%z = sub i64 %x, %y
|
|
ret i64 %z
|
|
}
|
|
|
|
define ptx_device float @t1_f32(float %x, float %y) {
|
|
; CHECK: sub.rn.f32 r0, r1, r2
|
|
; CHECK-NEXT: ret;
|
|
%z = fsub float %x, %y
|
|
ret float %z
|
|
}
|
|
|
|
define ptx_device double @t1_f64(double %x, double %y) {
|
|
; CHECK: sub.rn.f64 rd0, rd1, rd2
|
|
; CHECK-NEXT: ret;
|
|
%z = fsub double %x, %y
|
|
ret double %z
|
|
}
|
|
|
|
define ptx_device i16 @t2_u16(i16 %x) {
|
|
; CHECK: add.u16 rh0, rh1, -1;
|
|
; CHECK-NEXT: ret;
|
|
%z = sub i16 %x, 1
|
|
ret i16 %z
|
|
}
|
|
|
|
define ptx_device i32 @t2_u32(i32 %x) {
|
|
; CHECK: add.u32 r0, r1, -1;
|
|
; CHECK-NEXT: ret;
|
|
%z = sub i32 %x, 1
|
|
ret i32 %z
|
|
}
|
|
|
|
define ptx_device i64 @t2_u64(i64 %x) {
|
|
; CHECK: add.u64 rd0, rd1, -1;
|
|
; CHECK-NEXT: ret;
|
|
%z = sub i64 %x, 1
|
|
ret i64 %z
|
|
}
|
|
|
|
define ptx_device float @t2_f32(float %x) {
|
|
; CHECK: add.rn.f32 r0, r1, 0FBF800000;
|
|
; CHECK-NEXT: ret;
|
|
%z = fsub float %x, 1.0
|
|
ret float %z
|
|
}
|
|
|
|
define ptx_device double @t2_f64(double %x) {
|
|
; CHECK: add.rn.f64 rd0, rd1, 0DBFF0000000000000;
|
|
; CHECK-NEXT: ret;
|
|
%z = fsub double %x, 1.0
|
|
ret double %z
|
|
}
|