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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
39 lines
1.3 KiB
LLVM
39 lines
1.3 KiB
LLVM
; RUN: llc < %s -march=x86
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; PR2783
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@g_15 = external global i16 ; <i16*> [#uses=2]
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define i32 @func_3(i32 %p_5) nounwind {
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entry:
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%0 = srem i32 1, 0 ; <i32> [#uses=2]
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%1 = load i16, i16* @g_15, align 2 ; <i16> [#uses=1]
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%2 = zext i16 %1 to i32 ; <i32> [#uses=1]
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%3 = and i32 %2, 1 ; <i32> [#uses=1]
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%4 = tail call i32 (...)* @rshift_u_s( i32 1 ) nounwind ; <i32> [#uses=1]
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%5 = icmp slt i32 %4, 2 ; <i1> [#uses=1]
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%6 = zext i1 %5 to i32 ; <i32> [#uses=1]
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%7 = icmp sge i32 %3, %6 ; <i1> [#uses=1]
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%8 = zext i1 %7 to i32 ; <i32> [#uses=1]
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%9 = load i16, i16* @g_15, align 2 ; <i16> [#uses=1]
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%10 = icmp eq i16 %9, 0 ; <i1> [#uses=1]
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%11 = zext i1 %10 to i32 ; <i32> [#uses=1]
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%12 = tail call i32 (...)* @func_20( i32 1 ) nounwind ; <i32> [#uses=1]
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%13 = icmp sge i32 %11, %12 ; <i1> [#uses=1]
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%14 = zext i1 %13 to i32 ; <i32> [#uses=1]
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%15 = sub i32 %8, %14 ; <i32> [#uses=1]
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%16 = icmp ult i32 %15, 2 ; <i1> [#uses=1]
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%17 = zext i1 %16 to i32 ; <i32> [#uses=1]
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%18 = icmp ugt i32 %0, 3 ; <i1> [#uses=1]
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%or.cond = or i1 false, %18 ; <i1> [#uses=1]
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%19 = select i1 %or.cond, i32 0, i32 %0 ; <i32> [#uses=1]
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%.0 = lshr i32 %17, %19 ; <i32> [#uses=1]
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%20 = tail call i32 (...)* @func_7( i32 %.0 ) nounwind ; <i32> [#uses=0]
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ret i32 undef
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}
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declare i32 @rshift_u_s(...)
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declare i32 @func_20(...)
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declare i32 @func_7(...)
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