llvm-6502/test/CodeGen
Andrea Di Biagio 70a7cda495 [CodeGenPrepare] Teach when it is profitable to speculate calls to @llvm.cttz/ctlz.
If the control flow is modelling an if-statement where the only instruction in
the 'then' basic block (excluding the terminator) is a call to cttz/ctlz,
CodeGenPrepare can try to speculate the cttz/ctlz call and simplify the control
flow graph.

Example:
\code
entry:
  %cmp = icmp eq i64 %val, 0
  br i1 %cmp, label %end.bb, label %then.bb

then.bb:
  %c = tail call i64 @llvm.cttz.i64(i64 %val, i1 true)
  br label %end.bb

end.bb:
  %cond = phi i64 [ %c, %then.bb ], [ 64, %entry]
\code

In this example, basic block %then.bb is taken if value %val is not zero.
Also, the phi node in %end.bb would propagate the size-of in bits of %val
only if %val is equal to zero.

With this patch, CodeGenPrepare will try to hoist the call to cttz from %then.bb
into basic block %entry only if cttz is cheap to speculate for the target.

Added two new hooks in TargetLowering.h to let targets customize the behavior
(i.e. decide whether it is cheap or not to speculate calls to cttz/ctlz). The
two new methods are 'isCheapToSpeculateCtlz' and 'isCheapToSpeculateCttz'.
By default, both methods return 'false'.
On X86, method 'isCheapToSpeculateCtlz' returns true only if the target has
LZCNT. Method 'isCheapToSpeculateCttz' only returns true if the target has BMI.

Differential Revision: http://reviews.llvm.org/D6728


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224899 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-28 11:07:35 +00:00
..
AArch64 Lower multiply-negate operation to mneg on AArch64 2014-12-22 13:38:58 +00:00
ARM [ARM] Don't break alignment when combining base updates into load/stores. 2014-12-23 06:07:31 +00:00
CPP
Generic CodeGen: do not attempt to invalidate virtual registers for zero-sized phis. 2014-12-19 20:50:07 +00:00
Hexagon [Hexagon] Reapplying 224775 load words. 2014-12-23 20:02:16 +00:00
Inputs IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Mips [mips][microMIPS] Fix bugs related to atomic SC/LL instructions 2014-12-18 16:39:29 +00:00
MSP430 Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
NVPTX [NVPTX] Fix bugs related to isSingleValueType 2014-12-17 17:59:04 +00:00
PowerPC PowerPC: CTR shouldn't fire if a TLS call is in the loop 2014-12-27 19:45:38 +00:00
R600 Enable (sext x) == C --> x == (trunc C) combine 2014-12-21 16:48:42 +00:00
SPARC IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
SystemZ IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Thumb IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Thumb2 IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
X86 [CodeGenPrepare] Teach when it is profitable to speculate calls to @llvm.cttz/ctlz. 2014-12-28 11:07:35 +00:00
XCore IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00