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LLVM backend for 6502
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Bill Wendling 70fcb6bf58 CellSPU doesn't appear to support fully the "ISD::ROTR" operation. The DAG 
combiner can now generate ROTR if the backend says that it can handle it. Cell
SPU says this, but gets an error from code gen saying that it can't select
ROTR. I'm xfailing this test until this can be fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55579 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:32:12 +00:00
autoconf Enable -fvisibility-inlines-hidden by default for compilers which 2008-08-30 01:16:19 +00:00
bindings PR2731: C and Ocaml bindings for setTailCall and isTailCall. 2008-08-30 16:34:54 +00:00
docs Update GC docs for clarified naming and AsmWriter refactoring. 2008-08-24 03:18:23 +00:00
examples Switch the asmprinter (.ll) and all the stuff it requires over to 2008-08-23 22:23:09 +00:00
include PR2731: C and Ocaml bindings for setTailCall and isTailCall. 2008-08-30 16:34:54 +00:00
lib Cosmetic changes to Machine LICM. No functionality change. 2008-08-31 02:30:23 +00:00
projects Allow the test suite to be checked out into projects/test-suite. 2008-06-24 13:01:57 +00:00
runtime
test CellSPU doesn't appear to support fully the "ISD::ROTR" operation. The DAG 2008-08-31 02:32:12 +00:00
tools Backout 55429 2008-08-27 20:51:49 +00:00
utils Add initial support for fast isel of instructions that have inputs pinned to physical registers. 2008-08-29 17:45:56 +00:00
website
win32 Use additionnal include directory instead of ../ in #include. 2008-08-24 12:30:46 +00:00
Xcode
build-for-llvm-top.sh
configure Enable -fvisibility-inlines-hidden by default for compilers which 2008-08-30 01:16:19 +00:00
CREDITS.TXT Add another description to my entry. 2008-08-28 23:16:37 +00:00
LICENSE.TXT
llvm.spec.in
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ModuleInfo.txt
README.txt Remove extra lines 2008-07-28 20:50:25 +00:00

README.txt 

Low Level Virtual Machine (LLVM)
================================

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Please see the HTML documentation provided in docs/index.html for further
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