llvm-6502/lib/CodeGen/SelectionDAG
Scott Michel c9dc114578 1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL.
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL
patterns. This was motivated by the X86/rotate.ll testcase, which should now
generate code for other platforms (and soon-to-come platforms.) Rewrote code
slightly to make it easier to read.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35605 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02 21:36:32 +00:00
..
CallingConvLower.cpp add methods for analysis of call results and return nodes. 2007-02-28 07:09:40 +00:00
DAGCombiner.cpp 1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL. 2007-04-02 21:36:32 +00:00
LegalizeDAG.cpp 1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL. 2007-04-02 21:36:32 +00:00
Makefile For PR780: 2006-07-26 16:18:00 +00:00
ScheduleDAG.cpp Fix some VC++ warnings. 2007-03-20 20:43:18 +00:00
ScheduleDAGList.cpp switch the sched unit map over to use a DenseMap instead of std::map. This 2007-02-03 01:34:13 +00:00
ScheduleDAGRRList.cpp Estimate a cost using the possible number of scratch registers required and use 2007-03-14 22:43:40 +00:00
ScheduleDAGSimple.cpp switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This 2007-02-04 08:47:20 +00:00
SelectionDAG.cpp For PR1297: 2007-04-01 07:32:19 +00:00
SelectionDAGISel.cpp For PR1297: 2007-04-01 07:34:11 +00:00
SelectionDAGPrinter.cpp Removing even more <iostream> includes. 2006-12-07 20:04:42 +00:00
TargetLowering.cpp switch TL::getValueType to use MVT::getValueType. 2007-03-31 04:05:24 +00:00