Evan Cheng 13151432ed Change if-conversion block size limit checks to add some flexibility. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106901 91177308-0d34-0410-b5e6-96231b3b80d8		2010-06-25 22:42:03 +00:00
..
Mangler.h
SubtargetFeature.h
Target.td	Remove isTwoAddress from llvm.	2010-06-21 20:35:09 +00:00
TargetAsmBackend.h	MC: Change RelaxInstruction to only take the input and output instructions.	2010-05-26 18:15:06 +00:00
TargetAsmLexer.h
TargetAsmParser.h
TargetCallingConv.td
TargetData.h
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h	Start TargetRegisterClass indices at 0 instead of 1, so that	2010-06-18 18:13:55 +00:00
TargetInstrInfo.h	Change if-conversion block size limit checks to add some flexibility.	2010-06-25 22:42:03 +00:00
TargetInstrItineraries.h	declare a class with 'class' instead of struct to avoid tag mismatch	2010-06-12 15:46:56 +00:00
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLowering.h	Change if-conversion block size limit checks to add some flexibility.	2010-06-25 22:42:03 +00:00
TargetLoweringObjectFile.h	Add a new section and accessor for TLS data.	2010-05-22 00:00:58 +00:00
TargetMachine.h	MC: Add TargetMachine support for setting the value of MCRelaxAll with	2010-05-26 21:48:55 +00:00
TargetOpcodes.h	- Fix description of SUBREG_TO_REG. It's not going to generate a zext. But it	2010-06-09 18:15:36 +00:00
TargetOptions.h
TargetRegisterInfo.h	Start TargetRegisterClass indices at 0 instead of 1, so that	2010-06-18 18:13:55 +00:00
TargetRegistry.h	Currently, createMachOStreamer() is invoked directly in llvm-mc which	2010-05-21 12:54:43 +00:00
TargetSchedule.td
TargetSelect.h
TargetSelectionDAG.td
TargetSelectionDAGInfo.h	Fix a comment.	2010-05-11 18:03:41 +00:00
TargetSubtarget.h