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https://github.com/c64scene-ar/llvm-6502.git
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b0abb4dc42
the overloaded vector types allowed floating-point or integer vector elements. Most of these operations actually depend on the element type, so bitcasting was not an option. If you include the vpadd intrinsics that I updated earlier, this gets rid of 20 intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
2.1 KiB
LLVM
52 lines
2.1 KiB
LLVM
; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
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%struct.__builtin_neon_v8qi3 = type { <8 x i8>, <8 x i8>, <8 x i8> }
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%struct.__builtin_neon_v4hi3 = type { <4 x i16>, <4 x i16>, <4 x i16> }
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%struct.__builtin_neon_v2si3 = type { <2 x i32>, <2 x i32>, <2 x i32> }
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%struct.__builtin_neon_v2sf3 = type { <2 x float>, <2 x float>, <2 x float> }
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define <8 x i8> @vld3i8(i8* %A) nounwind {
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;CHECK: vld3i8:
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;CHECK: vld3.8
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%tmp1 = call %struct.__builtin_neon_v8qi3 @llvm.arm.neon.vld3.v8i8(i8* %A)
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%tmp2 = extractvalue %struct.__builtin_neon_v8qi3 %tmp1, 0
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%tmp3 = extractvalue %struct.__builtin_neon_v8qi3 %tmp1, 2
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%tmp4 = add <8 x i8> %tmp2, %tmp3
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ret <8 x i8> %tmp4
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}
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define <4 x i16> @vld3i16(i16* %A) nounwind {
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;CHECK: vld3i16:
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;CHECK: vld3.16
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%tmp1 = call %struct.__builtin_neon_v4hi3 @llvm.arm.neon.vld3.v4i16(i16* %A)
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%tmp2 = extractvalue %struct.__builtin_neon_v4hi3 %tmp1, 0
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%tmp3 = extractvalue %struct.__builtin_neon_v4hi3 %tmp1, 2
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%tmp4 = add <4 x i16> %tmp2, %tmp3
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ret <4 x i16> %tmp4
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}
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define <2 x i32> @vld3i32(i32* %A) nounwind {
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;CHECK: vld3i32:
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;CHECK: vld3.32
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%tmp1 = call %struct.__builtin_neon_v2si3 @llvm.arm.neon.vld3.v2i32(i32* %A)
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%tmp2 = extractvalue %struct.__builtin_neon_v2si3 %tmp1, 0
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%tmp3 = extractvalue %struct.__builtin_neon_v2si3 %tmp1, 2
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%tmp4 = add <2 x i32> %tmp2, %tmp3
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ret <2 x i32> %tmp4
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}
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define <2 x float> @vld3f(float* %A) nounwind {
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;CHECK: vld3f:
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;CHECK: vld3.32
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%tmp1 = call %struct.__builtin_neon_v2sf3 @llvm.arm.neon.vld3.v2f32(float* %A)
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%tmp2 = extractvalue %struct.__builtin_neon_v2sf3 %tmp1, 0
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%tmp3 = extractvalue %struct.__builtin_neon_v2sf3 %tmp1, 2
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%tmp4 = add <2 x float> %tmp2, %tmp3
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ret <2 x float> %tmp4
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}
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declare %struct.__builtin_neon_v8qi3 @llvm.arm.neon.vld3.v8i8(i8*) nounwind readonly
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declare %struct.__builtin_neon_v4hi3 @llvm.arm.neon.vld3.v4i16(i8*) nounwind readonly
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declare %struct.__builtin_neon_v2si3 @llvm.arm.neon.vld3.v2i32(i8*) nounwind readonly
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declare %struct.__builtin_neon_v2sf3 @llvm.arm.neon.vld3.v2f32(i8*) nounwind readonly
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