mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
5a70dd1d82
Similar to gep (r230786) and load (r230794) changes.
Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.
(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)
import fileinput
import sys
import re
rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)
def conv(match):
line = match.group(1)
line += match.group(4)
line += ", "
line += match.group(2)
return line
line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
sys.stdout.write(line[off:match.start()])
sys.stdout.write(conv(match))
off = match.end()
sys.stdout.write(line[off:])
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
107 lines
2.2 KiB
LLVM
107 lines
2.2 KiB
LLVM
; RUN: opt -gvn -disable-output < %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-f128:128:128-n8:16:32:64"
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@nuls = external global [10 x i8]
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define fastcc void @p_ere() nounwind {
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entry:
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br label %"<bb 5>"
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"<L18>.i":
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br i1 undef, label %"<bb 3>.i30.i", label %doemit.exit51.i
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"<bb 3>.i30.i":
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unreachable
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doemit.exit51.i:
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br label %"<bb 53>.i"
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"<L19>.i":
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br i1 undef, label %"<bb 3>.i55.i", label %doemit.exit76.i
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"<bb 3>.i55.i":
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unreachable
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doemit.exit76.i:
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br label %"<bb 53>.i"
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"<L98>.i":
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store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @nuls, i64 0, i64 0), i8** undef, align 8
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br label %"<bb 53>.i"
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"<L99>.i":
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br label %"<bb 53>.i"
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"<L24>.i":
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br i1 undef, label %"<bb 53>.i", label %"<bb 35>.i"
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"<bb 35>.i":
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br label %"<bb 53>.i"
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"<L28>.i":
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br label %"<bb 53>.i"
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"<L29>.i":
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br label %"<bb 53>.i"
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"<L39>.i":
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br label %"<bb 53>.i"
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"<bb 53>.i":
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%wascaret_2.i = phi i32 [ 0, %"<L39>.i" ], [ 0, %"<L29>.i" ], [ 0, %"<L28>.i" ], [ 0, %"<bb 35>.i" ], [ 0, %"<L99>.i" ], [ 0, %"<L98>.i" ], [ 0, %doemit.exit76.i ], [ 1, %doemit.exit51.i ], [ 0, %"<L24>.i" ]
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%D.5496_84.i = load i8*, i8** undef, align 8
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br i1 undef, label %"<bb 54>.i", label %"<bb 5>"
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"<bb 54>.i":
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br i1 undef, label %"<bb 5>", label %"<bb 58>.i"
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"<bb 58>.i":
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br i1 undef, label %"<bb 64>.i", label %"<bb 59>.i"
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"<bb 59>.i":
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br label %"<bb 64>.i"
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"<bb 64>.i":
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switch i32 undef, label %"<bb 5>" [
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i32 42, label %"<L54>.i"
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i32 43, label %"<L55>.i"
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i32 63, label %"<L56>.i"
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i32 123, label %"<bb 5>.i258.i"
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]
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"<L54>.i":
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br i1 undef, label %"<bb 3>.i105.i", label %doemit.exit127.i
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"<bb 3>.i105.i":
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unreachable
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doemit.exit127.i:
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unreachable
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"<L55>.i":
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br i1 undef, label %"<bb 3>.i157.i", label %"<bb 5>"
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"<bb 3>.i157.i":
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unreachable
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"<L56>.i":
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br label %"<bb 5>"
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"<bb 5>.i258.i":
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unreachable
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"<bb 5>":
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switch i32 undef, label %"<L39>.i" [
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i32 36, label %"<L19>.i"
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i32 94, label %"<L18>.i"
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i32 124, label %"<L98>.i"
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i32 42, label %"<L99>.i"
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i32 43, label %"<L99>.i"
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i32 46, label %"<L24>.i"
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i32 63, label %"<L99>.i"
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i32 91, label %"<L28>.i"
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i32 92, label %"<L29>.i"
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]
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}
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