llvm-6502/test/Transforms/InstCombine/2007-06-06-AshrSignBit.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

23 lines
646 B
LLVM

; RUN: opt < %s -instcombine -S | grep "ashr"
; PR1499
define void @av_cmp_q_cond_true(i32* %retval, i32* %tmp9, i64* %tmp10) {
newFuncRoot:
br label %cond_true
return.exitStub: ; preds = %cond_true
ret void
cond_true: ; preds = %newFuncRoot
%tmp30 = load i64, i64* %tmp10 ; <i64> [#uses=1]
%.cast = zext i32 63 to i64 ; <i64> [#uses=1]
%tmp31 = ashr i64 %tmp30, %.cast ; <i64> [#uses=1]
%tmp3132 = trunc i64 %tmp31 to i32 ; <i32> [#uses=1]
%tmp33 = or i32 %tmp3132, 1 ; <i32> [#uses=1]
store i32 %tmp33, i32* %tmp9
%tmp34 = load i32, i32* %tmp9 ; <i32> [#uses=1]
store i32 %tmp34, i32* %retval
br label %return.exitStub
}