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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.6 KiB
LLVM
58 lines
1.6 KiB
LLVM
; ModuleID = 'test1.c'
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; RUN: opt -S -instcombine < %s | FileCheck %s
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target triple = "x86_64-apple-macosx10.6.6"
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define zeroext i16 @foo1(i32 %on_off) nounwind uwtable ssp {
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entry:
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%on_off.addr = alloca i32, align 4
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%a = alloca i32, align 4
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store i32 %on_off, i32* %on_off.addr, align 4
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%tmp = load i32, i32* %on_off.addr, align 4
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%sub = sub i32 1, %tmp
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; CHECK-NOT: mul i32
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%mul = mul i32 %sub, -2
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; CHECK: shl
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; CHECK-NEXT: add
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store i32 %mul, i32* %a, align 4
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%tmp1 = load i32, i32* %a, align 4
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%conv = trunc i32 %tmp1 to i16
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ret i16 %conv
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}
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define zeroext i16 @foo2(i32 %on_off, i32 %q) nounwind uwtable ssp {
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entry:
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%on_off.addr = alloca i32, align 4
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%q.addr = alloca i32, align 4
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%a = alloca i32, align 4
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store i32 %on_off, i32* %on_off.addr, align 4
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store i32 %q, i32* %q.addr, align 4
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%tmp = load i32, i32* %q.addr, align 4
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%tmp1 = load i32, i32* %on_off.addr, align 4
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%sub = sub i32 %tmp, %tmp1
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; CHECK-NOT: mul i32
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%mul = mul i32 %sub, -4
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; CHECK: sub i32
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; CHECK-NEXT: shl
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store i32 %mul, i32* %a, align 4
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%tmp2 = load i32, i32* %a, align 4
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%conv = trunc i32 %tmp2 to i16
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ret i16 %conv
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}
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define zeroext i16 @foo3(i32 %on_off) nounwind uwtable ssp {
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entry:
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%on_off.addr = alloca i32, align 4
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%a = alloca i32, align 4
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store i32 %on_off, i32* %on_off.addr, align 4
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%tmp = load i32, i32* %on_off.addr, align 4
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%sub = sub i32 7, %tmp
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; CHECK-NOT: mul i32
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%mul = mul i32 %sub, -4
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; CHECK: shl
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; CHECK-NEXT: add
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store i32 %mul, i32* %a, align 4
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%tmp1 = load i32, i32* %a, align 4
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%conv = trunc i32 %tmp1 to i16
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ret i16 %conv
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}
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