llvm-6502/test/Transforms/InstCombine/udiv-simplify-bug-1.ll
Nadav Rotem 9753f0b9b4 Teach InstCombine to canonicalize [SU]div+[AL]shl patterns.
For example:
  %1 = lshr i32 %x, 2
  %2 = udiv i32 %1, 100

rdar://12182093




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162743 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28 10:01:43 +00:00

21 lines
490 B
LLVM

; RUN: opt < %s -instcombine -S > %t1.ll
; RUN: grep udiv %t1.ll | count 2
; RUN: grep zext %t1.ll | count 2
; PR2274
; The udiv instructions shouldn't be optimized away, and the
; sext instructions should be optimized to zext.
define i64 @bar(i32 %x, i32 %g) nounwind {
%y = lshr i32 %x, 30
%r = udiv i32 %y, %g
%z = sext i32 %r to i64
ret i64 %z
}
define i64 @qux(i32 %x, i32 %v) nounwind {
%y = lshr i32 %x, 31
%r = udiv i32 %y, %v
%z = sext i32 %r to i64
ret i64 %z
}