llvm-6502/test/CodeGen
2011-05-17 02:36:59 +00:00
..
Alpha
ARM Teach LiveInterval::isZeroLength about null SlotIndexes. 2011-05-16 23:50:05 +00:00
Blackfin Don't completely eliminate identity copies that also modify super register liveness. 2011-03-31 17:55:25 +00:00
CBackend
CellSPU don't test for codegen of 'store undef' 2011-04-09 02:31:26 +00:00
CPP
Generic Make codegen able to handle values of empty types. This is one way 2011-05-13 15:18:06 +00:00
MBlaze Add scheduling information for the MBlaze backend. 2011-04-11 22:31:52 +00:00
Mips Remove LLVM IR metadata in test case committed in r130847. 2011-05-04 18:28:36 +00:00
MSP430 Fix register-dependent test in MSP430. 2011-05-04 01:01:39 +00:00
PowerPC FileCheckize and break dependence on coalescing order. 2011-05-04 19:02:01 +00:00
PTX PTX: add test cases for cvt, fneg, and selp 2011-05-10 14:53:13 +00:00
SPARC Fix more register and coalescing dependencies. 2011-05-04 19:02:11 +00:00
SystemZ Fix SystemZ tests 2011-03-31 23:02:12 +00:00
Thumb Move this test to CodeGen/Thumb. rdar://problem/9416774 2011-05-11 19:41:28 +00:00
Thumb2 Since I can't reproduce the failures from 131261, re-trying with a 2011-05-13 00:51:54 +00:00
X86 Back out r131444 and r131438; they're breaking nightly tests. I'll look into 2011-05-17 02:36:59 +00:00
XCore Fix register-dependent XCore tests 2011-05-04 01:01:41 +00:00