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dynamic_cast<>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75670 91177308-0d34-0410-b5e6-96231b3b80d8
163 lines
5.9 KiB
C++
163 lines
5.9 KiB
C++
//===-- X86IntelAsmPrinter.h - Convert X86 LLVM code to Intel assembly ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Intel assembly code printer class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86INTELASMPRINTER_H
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#define X86INTELASMPRINTER_H
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#include "../X86.h"
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#include "../X86MachineFunctionInfo.h"
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#include "../X86TargetMachine.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/ADT/StringSet.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/FormattedStream.h"
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namespace llvm {
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struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
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explicit X86IntelAsmPrinter(formatted_raw_ostream &O, X86TargetMachine &TM,
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const TargetAsmInfo *T, bool V)
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: AsmPrinter(O, TM, T, V) {}
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virtual const char *getPassName() const {
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return "X86 Intel-Style Assembly Printer";
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}
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/// printInstruction - This method is automatically generated by tablegen
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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// This method is used by the tablegen'erated instruction printer.
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void printOperand(const MachineInstr *MI, unsigned OpNo,
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const char *Modifier = 0) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.isReg()) {
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assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Not physreg??");
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O << TM.getRegisterInfo()->get(MO.getReg()).Name; // Capitalized names
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} else {
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printOp(MO, Modifier);
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}
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}
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void print_pcrel_imm(const MachineInstr *MI, unsigned OpNo);
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void printi8mem(const MachineInstr *MI, unsigned OpNo) {
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O << "BYTE PTR ";
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printMemReference(MI, OpNo);
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}
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void printi16mem(const MachineInstr *MI, unsigned OpNo) {
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O << "WORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printi32mem(const MachineInstr *MI, unsigned OpNo) {
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O << "DWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printi64mem(const MachineInstr *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printi128mem(const MachineInstr *MI, unsigned OpNo) {
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O << "XMMWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printi256mem(const MachineInstr *MI, unsigned OpNo) {
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O << "YMMWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf32mem(const MachineInstr *MI, unsigned OpNo) {
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O << "DWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf64mem(const MachineInstr *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf80mem(const MachineInstr *MI, unsigned OpNo) {
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O << "XWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf128mem(const MachineInstr *MI, unsigned OpNo) {
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O << "XMMWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf256mem(const MachineInstr *MI, unsigned OpNo) {
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O << "YMMWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printlea32mem(const MachineInstr *MI, unsigned OpNo) {
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O << "DWORD PTR ";
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printLeaMemReference(MI, OpNo);
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}
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void printlea64mem(const MachineInstr *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printLeaMemReference(MI, OpNo);
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}
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void printlea64_32mem(const MachineInstr *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printLeaMemReference(MI, OpNo, "subreg64");
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}
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bool printAsmMRegister(const MachineOperand &MO, const char Mode);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, const char *Modifier = 0);
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void printSSECC(const MachineInstr *MI, unsigned Op);
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void printMemReference(const MachineInstr *MI, unsigned Op,
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const char *Modifier=NULL);
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void printLeaMemReference(const MachineInstr *MI, unsigned Op,
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const char *Modifier=NULL);
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void printPICJumpTableSetLabel(unsigned uid,
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const MachineBasicBlock *MBB) const;
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void printPICJumpTableSetLabel(unsigned uid, unsigned uid2,
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const MachineBasicBlock *MBB) const {
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AsmPrinter::printPICJumpTableSetLabel(uid, uid2, MBB);
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}
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void printPICLabel(const MachineInstr *MI, unsigned Op);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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bool doFinalization(Module &M);
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// We have to propagate some information about MachineFunction to
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// AsmPrinter. It's ok, when we're printing the function, since we have
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// access to MachineFunction and can get the appropriate MachineFunctionInfo.
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// Unfortunately, this is not possible when we're printing reference to
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// Function (e.g. calling it and so on). Even more, there is no way to get the
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// corresponding MachineFunctions: it can even be not created at all. That's
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// why we should use additional structure, when we're collecting all necessary
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// information.
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//
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// This structure is using e.g. for name decoration for stdcall & fastcall'ed
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// function, since we have to use arguments' size for decoration.
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typedef std::map<const Function*, X86MachineFunctionInfo> FMFInfoMap;
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FMFInfoMap FunctionInfoMap;
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void decorateName(std::string& Name, const GlobalValue* GV);
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virtual void EmitString(const ConstantArray *CVA) const;
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// Necessary for dllexport support
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StringSet<> DLLExportedFns, DLLExportedGVs;
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};
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} // end namespace llvm
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#endif
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