llvm-6502/lib/Target/Mips/Mips.td
Bruno Cardoso Lopes 6d32ca0762 support for Schedule included on Mips.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41159 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 02:18:07 +00:00

50 lines
1.8 KiB
C++

//===- Mips.td - Describe the Mips Target Machine ---------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by Bruno Cardoso Lopes and is distributed under the
// University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
// This is the top level entry point for the Mips target.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Target-independent interfaces
//===----------------------------------------------------------------------===//
include "../Target.td"
//===----------------------------------------------------------------------===//
// Descriptions
//===----------------------------------------------------------------------===//
include "MipsRegisterInfo.td"
include "MipsSchedule.td"
include "MipsInstrInfo.td"
include "MipsCallingConv.td"
def MipsInstrInfo : InstrInfo {
let TSFlagsFields = [];
let TSFlagsShifts = [];
}
//===----------------------------------------------------------------------===//
// CPU Directives //
//===----------------------------------------------------------------------===//
def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true",
"MipsIII ISA Support">;
//===----------------------------------------------------------------------===//
// Mips processors supported.
//===----------------------------------------------------------------------===//
def : Processor<"generic", MipsGenericItineraries, []>;
//def : Processor<"r4000", MipsR4000Itineraries, [FeatureMipsIII]>;
def Mips : Target {
let InstructionSet = MipsInstrInfo;
}