Andrew Trick 0f2eec65fb Add MI-Sched support for x86 macro fusion. ... This is an awful implementation of the target hook. But we don't have abstractions yet for common machine ops, and I don't see any quick way to make it table-driven. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184664 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-23 09:00:28 +00:00
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AArch64	AArch64: remove accidental test output file.	2013-06-18 21:16:53 +00:00
ARM	DebugInfo: Don't lose unreferenced non-trivial by-value parameters	2013-06-21 22:56:30 +00:00
CPP
Generic
Hexagon
Inputs
MBlaze
Mips	Replace with a shorter test case produced by Doug Gillmore.	2013-06-22 19:35:08 +00:00
MSP430
NVPTX	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
PowerPC
R600	R600/SI: Expand sub for v2i32 and v4i32 for SI	2013-06-20 21:55:37 +00:00
SI
SPARC	Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.	2013-06-17 19:00:36 +00:00
SystemZ
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X86	Add MI-Sched support for x86 macro fusion.	2013-06-23 09:00:28 +00:00
XCore