llvm-6502/test/CodeGen
Adam Nemet 726942c8bb [ISel] Keep matching state consistent when folding during X86 address match
In the X86 backend, matching an address is initiated by the 'addr' complex
pattern and its friends.  During this process we may reassociate and-of-shift
into shift-of-and (FoldMaskedShiftToScaledMask) to allow folding of the
shift into the scale of the address.

However as demonstrated by the testcase, this can trigger CSE of not only the
shift and the AND which the code is prepared for but also the underlying load
node.  In the testcase this node is sitting in the RecordedNode and MatchScope
data structures of the matcher and becomes a deleted node upon CSE.  Returning
from the complex pattern function, we try to access it again hitting an assert
because the node is no longer a load even though this was checked before.

Now obviously changing the DAG this late is bending the rules but I think it
makes sense somewhat.  Outside of addresses we prefer and-of-shift because it
may lead to smaller immediates (FoldMaskAndShiftToScale is an even better
example because it create a non-canonical node).  We currently don't recognize
addresses during DAGCombiner where arguably this canonicalization should be
performed.  On the other hand, having this in the matcher allows us to cover
all the cases where an address can be used in an instruction.

I've also talked a little bit to Dan Gohman on llvm-dev who added the RAUW for
the new shift node in FoldMaskedShiftToScaledMask.  This RAUW is responsible
for initiating the recursive CSE on users
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-September/076903.html) but it
is not strictly necessary since the shift is hooked into the visited user.  Of
course it's safer to keep the DAG consistent at all times (e.g. for accurate
number of uses, etc.).

So rather than changing the fundamentals, I've decided to continue along the
previous patches and detect the CSE.  This patch installs a very targeted
DAGUpdateListener for the duration of a complex-pattern match and updates the
matching state accordingly.  (Previous patches used HandleSDNode to detect the
CSE but that's not practical here).  The listener is only installed on X86.

I tested that there is no measurable overhead due to this while running
through the spec2k BC files with llc.  The only thing we pay for is the
creation of the listener.  The callback never ever triggers in spec2k since
this is a corner case.

Fixes rdar://problem/18206171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219009 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:00:34 +00:00
..
AArch64 Revert "DI: Fold constant arguments into a single MDString" 2014-10-02 22:15:31 +00:00
ARM Revert 202433 - Provide a target override for the latest regalloc heuristic 2014-10-03 12:20:53 +00:00
CPP
Generic Revert "DI: Fold constant arguments into a single MDString" 2014-10-02 22:15:31 +00:00
Hexagon Revert "DI: Fold constant arguments into a single MDString" 2014-10-02 22:15:31 +00:00
Inputs Revert "DI: Fold constant arguments into a single MDString" 2014-10-02 22:15:31 +00:00
Mips Add fptrunc to mips fast-sel 2014-10-01 18:47:02 +00:00
MSP430 Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
NVPTX Revert r216862 due to a performance regression 2014-10-01 15:22:13 +00:00
PowerPC [Power] Delete redundant test Atomics-32.ll 2014-10-03 18:10:07 +00:00
R600 R600: Align functions to 256 bytes 2014-10-03 19:02:02 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb Revert "DI: Fold constant arguments into a single MDString" 2014-10-02 22:15:31 +00:00
Thumb2 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 2014-10-01 13:13:18 +00:00
X86 [ISel] Keep matching state consistent when folding during X86 address match 2014-10-03 20:00:34 +00:00
XCore Revert "DI: Fold constant arguments into a single MDString" 2014-10-02 22:15:31 +00:00