llvm-6502/test/CodeGen
Matheus Almeida 72d4223ff5 [mips][msa] Add fill.d instruction.
This instruction is only available on Mips64 cores
that implement the MSA ASE.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200400 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-29 15:12:02 +00:00
..
AArch64 [AArch64 NEON] Lower SELECT_CC with vector operand. 2014-01-29 01:57:30 +00:00
ARM Enable EHABI by default 2014-01-29 11:50:56 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][msa] Add fill.d instruction. 2014-01-29 15:12:02 +00:00
MSP430
NVPTX [NVPTX] Fix emitting aggregate parameters 2014-01-28 18:35:29 +00:00
PowerPC Handle spilling the PPC GPRC_NOR0 register class 2014-01-28 05:32:58 +00:00
R600
SPARC [Sparc] Use %r_disp32 for pc_rel entries in FDE as well. 2014-01-29 06:59:20 +00:00
SystemZ
Thumb
Thumb2 Enable EHABI by default 2014-01-29 11:50:56 +00:00
X86 Use a raw_stream to implement the mangler. 2014-01-29 02:30:38 +00:00
XCore