mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
db8552c834
Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226657 91177308-0d34-0410-b5e6-96231b3b80d8
921 lines
16 KiB
TableGen
921 lines
16 KiB
TableGen
//===----------------------------------------------------------------------===//
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// MicroMIPS Base Classes
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//===----------------------------------------------------------------------===//
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//
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// Base class for MicroMips instructions.
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// This class does not depend on the instruction size.
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//
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class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
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InstrItinClass itin, Format f> : Instruction
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{
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let Namespace = "Mips";
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let DecoderNamespace = "MicroMips";
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let OutOperandList = outs;
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let InOperandList = ins;
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let AsmString = asmstr;
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let Pattern = pattern;
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let Itinerary = itin;
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let Predicates = [InMicroMips];
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Format Form = f;
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}
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//
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// Base class for MicroMIPS 16-bit instructions.
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//
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class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
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InstrItinClass itin, Format f> :
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MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
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{
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let Size = 2;
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field bits<16> Inst;
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field bits<16> SoftFail = 0;
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bits<6> Opcode = 0x0;
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}
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//===----------------------------------------------------------------------===//
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// MicroMIPS 16-bit Instruction Formats
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//===----------------------------------------------------------------------===//
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class ARITH_FM_MM16<bit funct> {
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bits<3> rd;
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bits<3> rt;
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bits<3> rs;
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bits<16> Inst;
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let Inst{15-10} = 0x01;
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let Inst{9-7} = rd;
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let Inst{6-4} = rt;
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let Inst{3-1} = rs;
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let Inst{0} = funct;
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}
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class ANDI_FM_MM16<bits<6> funct> {
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bits<3> rd;
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bits<3> rs;
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bits<4> imm;
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bits<16> Inst;
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let Inst{15-10} = funct;
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let Inst{9-7} = rd;
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let Inst{6-4} = rs;
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let Inst{3-0} = imm;
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}
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class LOGIC_FM_MM16<bits<4> funct> {
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bits<3> rt;
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bits<3> rs;
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bits<16> Inst;
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let Inst{15-10} = 0x11;
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let Inst{9-6} = funct;
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let Inst{5-3} = rt;
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let Inst{2-0} = rs;
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}
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class SHIFT_FM_MM16<bits<1> funct> {
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bits<3> rd;
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bits<3> rt;
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bits<3> shamt;
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bits<16> Inst;
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let Inst{15-10} = 0x09;
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let Inst{9-7} = rd;
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let Inst{6-4} = rt;
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let Inst{3-1} = shamt;
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let Inst{0} = funct;
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}
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class ADDIUR2_FM_MM16 {
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bits<3> rd;
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bits<3> rs;
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bits<3> imm;
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bits<16> Inst;
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let Inst{15-10} = 0x1b;
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let Inst{9-7} = rd;
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let Inst{6-4} = rs;
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let Inst{3-1} = imm;
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let Inst{0} = 0;
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}
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class LOAD_STORE_FM_MM16<bits<6> op> {
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bits<3> rt;
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bits<7> addr;
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bits<16> Inst;
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let Inst{15-10} = op;
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let Inst{9-7} = rt;
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let Inst{6-4} = addr{6-4};
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let Inst{3-0} = addr{3-0};
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}
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class LOAD_STORE_SP_FM_MM16<bits<6> op> {
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bits<5> rt;
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bits<5> offset;
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bits<16> Inst;
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let Inst{15-10} = op;
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let Inst{9-5} = rt;
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let Inst{4-0} = offset;
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}
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class ADDIUS5_FM_MM16 {
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bits<5> rd;
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bits<4> imm;
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bits<16> Inst;
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let Inst{15-10} = 0x13;
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let Inst{9-5} = rd;
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let Inst{4-1} = imm;
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let Inst{0} = 0;
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}
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class ADDIUSP_FM_MM16 {
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bits<9> imm;
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bits<16> Inst;
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let Inst{15-10} = 0x13;
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let Inst{9-1} = imm;
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let Inst{0} = 1;
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}
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class MOVE_FM_MM16<bits<6> funct> {
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bits<5> rs;
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bits<5> rd;
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bits<16> Inst;
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let Inst{15-10} = funct;
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let Inst{9-5} = rd;
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let Inst{4-0} = rs;
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}
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class LI_FM_MM16 {
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bits<3> rd;
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bits<7> imm;
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bits<16> Inst;
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let Inst{15-10} = 0x3b;
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let Inst{9-7} = rd;
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let Inst{6-0} = imm;
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}
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class JALR_FM_MM16<bits<5> op> {
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bits<5> rs;
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bits<16> Inst;
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let Inst{15-10} = 0x11;
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let Inst{9-5} = op;
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let Inst{4-0} = rs;
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}
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class MFHILO_FM_MM16<bits<5> funct> {
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bits<5> rd;
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bits<16> Inst;
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let Inst{15-10} = 0x11;
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let Inst{9-5} = funct;
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let Inst{4-0} = rd;
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}
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class JRADDIUSP_FM_MM16<bits<5> op> {
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bits<5> rs;
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bits<5> imm;
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bits<16> Inst;
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let Inst{15-10} = 0x11;
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let Inst{9-5} = op;
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let Inst{4-0} = imm;
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}
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class ADDIUR1SP_FM_MM16 {
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bits<3> rd;
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bits<6> imm;
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bits<16> Inst;
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let Inst{15-10} = 0x1b;
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let Inst{9-7} = rd;
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let Inst{6-1} = imm;
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let Inst{0} = 1;
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}
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class BRKSDBBP16_FM_MM<bits<6> op> {
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bits<4> code_;
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bits<16> Inst;
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let Inst{15-10} = 0x11;
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let Inst{9-4} = op;
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let Inst{3-0} = code_;
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}
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class BEQNEZ_FM_MM16<bits<6> op> {
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bits<3> rs;
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bits<7> offset;
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bits<16> Inst;
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let Inst{15-10} = op;
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let Inst{9-7} = rs;
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let Inst{6-0} = offset;
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}
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class B16_FM {
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bits<10> offset;
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bits<16> Inst;
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let Inst{15-10} = 0x33;
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let Inst{9-0} = offset;
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}
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//===----------------------------------------------------------------------===//
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// MicroMIPS 32-bit Instruction Formats
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//===----------------------------------------------------------------------===//
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class MMArch {
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string Arch = "micromips";
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list<dag> Pattern = [];
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}
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class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
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bits<5> rt;
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bits<5> rs;
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bits<5> rd;
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bits<32> Inst;
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let Inst{31-26} = op;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = rd;
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let Inst{10} = 0;
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let Inst{9-0} = funct;
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}
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class ADDI_FM_MM<bits<6> op> : MMArch {
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bits<5> rs;
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bits<5> rt;
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bits<16> imm16;
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bits<32> Inst;
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let Inst{31-26} = op;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-0} = imm16;
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}
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class SLTI_FM_MM<bits<6> op> : MMArch {
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bits<5> rt;
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bits<5> rs;
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bits<16> imm16;
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bits<32> Inst;
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let Inst{31-26} = op;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-0} = imm16;
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}
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class LUI_FM_MM : MMArch {
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bits<5> rt;
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bits<16> imm16;
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bits<32> Inst;
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let Inst{31-26} = 0x10;
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let Inst{25-21} = 0xd;
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let Inst{20-16} = rt;
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let Inst{15-0} = imm16;
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}
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class MULT_FM_MM<bits<10> funct> : MMArch {
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bits<5> rs;
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bits<5> rt;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-6} = funct;
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let Inst{5-0} = 0x3c;
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}
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class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
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bits<5> rd;
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bits<5> rt;
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bits<5> shamt;
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bits<32> Inst;
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let Inst{31-26} = 0;
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let Inst{25-21} = rd;
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let Inst{20-16} = rt;
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let Inst{15-11} = shamt;
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let Inst{10} = rotate;
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let Inst{9-0} = funct;
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}
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class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
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bits<5> rd;
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bits<5> rt;
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bits<5> rs;
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bits<32> Inst;
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let Inst{31-26} = 0;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = rd;
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let Inst{10} = rotate;
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let Inst{9-0} = funct;
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}
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class LW_FM_MM<bits<6> op> : MMArch {
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bits<5> rt;
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bits<21> addr;
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bits<32> Inst;
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let Inst{31-26} = op;
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let Inst{25-21} = rt;
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let Inst{20-16} = addr{20-16};
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let Inst{15-0} = addr{15-0};
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}
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class LWL_FM_MM<bits<4> funct> {
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bits<5> rt;
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bits<21> addr;
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bits<32> Inst;
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let Inst{31-26} = 0x18;
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let Inst{25-21} = rt;
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let Inst{20-16} = addr{20-16};
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let Inst{15-12} = funct;
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let Inst{11-0} = addr{11-0};
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}
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class CMov_F_I_FM_MM<bits<7> func> : MMArch {
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bits<5> rd;
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bits<5> rs;
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bits<3> fcc;
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bits<32> Inst;
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let Inst{31-26} = 0x15;
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let Inst{25-21} = rd;
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let Inst{20-16} = rs;
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let Inst{15-13} = fcc;
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let Inst{12-6} = func;
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let Inst{5-0} = 0x3b;
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}
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class MTLO_FM_MM<bits<10> funct> : MMArch {
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bits<5> rs;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = 0x00;
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let Inst{20-16} = rs;
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let Inst{15-6} = funct;
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let Inst{5-0} = 0x3c;
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}
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class MFLO_FM_MM<bits<10> funct> : MMArch {
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bits<5> rd;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = 0x00;
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let Inst{20-16} = rd;
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let Inst{15-6} = funct;
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let Inst{5-0} = 0x3c;
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}
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class CLO_FM_MM<bits<10> funct> : MMArch {
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bits<5> rd;
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bits<5> rs;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = rd;
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let Inst{20-16} = rs;
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let Inst{15-6} = funct;
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let Inst{5-0} = 0x3c;
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}
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class SEB_FM_MM<bits<10> funct> : MMArch {
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bits<5> rd;
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bits<5> rt;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = rd;
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let Inst{20-16} = rt;
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let Inst{15-6} = funct;
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let Inst{5-0} = 0x3c;
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}
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class EXT_FM_MM<bits<6> funct> : MMArch {
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bits<5> rt;
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bits<5> rs;
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bits<5> pos;
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bits<5> size;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-11} = size;
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let Inst{10-6} = pos;
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let Inst{5-0} = funct;
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}
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class J_FM_MM<bits<6> op> : MMArch {
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bits<26> target;
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bits<32> Inst;
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let Inst{31-26} = op;
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let Inst{25-0} = target;
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}
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class JR_FM_MM<bits<8> funct> : MMArch {
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bits<5> rs;
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bits<32> Inst;
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let Inst{31-21} = 0x00;
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let Inst{20-16} = rs;
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let Inst{15-14} = 0x0;
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let Inst{13-6} = funct;
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let Inst{5-0} = 0x3c;
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}
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class JALR_FM_MM<bits<10> funct> {
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bits<5> rs;
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bits<5> rd;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = rd;
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let Inst{20-16} = rs;
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let Inst{15-6} = funct;
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let Inst{5-0} = 0x3c;
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}
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class BEQ_FM_MM<bits<6> op> : MMArch {
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bits<5> rs;
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bits<5> rt;
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bits<16> offset;
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bits<32> Inst;
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let Inst{31-26} = op;
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let Inst{25-21} = rt;
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let Inst{20-16} = rs;
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let Inst{15-0} = offset;
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}
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class BGEZ_FM_MM<bits<5> funct> : MMArch {
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bits<5> rs;
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bits<16> offset;
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bits<32> Inst;
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let Inst{31-26} = 0x10;
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let Inst{25-21} = funct;
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let Inst{20-16} = rs;
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let Inst{15-0} = offset;
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}
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class BGEZAL_FM_MM<bits<5> funct> : MMArch {
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bits<5> rs;
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bits<16> offset;
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bits<32> Inst;
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let Inst{31-26} = 0x10;
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let Inst{25-21} = funct;
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let Inst{20-16} = rs;
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let Inst{15-0} = offset;
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}
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class SYNC_FM_MM : MMArch {
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bits<5> stype;
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bits<32> Inst;
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let Inst{31-26} = 0x00;
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let Inst{25-21} = 0x0;
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let Inst{20-16} = stype;
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let Inst{15-6} = 0x1ad;
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let Inst{5-0} = 0x3c;
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}
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class BRK_FM_MM : MMArch {
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bits<10> code_1;
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bits<10> code_2;
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bits<32> Inst;
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let Inst{31-26} = 0x0;
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let Inst{25-16} = code_1;
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let Inst{15-6} = code_2;
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let Inst{5-0} = 0x07;
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}
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class SYS_FM_MM : MMArch {
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bits<10> code_;
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bits<32> Inst;
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let Inst{31-26} = 0x0;
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let Inst{25-16} = code_;
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let Inst{15-6} = 0x22d;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class WAIT_FM_MM {
|
|
bits<10> code_;
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x00;
|
|
let Inst{25-16} = code_;
|
|
let Inst{15-6} = 0x24d;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class ER_FM_MM<bits<10> funct> : MMArch {
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x00;
|
|
let Inst{25-16} = 0x00;
|
|
let Inst{15-6} = funct;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class EI_FM_MM<bits<10> funct> : MMArch {
|
|
bits<32> Inst;
|
|
bits<5> rt;
|
|
|
|
let Inst{31-26} = 0x00;
|
|
let Inst{25-21} = 0x00;
|
|
let Inst{20-16} = rt;
|
|
let Inst{15-6} = funct;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class TEQ_FM_MM<bits<6> funct> : MMArch {
|
|
bits<5> rs;
|
|
bits<5> rt;
|
|
bits<4> code_;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x00;
|
|
let Inst{25-21} = rt;
|
|
let Inst{20-16} = rs;
|
|
let Inst{15-12} = code_;
|
|
let Inst{11-6} = funct;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class TEQI_FM_MM<bits<5> funct> : MMArch {
|
|
bits<5> rs;
|
|
bits<16> imm16;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x10;
|
|
let Inst{25-21} = funct;
|
|
let Inst{20-16} = rs;
|
|
let Inst{15-0} = imm16;
|
|
}
|
|
|
|
class LL_FM_MM<bits<4> funct> {
|
|
bits<5> rt;
|
|
bits<21> addr;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x18;
|
|
let Inst{25-21} = rt;
|
|
let Inst{20-16} = addr{20-16};
|
|
let Inst{15-12} = funct;
|
|
let Inst{11-0} = addr{11-0};
|
|
}
|
|
|
|
class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
|
|
bits<5> ft;
|
|
bits<5> fs;
|
|
bits<5> fd;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = ft;
|
|
let Inst{20-16} = fs;
|
|
let Inst{15-11} = fd;
|
|
let Inst{10} = 0;
|
|
let Inst{9-8} = fmt;
|
|
let Inst{7-0} = funct;
|
|
|
|
list<dag> Pattern = [];
|
|
}
|
|
|
|
class LWXC1_FM_MM<bits<9> funct> : MMArch {
|
|
bits<5> fd;
|
|
bits<5> base;
|
|
bits<5> index;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = index;
|
|
let Inst{20-16} = base;
|
|
let Inst{15-11} = fd;
|
|
let Inst{10-9} = 0x0;
|
|
let Inst{8-0} = funct;
|
|
}
|
|
|
|
class SWXC1_FM_MM<bits<9> funct> : MMArch {
|
|
bits<5> fs;
|
|
bits<5> base;
|
|
bits<5> index;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = index;
|
|
let Inst{20-16} = base;
|
|
let Inst{15-11} = fs;
|
|
let Inst{10-9} = 0x0;
|
|
let Inst{8-0} = funct;
|
|
}
|
|
|
|
class CEQS_FM_MM<bits<2> fmt> : MMArch {
|
|
bits<5> fs;
|
|
bits<5> ft;
|
|
bits<4> cond;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = ft;
|
|
let Inst{20-16} = fs;
|
|
let Inst{15-13} = 0x0; // cc
|
|
let Inst{12} = 0;
|
|
let Inst{11-10} = fmt;
|
|
let Inst{9-6} = cond;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class BC1F_FM_MM<bits<5> tf> : MMArch {
|
|
bits<16> offset;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x10;
|
|
let Inst{25-21} = tf;
|
|
let Inst{20-18} = 0x0; // cc
|
|
let Inst{17-16} = 0x0;
|
|
let Inst{15-0} = offset;
|
|
}
|
|
|
|
class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
|
|
bits<5> fd;
|
|
bits<5> fs;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = fd;
|
|
let Inst{20-16} = fs;
|
|
let Inst{15} = 0;
|
|
let Inst{14} = fmt;
|
|
let Inst{13-6} = funct;
|
|
let Inst{5-0} = 0x3b;
|
|
}
|
|
|
|
class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
|
|
bits<5> fd;
|
|
bits<5> fs;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = fd;
|
|
let Inst{20-16} = fs;
|
|
let Inst{15} = 0;
|
|
let Inst{14-13} = fmt;
|
|
let Inst{12-6} = funct;
|
|
let Inst{5-0} = 0x3b;
|
|
}
|
|
|
|
class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
|
|
bits<5> fd;
|
|
bits<5> fs;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = fd;
|
|
let Inst{20-16} = fs;
|
|
let Inst{15-13} = 0x0; //cc
|
|
let Inst{12-11} = 0x0;
|
|
let Inst{10-9} = fmt;
|
|
let Inst{8-0} = func;
|
|
}
|
|
|
|
class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
|
|
bits<5> fd;
|
|
bits<5> fs;
|
|
bits<5> rt;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = rt;
|
|
let Inst{20-16} = fs;
|
|
let Inst{15-11} = fd;
|
|
let Inst{9-8} = fmt;
|
|
let Inst{7-0} = funct;
|
|
}
|
|
|
|
class MFC1_FM_MM<bits<8> funct> : MMArch {
|
|
bits<5> rt;
|
|
bits<5> fs;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = rt;
|
|
let Inst{20-16} = fs;
|
|
let Inst{15-14} = 0x0;
|
|
let Inst{13-6} = funct;
|
|
let Inst{5-0} = 0x3b;
|
|
}
|
|
|
|
class MADDS_FM_MM<bits<6> funct>: MMArch {
|
|
bits<5> ft;
|
|
bits<5> fs;
|
|
bits<5> fd;
|
|
bits<5> fr;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x15;
|
|
let Inst{25-21} = ft;
|
|
let Inst{20-16} = fs;
|
|
let Inst{15-11} = fd;
|
|
let Inst{10-6} = fr;
|
|
let Inst{5-0} = funct;
|
|
}
|
|
|
|
class COMPACT_BRANCH_FM_MM<bits<5> funct> {
|
|
bits<5> rs;
|
|
bits<16> offset;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x10;
|
|
let Inst{25-21} = funct;
|
|
let Inst{20-16} = rs;
|
|
let Inst{15-0} = offset;
|
|
}
|
|
|
|
class COP0_TLB_FM_MM<bits<10> op> : MMArch {
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x0;
|
|
let Inst{25-16} = 0x0;
|
|
let Inst{15-6} = op;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class SDBBP_FM_MM : MMArch {
|
|
bits<10> code_;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x0;
|
|
let Inst{25-16} = code_;
|
|
let Inst{15-6} = 0x36d;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class RDHWR_FM_MM : MMArch {
|
|
bits<5> rt;
|
|
bits<5> rd;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x0;
|
|
let Inst{25-21} = rt;
|
|
let Inst{20-16} = rd;
|
|
let Inst{15-6} = 0x1ac;
|
|
let Inst{5-0} = 0x3c;
|
|
}
|
|
|
|
class LWXS_FM_MM<bits<10> funct> {
|
|
bits<5> rd;
|
|
bits<5> base;
|
|
bits<5> index;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x0;
|
|
let Inst{25-21} = index;
|
|
let Inst{20-16} = base;
|
|
let Inst{15-11} = rd;
|
|
let Inst{10} = 0;
|
|
let Inst{9-0} = funct;
|
|
}
|
|
|
|
class LWM_FM_MM<bits<4> funct> : MMArch {
|
|
bits<5> rt;
|
|
bits<21> addr;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x8;
|
|
let Inst{25-21} = rt;
|
|
let Inst{20-16} = addr{20-16};
|
|
let Inst{15-12} = funct;
|
|
let Inst{11-0} = addr{11-0};
|
|
}
|
|
|
|
class LWM_FM_MM16<bits<4> funct> : MMArch {
|
|
bits<2> rt;
|
|
bits<4> addr;
|
|
|
|
bits<16> Inst;
|
|
|
|
let Inst{15-10} = 0x11;
|
|
let Inst{9-6} = funct;
|
|
let Inst{5-4} = rt;
|
|
let Inst{3-0} = addr;
|
|
}
|
|
|
|
class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
|
|
bits<21> addr;
|
|
bits<5> hint;
|
|
bits<5> base = addr{20-16};
|
|
bits<12> offset = addr{11-0};
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = op;
|
|
let Inst{25-21} = hint;
|
|
let Inst{20-16} = base;
|
|
let Inst{15-12} = funct;
|
|
let Inst{11-0} = offset;
|
|
}
|
|
|
|
class BARRIER_FM_MM<bits<5> op> : MMArch {
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x0;
|
|
let Inst{25-21} = 0x0;
|
|
let Inst{20-16} = 0x0;
|
|
let Inst{15-11} = op;
|
|
let Inst{10-6} = 0x0;
|
|
let Inst{5-0} = 0x0;
|
|
}
|
|
|
|
class ADDIUPC_FM_MM {
|
|
bits<3> rs;
|
|
bits<23> imm;
|
|
|
|
bits<32> Inst;
|
|
|
|
let Inst{31-26} = 0x1e;
|
|
let Inst{25-23} = rs;
|
|
let Inst{22-0} = imm;
|
|
}
|