mirror of
https://github.com/c64scene-ar/llvm-6502.git
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d5561bb1f0
Implementing this via ComputeMaskedBits has two advantages:
+ It actually works. DAGISel doesn't deal with the chains properly
in the previous pattern-based solution, so they never trigger.
+ The information can be used in other DAG combines, as well as the
trivial "get rid of truncs". For example if the trunc is in a
different basic block.
rdar://problem/16227836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205540 91177308-0d34-0410-b5e6-96231b3b80d8
93 lines
2.5 KiB
LLVM
93 lines
2.5 KiB
LLVM
; RUN: llc < %s -mtriple=armv8-apple-darwin | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv8-apple-darwin | FileCheck %s
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%0 = type { i32, i32 }
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; CHECK-LABEL: f0:
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; CHECK: ldaexd
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define i64 @f0(i8* %p) nounwind readonly {
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entry:
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%ldaexd = tail call %0 @llvm.arm.ldaexd(i8* %p)
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%0 = extractvalue %0 %ldaexd, 1
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%1 = extractvalue %0 %ldaexd, 0
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%2 = zext i32 %0 to i64
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%3 = zext i32 %1 to i64
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%shl = shl nuw i64 %2, 32
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%4 = or i64 %shl, %3
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ret i64 %4
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}
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; CHECK-LABEL: f1:
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; CHECK: stlexd
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define i32 @f1(i8* %ptr, i64 %val) nounwind {
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entry:
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%tmp4 = trunc i64 %val to i32
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%tmp6 = lshr i64 %val, 32
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%tmp7 = trunc i64 %tmp6 to i32
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%stlexd = tail call i32 @llvm.arm.stlexd(i32 %tmp4, i32 %tmp7, i8* %ptr)
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ret i32 %stlexd
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}
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declare %0 @llvm.arm.ldaexd(i8*) nounwind readonly
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declare i32 @llvm.arm.stlexd(i32, i32, i8*) nounwind
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; CHECK-LABEL: test_load_i8:
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; CHECK: ldaexb r0, [r0]
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; CHECK-NOT: uxtb
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; CHECK-NOT: and
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define zeroext i8 @test_load_i8(i8* %addr) {
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%val = call i32 @llvm.arm.ldaex.p0i8(i8* %addr)
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%val8 = trunc i32 %val to i8
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ret i8 %val8
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}
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; CHECK-LABEL: test_load_i16:
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; CHECK: ldaexh r0, [r0]
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; CHECK-NOT: uxth
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; CHECK-NOT: and
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define zeroext i16 @test_load_i16(i16* %addr) {
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%val = call i32 @llvm.arm.ldaex.p0i16(i16* %addr)
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%val16 = trunc i32 %val to i16
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ret i16 %val16
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}
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; CHECK-LABEL: test_load_i32:
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; CHECK: ldaex r0, [r0]
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define i32 @test_load_i32(i32* %addr) {
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%val = call i32 @llvm.arm.ldaex.p0i32(i32* %addr)
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ret i32 %val
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}
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declare i32 @llvm.arm.ldaex.p0i8(i8*) nounwind readonly
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declare i32 @llvm.arm.ldaex.p0i16(i16*) nounwind readonly
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declare i32 @llvm.arm.ldaex.p0i32(i32*) nounwind readonly
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; CHECK-LABEL: test_store_i8:
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; CHECK-NOT: uxtb
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; CHECK: stlexb r0, r1, [r2]
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define i32 @test_store_i8(i32, i8 %val, i8* %addr) {
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%extval = zext i8 %val to i32
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%res = call i32 @llvm.arm.stlex.p0i8(i32 %extval, i8* %addr)
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ret i32 %res
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}
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; CHECK-LABEL: test_store_i16:
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; CHECK-NOT: uxth
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; CHECK: stlexh r0, r1, [r2]
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define i32 @test_store_i16(i32, i16 %val, i16* %addr) {
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%extval = zext i16 %val to i32
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%res = call i32 @llvm.arm.stlex.p0i16(i32 %extval, i16* %addr)
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ret i32 %res
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}
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; CHECK-LABEL: test_store_i32:
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; CHECK: stlex r0, r1, [r2]
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define i32 @test_store_i32(i32, i32 %val, i32* %addr) {
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%res = call i32 @llvm.arm.stlex.p0i32(i32 %val, i32* %addr)
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ret i32 %res
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}
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declare i32 @llvm.arm.stlex.p0i8(i32, i8*) nounwind
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declare i32 @llvm.arm.stlex.p0i16(i32, i16*) nounwind
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declare i32 @llvm.arm.stlex.p0i32(i32, i32*) nounwind
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