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https://github.com/c64scene-ar/llvm-6502.git
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733d01ed45
Move the ARM EHABI unwind opcode definitions from the ARM MCTargetDesc into LLVM Support. This enables sharing of the definitions across the ARM target code as well as llvm-readobj. This will allow implementation of the unwind decoding in llvm-readobj. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198576 91177308-0d34-0410-b5e6-96231b3b80d8
128 lines
3.4 KiB
C++
128 lines
3.4 KiB
C++
//===--- ARMEHABI.h - ARM Exception Handling ABI ----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the constants for the ARM unwind opcodes and exception
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// handling table entry kinds.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_ARM_EHABI_H
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#define LLVM_SUPPORT_ARM_EHABI_H
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namespace llvm {
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namespace ARM {
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namespace EHABI {
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/// ARM exception handling table entry kinds
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enum EHTEntryKind {
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EHT_GENERIC = 0x00,
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EHT_COMPACT = 0x80
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};
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enum {
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/// Special entry for the function never unwind
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EXIDX_CANTUNWIND = 0x1
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};
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/// ARM-defined frame unwinding opcodes
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enum UnwindOpcodes {
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// Format: 00xxxxxx
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// Purpose: vsp = vsp + ((x << 2) + 4)
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UNWIND_OPCODE_INC_VSP = 0x00,
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// Format: 01xxxxxx
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// Purpose: vsp = vsp - ((x << 2) + 4)
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UNWIND_OPCODE_DEC_VSP = 0x40,
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// Format: 10000000 00000000
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// Purpose: refuse to unwind
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UNWIND_OPCODE_REFUSE = 0x8000,
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// Format: 1000xxxx xxxxxxxx
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// Purpose: pop r[15:12], r[11:4]
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// Constraint: x != 0
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UNWIND_OPCODE_POP_REG_MASK_R4 = 0x8000,
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// Format: 1001xxxx
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// Purpose: vsp = r[x]
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// Constraint: x != 13 && x != 15
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UNWIND_OPCODE_SET_VSP = 0x90,
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// Format: 10100xxx
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// Purpose: pop r[(4+x):4]
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UNWIND_OPCODE_POP_REG_RANGE_R4 = 0xa0,
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// Format: 10101xxx
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// Purpose: pop r14, r[(4+x):4]
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UNWIND_OPCODE_POP_REG_RANGE_R4_R14 = 0xa8,
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// Format: 10110000
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// Purpose: finish
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UNWIND_OPCODE_FINISH = 0xb0,
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// Format: 10110001 0000xxxx
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// Purpose: pop r[3:0]
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// Constraint: x != 0
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UNWIND_OPCODE_POP_REG_MASK = 0xb100,
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// Format: 10110010 x(uleb128)
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// Purpose: vsp = vsp + ((x << 2) + 0x204)
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UNWIND_OPCODE_INC_VSP_ULEB128 = 0xb2,
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// Format: 10110011 xxxxyyyy
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// Purpose: pop d[(x+y):x]
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UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDX = 0xb300,
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// Format: 10111xxx
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// Purpose: pop d[(8+x):8]
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UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDX_D8 = 0xb8,
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// Format: 11000xxx
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// Purpose: pop wR[(10+x):10]
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UNWIND_OPCODE_POP_WIRELESS_MMX_REG_RANGE_WR10 = 0xc0,
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// Format: 11000110 xxxxyyyy
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// Purpose: pop wR[(x+y):x]
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UNWIND_OPCODE_POP_WIRELESS_MMX_REG_RANGE = 0xc600,
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// Format: 11000111 0000xxxx
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// Purpose: pop wCGR[3:0]
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// Constraint: x != 0
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UNWIND_OPCODE_POP_WIRELESS_MMX_REG_MASK = 0xc700,
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// Format: 11001000 xxxxyyyy
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// Purpose: pop d[(16+x+y):(16+x)]
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UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D16 = 0xc800,
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// Format: 11001001 xxxxyyyy
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// Purpose: pop d[(x+y):x]
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UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD = 0xc900,
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// Format: 11010xxx
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// Purpose: pop d[(8+x):8]
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UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D8 = 0xd0
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};
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/// ARM-defined Personality Routine Index
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enum PersonalityRoutineIndex {
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// To make the exception handling table become more compact, ARM defined
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// several personality routines in EHABI. There are 3 different
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// personality routines in ARM EHABI currently. It is possible to have 16
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// pre-defined personality routines at most.
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AEABI_UNWIND_CPP_PR0 = 0,
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AEABI_UNWIND_CPP_PR1 = 1,
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AEABI_UNWIND_CPP_PR2 = 2,
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NUM_PERSONALITY_INDEX
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};
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}
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}
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}
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#endif // ARM_UNWIND_OP_H
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