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a787066317
This is currently considered experimental, but most of the more commonly used instructions should work. So far only SI has been extensively tested, CI and VI probably work too, but may be buggy. The current set of tests cases do not give complete coverage, but I think it is sufficient for an experimental assembler. See the documentation in R600Usage for more information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234381 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.3 KiB
ArmAsm
41 lines
1.3 KiB
ArmAsm
// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s
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// RUN: llvm-mc -arch=amdgcn -mcpu=SI -show-encoding %s | FileCheck %s
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//===----------------------------------------------------------------------===//
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// Generic Checks
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//===----------------------------------------------------------------------===//
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// src0 sgpr
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v_cmp_lt_f32 vcc, s2, v4
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// CHECK: v_cmp_lt_f32_e32 vcc, s2, v4 ; encoding: [0x02,0x08,0x02,0x7c]
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// src0 inline immediate
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v_cmp_lt_f32 vcc, 0, v4
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// CHECK: v_cmp_lt_f32_e32 vcc, 0, v4 ; encoding: [0x80,0x08,0x02,0x7c]
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// src0 literal
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v_cmp_lt_f32 vcc, 10.0, v4
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// CHECK: v_cmp_lt_f32_e32 vcc, 0x41200000, v4 ; encoding: [0xff,0x08,0x02,0x7c,0x00,0x00,0x20,0x41]
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// src0, src1 max vgpr
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v_cmp_lt_f32 vcc, v255, v255
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// CHECK: v_cmp_lt_f32_e32 vcc, v255, v255 ; encoding: [0xff,0xff,0x03,0x7c]
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// force 32-bit encoding
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v_cmp_lt_f32_e32 vcc, v2, v4
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// CHECK: v_cmp_lt_f32_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x02,0x7c]
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//===----------------------------------------------------------------------===//
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// Instructions
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//===----------------------------------------------------------------------===//
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v_cmp_f_f32 vcc, v2, v4
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// CHECK: v_cmp_f_f32_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x00,0x7c]
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v_cmp_lt_f32 vcc, v2, v4
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// CHECK: v_cmp_lt_f32_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x02,0x7c]
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// TODO: Add tests for the rest of the instructions.
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